Author: jmallett
Date: Mon Oct 29 00:51:53 2012
New Revision: 242273
URL: http://svn.freebsd.org/changeset/base/242273
Log:
Use Simple Executive LED display routines, which correctly use the LED base
address passed from the bootloader, rather than using a hard-coded value.
Make FreeBSD announce itself on the LED display similar to other kernels.
Remove uses of the previous LED routines, which were under-used and only used
in drivers for what seem like debugging purposes, despite those drivers being
widely-tested.
Remove several inlines for accessing memory that duplicate other functions
which are now used instead, as they are now entirely unused.
Modified:
head/sys/contrib/octeon-sdk/cvmx-ebt3000.c
head/sys/mips/cavium/files.octeon1
head/sys/mips/cavium/octeon_ebt3000_cf.c
head/sys/mips/cavium/octeon_machdep.c
head/sys/mips/cavium/octeon_pcmap_regs.h
head/sys/mips/cavium/uart_dev_oct16550.c
Modified: head/sys/contrib/octeon-sdk/cvmx-ebt3000.c
==============================================================================
--- head/sys/contrib/octeon-sdk/cvmx-ebt3000.c Mon Oct 29 00:17:12 2012
(r242272)
+++ head/sys/contrib/octeon-sdk/cvmx-ebt3000.c Mon Oct 29 00:51:53 2012
(r242273)
@@ -52,15 +52,18 @@
*
*/
+#if !defined(__FreeBSD__) || !defined(_KERNEL)
#include "cvmx-config.h"
+#endif
#include "cvmx.h"
+#include "cvmx-ebt3000.h"
#include "cvmx-sysinfo.h"
void ebt3000_char_write(int char_position, char val)
{
/* Note: phys_to_ptr won't work here, as we are most likely going to
access the boot bus. */
- void *led_base = CASTPTR(void, CVMX_ADD_SEG32(CVMX_MIPS32_SPACE_KSEG0,
cvmx_sysinfo_get()->led_display_base_addr));
+ char *led_base = CASTPTR(char , CVMX_ADD_SEG32(CVMX_MIPS32_SPACE_KSEG0,
cvmx_sysinfo_get()->led_display_base_addr));
if (!led_base)
return;
if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
cvmx_sysinfo_get()->board_rev_major == 1)
@@ -82,10 +85,10 @@ void ebt3000_char_write(int char_positio
void ebt3000_str_write(const char *str)
{
/* Note: phys_to_ptr won't work here, as we are most likely going to
access the boot bus. */
- void *led_base;
+ char *led_base;
if (!cvmx_sysinfo_get()->led_display_base_addr)
return;
- led_base = CASTPTR(void, CVMX_ADD_SEG32(CVMX_MIPS32_SPACE_KSEG0,
cvmx_sysinfo_get()->led_display_base_addr));
+ led_base = CASTPTR(char, CVMX_ADD_SEG32(CVMX_MIPS32_SPACE_KSEG0,
cvmx_sysinfo_get()->led_display_base_addr));
if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
cvmx_sysinfo_get()->board_rev_major == 1)
{
char *ptr = (char *)(led_base + 4);
Modified: head/sys/mips/cavium/files.octeon1
==============================================================================
--- head/sys/mips/cavium/files.octeon1 Mon Oct 29 00:17:12 2012
(r242272)
+++ head/sys/mips/cavium/files.octeon1 Mon Oct 29 00:51:53 2012
(r242273)
@@ -58,6 +58,7 @@ mips/cavium/octeon_gpio.c optional gpi
contrib/octeon-sdk/cvmx-cmd-queue.c standard
contrib/octeon-sdk/cvmx-bootmem.c standard
contrib/octeon-sdk/cvmx-clock.c standard
+contrib/octeon-sdk/cvmx-ebt3000.c standard
contrib/octeon-sdk/cvmx-fpa.c standard
contrib/octeon-sdk/cvmx-helper.c standard
contrib/octeon-sdk/cvmx-helper-board.c standard
Modified: head/sys/mips/cavium/octeon_ebt3000_cf.c
==============================================================================
--- head/sys/mips/cavium/octeon_ebt3000_cf.c Mon Oct 29 00:17:12 2012
(r242272)
+++ head/sys/mips/cavium/octeon_ebt3000_cf.c Mon Oct 29 00:51:53 2012
(r242273)
@@ -326,15 +326,10 @@ static int cf_cmd_read (uint32_t nr_sect
uint8_t *ptr_8;
int error;
-//#define OCTEON_VISUAL_CF_0 1
-#ifdef OCTEON_VISUAL_CF_0
- octeon_led_write_char(0, 'R');
-#endif
ptr_8 = (uint8_t*)buf;
ptr_16 = (uint16_t*)buf;
lba = start_sector;
-
while (nr_sectors--) {
error = cf_send_cmd(lba, CMD_READ_SECTOR);
if (error != 0) {
@@ -366,9 +361,6 @@ static int cf_cmd_read (uint32_t nr_sect
lba++;
}
-#ifdef OCTEON_VISUAL_CF_0
- octeon_led_write_char(0, ' ');
-#endif
return (0);
}
@@ -387,10 +379,6 @@ static int cf_cmd_write (uint32_t nr_sec
uint8_t *ptr_8;
int error;
-//#define OCTEON_VISUAL_CF_1 1
-#ifdef OCTEON_VISUAL_CF_1
- octeon_led_write_char(1, 'W');
-#endif
lba = start_sector;
ptr_8 = (uint8_t*)buf;
ptr_16 = (uint16_t*)buf;
@@ -425,9 +413,6 @@ static int cf_cmd_write (uint32_t nr_sec
lba++;
}
-#ifdef OCTEON_VISUAL_CF_1
- octeon_led_write_char(1, ' ');
-#endif
return (0);
}
@@ -543,13 +528,6 @@ static int cf_wait_busy (void)
{
uint8_t status;
-//#define OCTEON_VISUAL_CF_2 1
-#ifdef OCTEON_VISUAL_CF_2
- static int where0 = 0;
-
- octeon_led_run_wheel(&where0, 2);
-#endif
-
switch (bus_type)
{
case CF_8:
@@ -585,9 +563,6 @@ static int cf_wait_busy (void)
return (ENXIO);
}
-#ifdef OCTEON_VISUAL_CF_2
- octeon_led_write_char(2, ' ');
-#endif
return (0);
}
Modified: head/sys/mips/cavium/octeon_machdep.c
==============================================================================
--- head/sys/mips/cavium/octeon_machdep.c Mon Oct 29 00:17:12 2012
(r242272)
+++ head/sys/mips/cavium/octeon_machdep.c Mon Oct 29 00:51:53 2012
(r242273)
@@ -74,6 +74,7 @@ __FBSDID("$FreeBSD$");
#include <contrib/octeon-sdk/cvmx.h>
#include <contrib/octeon-sdk/cvmx-bootmem.h>
+#include <contrib/octeon-sdk/cvmx-ebt3000.h>
#include <contrib/octeon-sdk/cvmx-interrupt.h>
#include <contrib/octeon-sdk/cvmx-version.h>
@@ -159,88 +160,6 @@ platform_reset(void)
cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
}
-void
-octeon_led_write_char(int char_position, char val)
-{
- uint64_t ptr = (OCTEON_CHAR_LED_BASE_ADDR | 0xf8);
-
- if (octeon_is_simulation())
- return;
-
- char_position &= 0x7; /* only 8 chars */
- ptr += char_position;
- oct_write8_x8(ptr, val);
-}
-
-void
-octeon_led_write_char0(char val)
-{
- uint64_t ptr = (OCTEON_CHAR_LED_BASE_ADDR | 0xf8);
-
- if (octeon_is_simulation())
- return;
- oct_write8_x8(ptr, val);
-}
-
-void
-octeon_led_write_hexchar(int char_position, char hexval)
-{
- uint64_t ptr = (OCTEON_CHAR_LED_BASE_ADDR | 0xf8);
- char char1, char2;
-
- if (octeon_is_simulation())
- return;
-
- char1 = (hexval >> 4) & 0x0f; char1 = (char1 < 10)?char1+'0':char1+'7';
- char2 = (hexval & 0x0f); char2 = (char2 < 10)?char2+'0':char2+'7';
- char_position &= 0x7; /* only 8 chars */
- if (char_position > 6)
- char_position = 6;
- ptr += char_position;
- oct_write8_x8(ptr, char1);
- ptr++;
- oct_write8_x8(ptr, char2);
-}
-
-void
-octeon_led_write_string(const char *str)
-{
- uint64_t ptr = (OCTEON_CHAR_LED_BASE_ADDR | 0xf8);
- int i;
-
- if (octeon_is_simulation())
- return;
-
- for (i=0; i<8; i++, ptr++) {
- if (str && *str)
- oct_write8_x8(ptr, *str++);
- else
- oct_write8_x8(ptr, ' ');
- (void)cvmx_read_csr(CVMX_MIO_BOOT_BIST_STAT);
- }
-}
-
-static char progress[8] = { '-', '/', '|', '\\', '-', '/', '|', '\\'};
-
-void
-octeon_led_run_wheel(int *prog_count, int led_position)
-{
- if (octeon_is_simulation())
- return;
- octeon_led_write_char(led_position, progress[*prog_count]);
- *prog_count += 1;
- *prog_count &= 0x7;
-}
-
-void
-octeon_led_write_hex(uint32_t wl)
-{
- char nbuf[80];
-
- sprintf(nbuf, "%X", wl);
- octeon_led_write_string(nbuf);
-}
-
/*
* octeon_debug_symbol
*
@@ -600,6 +519,7 @@ octeon_process_app_desc_ver_6(void)
cvmx_sysinfo_get()->compact_flash_attribute_base_addr =
octeon_bootinfo->compact_flash_attribute_base_addr;
cvmx_sysinfo_get()->core_mask = octeon_bootinfo->core_mask;
+ cvmx_sysinfo_get()->led_display_base_addr =
octeon_bootinfo->led_display_base_addr;
}
static void
@@ -616,6 +536,18 @@ octeon_boot_params_init(register_t ptr)
KASSERT(octeon_bootinfo != NULL, ("octeon_bootinfo should be set"));
+ if (cvmx_sysinfo_get()->led_display_base_addr != 0) {
+ /*
+ * Revision 1.x of the EBT3000 only supports 4 characters, but
+ * other devices support 8.
+ */
+ if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
+ cvmx_sysinfo_get()->board_rev_major == 1)
+ ebt3000_str_write("FBSD");
+ else
+ ebt3000_str_write("FreeBSD!");
+ }
+
if (cvmx_sysinfo_get()->phy_mem_desc_addr == (uint64_t)0)
panic("Your boot loader did not supply a memory descriptor.");
cvmx_bootmem_init(cvmx_sysinfo_get()->phy_mem_desc_addr);
Modified: head/sys/mips/cavium/octeon_pcmap_regs.h
==============================================================================
--- head/sys/mips/cavium/octeon_pcmap_regs.h Mon Oct 29 00:17:12 2012
(r242272)
+++ head/sys/mips/cavium/octeon_pcmap_regs.h Mon Oct 29 00:51:53 2012
(r242273)
@@ -54,7 +54,6 @@
#if defined(__mips_n64)
#define oct_write64(a, v) (*(volatile uint64_t *)(a) =
(uint64_t)(v))
-#define oct_write8_x8(a, v) (*(volatile uint8_t *)(a) =
(uint8_t)(v))
#define OCT_READ(n, t)
\
static inline t oct_read ## n(uintptr_t a) \
@@ -63,9 +62,6 @@ static inline t oct_read ## n(uintptr_t
return (*p); \
}
-OCT_READ(8, uint8_t);
-OCT_READ(16, uint16_t);
-OCT_READ(32, uint32_t);
OCT_READ(64, uint64_t);
#elif defined(__mips_n32) || defined(__mips_o32)
@@ -81,17 +77,6 @@ static inline void oct_write64 (uint64_t
: "r"(val64), "r"(csr_addr));
}
-static inline void oct_write8_x8 (uint64_t csr_addr, uint8_t val8)
-{
- __asm __volatile (
- ".set push\n"
- ".set mips64\n"
- "sb %0, 0(%1)\n"
- ".set pop\n"
- :
- : "r"(val8), "r"(csr_addr));
-}
-
#define OCT_READ(n, t, insn)
\
static inline t oct_read ## n(uint64_t a) \
{ \
@@ -107,9 +92,6 @@ static inline t oct_read ## n(uint64_t a
return ((t)tmp); \
}
-OCT_READ(8, uint8_t, "lb");
-OCT_READ(16, uint16_t, "lh");
-OCT_READ(32, uint32_t, "lw");
OCT_READ(64, uint64_t, "ld");
#else
@@ -158,66 +140,6 @@ static inline void oct_write64 (uint64_t
intr_restore(sr);
}
-static inline void oct_write8_x8 (uint64_t csr_addr, uint8_t val8)
-{
- uint32_t csr_addrh = csr_addr >> 32;
- uint32_t csr_addrl = csr_addr;
- uint32_t tmp1;
- uint32_t tmp2;
- register_t sr;
-
- sr = intr_disable();
-
- __asm __volatile (
- ".set push\n"
- ".set mips64\n"
- ".set noreorder\n"
- ".set noat\n"
- "dsll %0, %3, 32\n"
- "dsll %1, %4, 32\n"
- "dsrl %1, %1, 32\n"
- "or %0, %0, %1\n"
- "sb %2, 0(%0)\n"
- ".set pop\n"
- : "=&r" (tmp1), "=&r" (tmp2)
- : "r" (val8), "r" (csr_addrh), "r" (csr_addrl));
-
- intr_restore(sr);
-}
-
-#define OCT_READ(n, t, insn)
\
-static inline t oct_read ## n(uint64_t csr_addr) \
-{ \
- uint32_t csr_addrh = csr_addr >> 32; \
- uint32_t csr_addrl = csr_addr; \
- uint32_t tmp1, tmp2; \
- register_t sr; \
- \
- sr = intr_disable(); \
- \
- __asm __volatile ( \
- ".set push\n" \
- ".set mips64\n" \
- ".set noreorder\n" \
- ".set noat\n" \
- "dsll %1, %2, 32\n" \
- "dsll %0, %3, 32\n" \
- "dsrl %0, %0, 32\n" \
- "or %1, %1, %0\n" \
- "lb %1, 0(%1)\n" \
- ".set pop\n" \
- : "=&r" (tmp1), "=&r" (tmp2) \
- : "r" (csr_addrh), "r" (csr_addrl)); \
- \
- intr_restore(sr); \
- \
- return ((t)tmp2); \
-}
-
-OCT_READ(8, uint8_t, "lb");
-OCT_READ(16, uint16_t, "lh");
-OCT_READ(32, uint32_t, "lw");
-
static inline uint64_t oct_read64 (uint64_t csr_addr)
{
uint32_t csr_addrh = csr_addr >> 32;
@@ -253,51 +175,18 @@ static inline uint64_t oct_read64 (uint6
#endif
-#define oct_write64_int64(a, v) (oct_write64(a, (int64_t)(v)))
-
-/*
- * Most write bus transactions are actually 64-bit on Octeon.
- */
-static inline void oct_write8 (uint64_t csr_addr, uint8_t val8)
-{
- oct_write64(csr_addr, (uint64_t) val8);
-}
-
-static inline void oct_write16 (uint64_t csr_addr, uint16_t val16)
-{
- oct_write64(csr_addr, (uint64_t) val16);
-}
-
-static inline void oct_write32 (uint64_t csr_addr, uint32_t val32)
-{
- oct_write64(csr_addr, (uint64_t) val32);
-}
-
-#define oct_readint32(a) ((int32_t)oct_read32((a)))
-
/*
* octeon_machdep.c
*
* Direct to Board Support level.
*/
-extern void octeon_led_write_char(int char_position, char val);
-extern void octeon_led_write_hexchar(int char_position, char hexval);
-extern void octeon_led_write_hex(uint32_t wl);
-extern void octeon_led_write_string(const char *str);
extern void octeon_reset(void);
-extern void octeon_led_write_char0(char val);
-extern void octeon_led_run_wheel(int *pos, int led_position);
extern void octeon_debug_symbol(void);
extern void octeon_ciu_reset(void);
extern int octeon_is_simulation(void);
#endif /* LOCORE */
/*
- * EBT3000 LED Unit
- */
-#define OCTEON_CHAR_LED_BASE_ADDR (0x1d020000 | (0x1ffffffffull << 31))
-
-/*
* Default FLASH device (physical) base address
*/
#define OCTEON_FLASH_BASE_ADDR (0x1d040000ull)
Modified: head/sys/mips/cavium/uart_dev_oct16550.c
==============================================================================
--- head/sys/mips/cavium/uart_dev_oct16550.c Mon Oct 29 00:17:12 2012
(r242272)
+++ head/sys/mips/cavium/uart_dev_oct16550.c Mon Oct 29 00:51:53 2012
(r242273)
@@ -632,13 +632,6 @@ oct16550_bus_ipend(struct uart_softc *sc
}
uart_unlock(sc->sc_hwmtx);
-//#define OCTEON_VISUAL_UART 1
-#ifdef OCTEON_VISUAL_UART
- static int where1 = 0;
-
- if (ipend) octeon_led_run_wheel(&where1, 6 +
device_get_unit(sc->sc_dev));
-#endif
-
return (ipend);
}
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