Author: yongari
Date: Wed Feb 15 03:48:22 2012
New Revision: 231731
URL: http://svn.freebsd.org/changeset/base/231731
Log:
MFC r230336:
Fix a logic error which resulted in putting PHY into sleep when WOL
is active. If WOL is active driver should not put PHY into sleep.
This change makes WOL work on RTL8168E.
Modified:
stable/9/sys/dev/re/if_re.c
Directory Properties:
stable/9/sys/ (props changed)
stable/9/sys/amd64/include/xen/ (props changed)
stable/9/sys/boot/ (props changed)
stable/9/sys/boot/i386/efi/ (props changed)
stable/9/sys/boot/ia64/efi/ (props changed)
stable/9/sys/boot/ia64/ski/ (props changed)
stable/9/sys/boot/powerpc/boot1.chrp/ (props changed)
stable/9/sys/boot/powerpc/ofw/ (props changed)
stable/9/sys/cddl/contrib/opensolaris/ (props changed)
stable/9/sys/conf/ (props changed)
stable/9/sys/contrib/dev/acpica/ (props changed)
stable/9/sys/contrib/octeon-sdk/ (props changed)
stable/9/sys/contrib/pf/ (props changed)
stable/9/sys/contrib/x86emu/ (props changed)
Modified: stable/9/sys/dev/re/if_re.c
==============================================================================
--- stable/9/sys/dev/re/if_re.c Wed Feb 15 03:43:46 2012 (r231730)
+++ stable/9/sys/dev/re/if_re.c Wed Feb 15 03:48:22 2012 (r231731)
@@ -3765,7 +3765,7 @@ re_setwol(struct rl_softc *sc)
/* Config register write done. */
CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
- if ((ifp->if_capenable & IFCAP_WOL) != 0 &&
+ if ((ifp->if_capenable & IFCAP_WOL) == 0 &&
(sc->rl_flags & RL_FLAG_PHYWAKE_PM) != 0)
CSR_WRITE_1(sc, RL_PMCH, CSR_READ_1(sc, RL_PMCH) & ~0x80);
/*
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