Author: yongari
Date: Wed Feb 15 03:35:39 2012
New Revision: 231727
URL: http://svn.freebsd.org/changeset/base/231727
Log:
MFC r229940:
style. No functional changes.
Modified:
stable/7/sys/dev/et/if_et.c
Directory Properties:
stable/7/sys/ (props changed)
stable/7/sys/cddl/contrib/opensolaris/ (props changed)
stable/7/sys/contrib/dev/acpica/ (props changed)
stable/7/sys/contrib/pf/ (props changed)
Modified: stable/7/sys/dev/et/if_et.c
==============================================================================
--- stable/7/sys/dev/et/if_et.c Wed Feb 15 03:34:44 2012 (r231726)
+++ stable/7/sys/dev/et/if_et.c Wed Feb 15 03:35:39 2012 (r231727)
@@ -367,8 +367,9 @@ fail:
static int
et_detach(device_t dev)
{
- struct et_softc *sc = device_get_softc(dev);
+ struct et_softc *sc;
+ sc = device_get_softc(dev);
if (device_is_attached(dev)) {
ether_ifdetach(sc->ifp);
ET_LOCK(sc);
@@ -405,8 +406,9 @@ et_detach(device_t dev)
static int
et_shutdown(device_t dev)
{
- struct et_softc *sc = device_get_softc(dev);
+ struct et_softc *sc;
+ sc = device_get_softc(dev);
ET_LOCK(sc);
et_stop(sc);
ET_UNLOCK(sc);
@@ -416,10 +418,11 @@ et_shutdown(device_t dev)
static int
et_miibus_readreg(device_t dev, int phy, int reg)
{
- struct et_softc *sc = device_get_softc(dev);
+ struct et_softc *sc;
uint32_t val;
int i, ret;
+ sc = device_get_softc(dev);
/* Stop any pending operations */
CSR_WRITE_4(sc, ET_MII_CMD, 0);
@@ -459,10 +462,11 @@ back:
static int
et_miibus_writereg(device_t dev, int phy, int reg, int val0)
{
- struct et_softc *sc = device_get_softc(dev);
+ struct et_softc *sc;
uint32_t val;
int i;
+ sc = device_get_softc(dev);
/* Stop any pending operations */
CSR_WRITE_4(sc, ET_MII_CMD, 0);
@@ -597,10 +601,12 @@ et_miibus_statchg(device_t dev)
static int
et_ifmedia_upd_locked(struct ifnet *ifp)
{
- struct et_softc *sc = ifp->if_softc;
- struct mii_data *mii = device_get_softc(sc->sc_miibus);
+ struct et_softc *sc;
+ struct mii_data *mii;
struct mii_softc *miisc;
+ sc = ifp->if_softc;
+ mii = device_get_softc(sc->sc_miibus);
LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
mii_phy_reset(miisc);
return (mii_mediachg(mii));
@@ -609,9 +615,10 @@ et_ifmedia_upd_locked(struct ifnet *ifp)
static int
et_ifmedia_upd(struct ifnet *ifp)
{
- struct et_softc *sc = ifp->if_softc;
+ struct et_softc *sc;
int res;
+ sc = ifp->if_softc;
ET_LOCK(sc);
res = et_ifmedia_upd_locked(ifp);
ET_UNLOCK(sc);
@@ -642,10 +649,11 @@ et_ifmedia_sts(struct ifnet *ifp, struct
static void
et_stop(struct et_softc *sc)
{
- struct ifnet *ifp = sc->ifp;
+ struct ifnet *ifp;
ET_LOCK_ASSERT(sc);
+ ifp = sc->ifp;
callout_stop(&sc->sc_tick);
/* Disable interrupts. */
CSR_WRITE_4(sc, ET_INTR_MASK, 0xffffffff);
@@ -761,6 +769,7 @@ et_get_eaddr(device_t dev, uint8_t eaddr
static void
et_reset(struct et_softc *sc)
{
+
CSR_WRITE_4(sc, ET_MAC_CFG1,
ET_MAC_CFG1_RST_TXFUNC | ET_MAC_CFG1_RST_RXFUNC |
ET_MAC_CFG1_RST_TXMC | ET_MAC_CFG1_RST_RXMC |
@@ -1167,10 +1176,11 @@ et_chip_attach(struct et_softc *sc)
static void
et_intr(void *xsc)
{
- struct et_softc *sc = xsc;
+ struct et_softc *sc;
struct ifnet *ifp;
uint32_t status;
+ sc = xsc;
ET_LOCK(sc);
ifp = sc->ifp;
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
@@ -1272,10 +1282,14 @@ et_init(void *xsc)
static int
et_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
{
- struct et_softc *sc = ifp->if_softc;
- struct mii_data *mii = device_get_softc(sc->sc_miibus);
- struct ifreq *ifr = (struct ifreq *)data;
- int error = 0, mask, max_framelen;
+ struct et_softc *sc;
+ struct mii_data *mii;
+ struct ifreq *ifr;
+ int error, mask, max_framelen;
+
+ sc = ifp->if_softc;
+ ifr = (struct ifreq *)data;
+ error = 0;
/* XXX LOCKSUSED */
switch (cmd) {
@@ -1299,6 +1313,7 @@ et_ioctl(struct ifnet *ifp, u_long cmd,
case SIOCSIFMEDIA:
case SIOCGIFMEDIA:
+ mii = device_get_softc(sc->sc_miibus);
error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, cmd);
break;
@@ -1428,8 +1443,9 @@ et_start_locked(struct ifnet *ifp)
static void
et_start(struct ifnet *ifp)
{
- struct et_softc *sc = ifp->if_softc;
+ struct et_softc *sc;
+ sc = ifp->if_softc;
ET_LOCK(sc);
et_start_locked(ifp);
ET_UNLOCK(sc);
@@ -1460,6 +1476,7 @@ et_watchdog(struct et_softc *sc)
static int
et_stop_rxdma(struct et_softc *sc)
{
+
CSR_WRITE_4(sc, ET_RXDMA_CTRL,
ET_RXDMA_CTRL_HALT | ET_RXDMA_CTRL_RING1_ENABLE);
@@ -1474,6 +1491,7 @@ et_stop_rxdma(struct et_softc *sc)
static int
et_stop_txdma(struct et_softc *sc)
{
+
CSR_WRITE_4(sc, ET_TXDMA_CTRL,
ET_TXDMA_CTRL_HALT | ET_TXDMA_CTRL_SINGLE_EPKT);
return (0);
@@ -1602,10 +1620,11 @@ back:
static int
et_chip_init(struct et_softc *sc)
{
- struct ifnet *ifp = sc->ifp;
+ struct ifnet *ifp;
uint32_t rxq_end;
int error, frame_len, rxmem_size;
+ ifp = sc->ifp;
/*
* Split 16Kbytes internal memory between TX and RX
* according to frame length.
@@ -1720,8 +1739,8 @@ et_init_rx_ring(struct et_softc *sc)
static int
et_init_rxdma(struct et_softc *sc)
{
- struct et_rxstatus_data *rxsd = &sc->sc_rx_status;
- struct et_rxstat_ring *rxst_ring = &sc->sc_rxstat_ring;
+ struct et_rxstatus_data *rxsd;
+ struct et_rxstat_ring *rxst_ring;
struct et_rxdesc_ring *rx_ring;
int error;
@@ -1734,12 +1753,14 @@ et_init_rxdma(struct et_softc *sc)
/*
* Install RX status
*/
+ rxsd = &sc->sc_rx_status;
CSR_WRITE_4(sc, ET_RX_STATUS_HI, ET_ADDR_HI(rxsd->rxsd_paddr));
CSR_WRITE_4(sc, ET_RX_STATUS_LO, ET_ADDR_LO(rxsd->rxsd_paddr));
/*
* Install RX stat ring
*/
+ rxst_ring = &sc->sc_rxstat_ring;
CSR_WRITE_4(sc, ET_RXSTAT_HI, ET_ADDR_HI(rxst_ring->rsr_paddr));
CSR_WRITE_4(sc, ET_RXSTAT_LO, ET_ADDR_LO(rxst_ring->rsr_paddr));
CSR_WRITE_4(sc, ET_RXSTAT_CNT, ET_RX_NSTAT - 1);
@@ -1790,8 +1811,8 @@ et_init_rxdma(struct et_softc *sc)
static int
et_init_txdma(struct et_softc *sc)
{
- struct et_txdesc_ring *tx_ring = &sc->sc_tx_ring;
- struct et_txstatus_data *txsd = &sc->sc_tx_status;
+ struct et_txdesc_ring *tx_ring;
+ struct et_txstatus_data *txsd;
int error;
error = et_stop_txdma(sc);
@@ -1803,6 +1824,7 @@ et_init_txdma(struct et_softc *sc)
/*
* Install TX descriptor ring
*/
+ tx_ring = &sc->sc_tx_ring;
CSR_WRITE_4(sc, ET_TX_RING_HI, ET_ADDR_HI(tx_ring->tr_paddr));
CSR_WRITE_4(sc, ET_TX_RING_LO, ET_ADDR_LO(tx_ring->tr_paddr));
CSR_WRITE_4(sc, ET_TX_RING_CNT, ET_TX_NDESC - 1);
@@ -1810,6 +1832,7 @@ et_init_txdma(struct et_softc *sc)
/*
* Install TX status
*/
+ txsd = &sc->sc_tx_status;
CSR_WRITE_4(sc, ET_TX_STATUS_HI, ET_ADDR_HI(txsd->txsd_paddr));
CSR_WRITE_4(sc, ET_TX_STATUS_LO, ET_ADDR_LO(txsd->txsd_paddr));
@@ -1825,8 +1848,8 @@ et_init_txdma(struct et_softc *sc)
static void
et_init_mac(struct et_softc *sc)
{
- struct ifnet *ifp = sc->ifp;
- const uint8_t *eaddr = IF_LLADDR(ifp);
+ struct ifnet *ifp;
+ const uint8_t *eaddr;
uint32_t val;
/* Reset MAC */
@@ -1862,6 +1885,8 @@ et_init_mac(struct et_softc *sc)
/*
* Set MAC address
*/
+ ifp = sc->ifp;
+ eaddr = IF_LLADDR(ifp);
val = eaddr[2] | (eaddr[3] << 8) | (eaddr[4] << 16) | (eaddr[5] << 24);
CSR_WRITE_4(sc, ET_MAC_ADDR1, val);
val = (eaddr[0] << 16) | (eaddr[1] << 24);
@@ -1877,8 +1902,8 @@ et_init_mac(struct et_softc *sc)
static void
et_init_rxmac(struct et_softc *sc)
{
- struct ifnet *ifp = sc->ifp;
- const uint8_t *eaddr = IF_LLADDR(ifp);
+ struct ifnet *ifp;
+ const uint8_t *eaddr;
uint32_t val;
int i;
@@ -1896,6 +1921,8 @@ et_init_rxmac(struct et_softc *sc)
/*
* Set WOL source address. XXX is this necessary?
*/
+ ifp = sc->ifp;
+ eaddr = IF_LLADDR(ifp);
val = (eaddr[2] << 24) | (eaddr[3] << 16) | (eaddr[4] << 8) | eaddr[5];
CSR_WRITE_4(sc, ET_WOL_SA_LO, val);
val = (eaddr[0] << 8) | eaddr[1];
@@ -1962,6 +1989,7 @@ et_init_rxmac(struct et_softc *sc)
static void
et_init_txmac(struct et_softc *sc)
{
+
/* Disable TX MAC and FC(?) */
CSR_WRITE_4(sc, ET_TXMAC_CTRL, ET_TXMAC_CTRL_FC_DISABLE);
@@ -1980,12 +2008,12 @@ et_init_txmac(struct et_softc *sc)
static int
et_start_rxdma(struct et_softc *sc)
{
- uint32_t val = 0;
+ uint32_t val;
- val |= (sc->sc_rx_data[0].rbd_bufsize & ET_RXDMA_CTRL_RING0_SIZE_MASK) |
- ET_RXDMA_CTRL_RING0_ENABLE;
+ val = (sc->sc_rx_data[0].rbd_bufsize & ET_RXDMA_CTRL_RING0_SIZE_MASK) |
+ ET_RXDMA_CTRL_RING0_ENABLE;
val |= (sc->sc_rx_data[1].rbd_bufsize & ET_RXDMA_CTRL_RING1_SIZE_MASK) |
- ET_RXDMA_CTRL_RING1_ENABLE;
+ ET_RXDMA_CTRL_RING1_ENABLE;
CSR_WRITE_4(sc, ET_RXDMA_CTRL, val);
@@ -2001,6 +2029,7 @@ et_start_rxdma(struct et_softc *sc)
static int
et_start_txdma(struct et_softc *sc)
{
+
CSR_WRITE_4(sc, ET_TXDMA_CTRL, ET_TXDMA_CTRL_SINGLE_EPKT);
return (0);
}
@@ -2278,10 +2307,11 @@ et_txeof(struct et_softc *sc)
static void
et_tick(void *xsc)
{
- struct et_softc *sc = xsc;
+ struct et_softc *sc;
struct ifnet *ifp;
struct mii_data *mii;
+ sc = xsc;
ET_LOCK_ASSERT(sc);
ifp = sc->ifp;
mii = device_get_softc(sc->sc_miibus);
@@ -2543,10 +2573,12 @@ et_add_sysctls(struct et_softc * sc)
static int
et_sysctl_rx_intr_npkts(SYSCTL_HANDLER_ARGS)
{
- struct et_softc *sc = arg1;
- struct ifnet *ifp = sc->ifp;
- int error = 0, v;
+ struct et_softc *sc;
+ struct ifnet *ifp;
+ int error, v;
+ sc = arg1;
+ ifp = sc->ifp;
v = sc->sc_rx_intr_npkts;
error = sysctl_handle_int(oidp, &v, 0, req);
if (error || req->newptr == NULL)
@@ -2568,10 +2600,12 @@ back:
static int
et_sysctl_rx_intr_delay(SYSCTL_HANDLER_ARGS)
{
- struct et_softc *sc = arg1;
- struct ifnet *ifp = sc->ifp;
- int error = 0, v;
+ struct et_softc *sc;
+ struct ifnet *ifp;
+ int error, v;
+ sc = arg1;
+ ifp = sc->ifp;
v = sc->sc_rx_intr_delay;
error = sysctl_handle_int(oidp, &v, 0, req);
if (error || req->newptr == NULL)
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