Author: raj
Date: Thu Dec 15 12:14:15 2011
New Revision: 228530
URL: http://svn.freebsd.org/changeset/base/228530
Log:
ARM pmap fixes:
- Write Buffers have to be drained after write to Page Table even if caches
are in write-through mode.
- Make sure to sync PTE in pmap_zero_page_generic().
Submitted by: Michal Mazur
Reviewed by: cognet
Obtained from: Semihalf
MFC after: 1 month
Modified:
head/sys/arm/arm/pmap.c
head/sys/arm/include/pmap.h
Modified: head/sys/arm/arm/pmap.c
==============================================================================
--- head/sys/arm/arm/pmap.c Thu Dec 15 11:21:56 2011 (r228529)
+++ head/sys/arm/arm/pmap.c Thu Dec 15 12:14:15 2011 (r228530)
@@ -4039,6 +4039,7 @@ pmap_zero_page_generic(vm_paddr_t phys,
* order to work without corruption when write-allocate is enabled.
*/
*cdst_pte = L2_S_PROTO | phys | L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE);
+ PTE_SYNC(cdst_pte);
cpu_tlb_flushD_SE(cdstp);
cpu_cpwait();
if (off || size != PAGE_SIZE)
Modified: head/sys/arm/include/pmap.h
==============================================================================
--- head/sys/arm/include/pmap.h Thu Dec 15 11:21:56 2011 (r228529)
+++ head/sys/arm/include/pmap.h Thu Dec 15 12:14:15 2011 (r228530)
@@ -382,7 +382,8 @@ do {
\
if (PMAP_NEEDS_PTE_SYNC) { \
cpu_dcache_wb_range((vm_offset_t)(pte), sizeof(pt_entry_t));\
cpu_l2cache_wb_range((vm_offset_t)(pte), sizeof(pt_entry_t));\
- }\
+ } else \
+ cpu_drain_writebuf(); \
} while (/*CONSTCOND*/0)
#define PTE_SYNC_RANGE(pte, cnt)
\
@@ -392,7 +393,8 @@ do {
\
(cnt) << 2); /* * sizeof(pt_entry_t) */ \
cpu_l2cache_wb_range((vm_offset_t)(pte), \
(cnt) << 2); /* * sizeof(pt_entry_t) */ \
- } \
+ } else \
+ cpu_drain_writebuf(); \
} while (/*CONSTCOND*/0)
extern pt_entry_t pte_l1_s_cache_mode;
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