Author: marius
Date: Sat Oct 15 09:29:43 2011
New Revision: 226381
URL: http://svn.freebsd.org/changeset/base/226381

Log:
  Merge from NetBSD:
  - Remove clause 3 and 4 from TNF licenses.
  - Fix memset usage.
  - Various cleanup.
  - Kill caddr_t.

Modified:
  head/sys/dev/esp/esp_sbus.c
  head/sys/dev/esp/ncr53c9x.c
  head/sys/dev/esp/ncr53c9xreg.h
  head/sys/dev/esp/ncr53c9xvar.h
  head/sys/sparc64/sbus/lsi64854.c
  head/sys/sparc64/sbus/lsi64854var.h

Modified: head/sys/dev/esp/esp_sbus.c
==============================================================================
--- head/sys/dev/esp/esp_sbus.c Sat Oct 15 07:00:28 2011        (r226380)
+++ head/sys/dev/esp/esp_sbus.c Sat Oct 15 09:29:43 2011        (r226381)
@@ -26,7 +26,7 @@
  *
  */
 
-/*     $NetBSD: esp_sbus.c,v 1.31 2005/02/27 00:27:48 perry Exp $      */
+/*     $NetBSD: esp_sbus.c,v 1.51 2009/09/17 16:28:12 tsutsui Exp $    */
 
 /*-
  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -44,13 +44,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *     This product includes software developed by the NetBSD
- *     Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -158,12 +151,12 @@ MODULE_DEPEND(esp, sbus, 1, 1, 1);
 /*
  * Functions and the switch for the MI code
  */
-static u_char  esp_read_reg(struct ncr53c9x_softc *sc, int reg);
-static void    esp_write_reg(struct ncr53c9x_softc *sc, int reg, u_char v);
+static uint8_t esp_read_reg(struct ncr53c9x_softc *sc, int reg);
+static void    esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t v);
 static int     esp_dma_isintr(struct ncr53c9x_softc *sc);
 static void    esp_dma_reset(struct ncr53c9x_softc *sc);
 static int     esp_dma_intr(struct ncr53c9x_softc *sc);
-static int     esp_dma_setup(struct ncr53c9x_softc *sc, caddr_t *addr,
+static int     esp_dma_setup(struct ncr53c9x_softc *sc, void **addr,
                    size_t *len, int datain, size_t *dmasize);
 static void    esp_dma_go(struct ncr53c9x_softc *sc);
 static void    esp_dma_stop(struct ncr53c9x_softc *sc);
@@ -172,7 +165,7 @@ static int  espattach(struct esp_softc *e
                    const struct ncr53c9x_glue *gluep);
 static int     espdetach(struct esp_softc *esc);
 
-static const struct ncr53c9x_glue esp_sbus_glue = {
+static const struct ncr53c9x_glue const esp_sbus_glue = {
        esp_read_reg,
        esp_write_reg,
        esp_dma_isintr,
@@ -718,9 +711,9 @@ espdetach(struct esp_softc *esc)
 static int esp_sbus_debug = 0;
 
 static const struct {
-       char *r_name;
-       int   r_flag;
-} esp__read_regnames [] = {
+       const char *r_name;
+       int r_flag;
+} const esp__read_regnames [] = {
        { "TCL", 0},                    /* 0/00 */
        { "TCM", 0},                    /* 1/04 */
        { "FIFO", 0},                   /* 2/08 */
@@ -739,10 +732,10 @@ static const struct {
        { "TCX", 1},                    /* f/3c */
 };
 
-static const struct {
-       char *r_name;
-       int   r_flag;
-} esp__write_regnames[] = {
+static const const struct {
+       const char *r_name;
+       int r_flag;
+} const esp__write_regnames[] = {
        { "TCL", 1},                    /* 0/00 */
        { "TCM", 1},                    /* 1/04 */
        { "FIFO", 0},                   /* 2/08 */
@@ -762,11 +755,11 @@ static const struct {
 };
 #endif
 
-static u_char
+static uint8_t
 esp_read_reg(struct ncr53c9x_softc *sc, int reg)
 {
        struct esp_softc *esc = (struct esp_softc *)sc;
-       u_char v;
+       uint8_t v;
 
        v = bus_read_1(esc->sc_res, reg * 4);
 
@@ -780,7 +773,7 @@ esp_read_reg(struct ncr53c9x_softc *sc, 
 }
 
 static void
-esp_write_reg(struct ncr53c9x_softc *sc, int reg, u_char v)
+esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t v)
 {
        struct esp_softc *esc = (struct esp_softc *)sc;
 
@@ -818,8 +811,8 @@ esp_dma_intr(struct ncr53c9x_softc *sc)
 }
 
 static int
-esp_dma_setup(struct ncr53c9x_softc *sc, caddr_t *addr, size_t *len,
-             int datain, size_t *dmasize)
+esp_dma_setup(struct ncr53c9x_softc *sc, void **addr, size_t *len,
+    int datain, size_t *dmasize)
 {
        struct esp_softc *esc = (struct esp_softc *)sc;
 

Modified: head/sys/dev/esp/ncr53c9x.c
==============================================================================
--- head/sys/dev/esp/ncr53c9x.c Sat Oct 15 07:00:28 2011        (r226380)
+++ head/sys/dev/esp/ncr53c9x.c Sat Oct 15 09:29:43 2011        (r226381)
@@ -26,7 +26,7 @@
  *
  */
 
-/*     $NetBSD: ncr53c9x.c,v 1.125 2007/01/09 12:53:12 itohy Exp $     */
+/*     $NetBSD: ncr53c9x.c,v 1.143 2011/07/31 18:39:00 jakllsch Exp $  */
 
 /*-
  * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc.
@@ -43,13 +43,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -133,7 +126,7 @@ __FBSDID("$FreeBSD$");
 MODULE_DEPEND(esp, cam, 1, 1, 1);
 
 #ifdef NCR53C9X_DEBUG
-static int ncr53c9x_debug =
+int ncr53c9x_debug =
     NCR_SHOWMISC /* | NCR_SHOWPHASE | NCR_SHOWTRAC | NCR_SHOWCMDS */;
 #endif
 
@@ -167,7 +160,7 @@ static void ncr53c9x_sched(struct ncr53c
 static void    ncr53c9x_select(struct ncr53c9x_softc *sc,
                    struct ncr53c9x_ecb *ecb);
 static void    ncr53c9x_watch(void *arg);
-static void    ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p,
+static void    ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, uint8_t *p,
                    int len);
 
 static struct ncr53c9x_ecb     *ncr53c9x_get_ecb(struct ncr53c9x_softc *sc);
@@ -187,13 +180,11 @@ static inline int ncr53c9x_stp2cpb(struc
                NCR_WRITE_REG((sc), NCR_TCL, (size));                   \
                NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8);              \
                if ((sc->sc_cfg2 & NCRCFG2_FE) ||                       \
-                   (sc->sc_rev == NCR_VARIANT_FAS366)) {               \
+                   (sc->sc_rev == NCR_VARIANT_FAS366))                 \
                        NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16);     \
-               }                                                       \
-               if (sc->sc_rev == NCR_VARIANT_FAS366) {                 \
+               if (sc->sc_rev == NCR_VARIANT_FAS366)                   \
                        NCR_WRITE_REG(sc, NCR_RCH, 0);                  \
-               }                                                       \
-} while (0)
+} while (/* CONSTCOND */0)
 
 #ifndef mstohz
 #define        mstohz(ms) \
@@ -551,11 +542,10 @@ ncr53c9x_reset(struct ncr53c9x_softc *sc
                NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
 
 #if 0
-       device_printf(sc->sc_dev, "ncr53c9x_reset: revision %d\n",
-           sc->sc_rev);
-       device_printf(sc->sc_dev, "ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, "
-           "cfg3 0x%x, ccf 0x%x, timeout 0x%x\n",
-           sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, sc->sc_ccf, sc->sc_timeout);
+       device_printf(sc->sc_dev, "%s: revision %d\n", __func__, sc->sc_rev);
+       device_printf(sc->sc_dev, "%s: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, ccf "
+           "0x%x, timeout 0x%x\n", __func__, sc->sc_cfg1, sc->sc_cfg2,
+           sc->sc_cfg3, sc->sc_ccf, sc->sc_timeout);
 #endif
 }
 
@@ -573,7 +563,8 @@ ncr53c9x_clear(struct ncr53c9x_softc *sc
        /* Cancel any active commands. */
        sc->sc_state = NCR_CLEANING;
        sc->sc_msgify = 0;
-       if ((ecb = sc->sc_nexus) != NULL) {
+       ecb = sc->sc_nexus;
+       if (ecb != NULL) {
                ecb->ccb->ccb_h.status = result;
                ncr53c9x_done(sc, ecb);
        }
@@ -597,7 +588,8 @@ ncr53c9x_clear_target(struct ncr53c9x_so
 
        /* Cancel outstanding disconnected commands on each LUN. */
        LIST_FOREACH(li, &sc->sc_tinfo[target].luns, link) {
-               if ((ecb = li->untagged) != NULL) {
+               ecb = li->untagged;
+               if (ecb != NULL) {
                        li->untagged = NULL;
                        /*
                         * XXX should we terminate a command
@@ -607,12 +599,14 @@ ncr53c9x_clear_target(struct ncr53c9x_so
                        ecb->ccb->ccb_h.status = result;
                        ncr53c9x_done(sc, ecb);
                }
-               for (i = 0; i < NCR_TAG_DEPTH; i++)
-                       if ((ecb = li->queued[i])) {
+               for (i = 0; i < NCR_TAG_DEPTH; i++) {
+                       ecb = li->queued[i];
+                       if (ecb != NULL) {
                                li->queued[i] = NULL;
                                ecb->ccb->ccb_h.status = result;
                                ncr53c9x_done(sc, ecb);
                        }
+               }
                li->used = 0;
        }
 }
@@ -635,7 +629,7 @@ ncr53c9x_init(struct ncr53c9x_softc *sc,
 
                TAILQ_INIT(&sc->ready_list);
                sc->sc_nexus = NULL;
-               memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
+               memset(sc->sc_tinfo, 0, sizeof(*sc->sc_tinfo));
                for (r = 0; r < sc->sc_ntarg; r++) {
                        LIST_INIT(&sc->sc_tinfo[r].luns);
                }
@@ -751,7 +745,7 @@ ncr53c9x_stp2cpb(struct ncr53c9x_softc *
 static inline void
 ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti)
 {
-       u_char cfg3, syncoff, synctp;
+       uint8_t cfg3, syncoff, synctp;
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
@@ -810,7 +804,7 @@ static void
 ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
 {
        struct ncr53c9x_tinfo *ti;
-       u_char *cmd;
+       uint8_t *cmd;
        size_t dmasize;
        int clen, selatn3, selatns;
        int lun = ecb->ccb->ccb_h.target_lun;
@@ -818,8 +812,8 @@ ncr53c9x_select(struct ncr53c9x_softc *s
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
-           target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
+       NCR_TRACE(("[%s(t%d,l%d,cmd:%x,tag:%x,%x)] ", __func__, target, lun,
+           ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
 
        ti = &sc->sc_tinfo[target];
        sc->sc_state = NCR_SELECTING;
@@ -838,9 +832,8 @@ ncr53c9x_select(struct ncr53c9x_softc *s
                NCRCMD(sc, NCRCMD_FLUSH);
                NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HMEXC32 |
                    NCR_BUSID_HMEENCID);
-       } else {
+       } else
                NCR_WRITE_REG(sc, NCR_SELID, target);
-       }
 
        /*
         * If we are requesting sense, force a renegotiation if we are
@@ -873,7 +866,7 @@ ncr53c9x_select(struct ncr53c9x_softc *s
                selatns = 1;
        }
 
-       cmd = (u_char *)&ecb->cmd.cmd;
+       cmd = (uint8_t *)&ecb->cmd.cmd;
 
        if (selatn3) {
                /* We'll use tags with SELATN3. */
@@ -954,7 +947,7 @@ ncr53c9x_get_ecb(struct ncr53c9x_softc *
        ecb = TAILQ_FIRST(&sc->free_list);
        if (ecb) {
                if (ecb->flags != 0)
-                       panic("ecb flags not cleared\n");
+                       panic("%s: ecb flags not cleared", __func__);
                TAILQ_REMOVE(&sc->free_list, ecb, free_links);
                ecb->flags = ECB_ALLOC;
                bzero(&ecb->ccb, sizeof(struct ncr53c9x_ecb) -
@@ -990,7 +983,7 @@ ncr53c9x_action(struct cam_sim *sim, uni
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("[ncr53c9x_action %d]", ccb->ccb_h.func_code));
+       NCR_TRACE(("[%s %d]", __func__, ccb->ccb_h.func_code));
 
        switch (ccb->ccb_h.func_code) {
        case XPT_RESET_BUS:
@@ -1196,7 +1189,7 @@ ncr53c9x_poll(struct cam_sim *sim)
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("[ncr53c9x_poll] "));
+       NCR_TRACE(("[%s] ", __func__));
 
        if (NCRDMA_ISINTR(sc))
                ncr53c9x_intr1(sc);
@@ -1260,10 +1253,10 @@ ncr53c9x_sched(struct ncr53c9x_softc *sc
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("[ncr53c9x_sched] "));
+       NCR_TRACE(("[%s] ", __func__));
 
        if (sc->sc_state != NCR_IDLE)
-               panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
+               panic("%s: not IDLE (state=%d)", __func__, sc->sc_state);
 
        /*
         * Find first ecb in ready queue that is for a target/lunit
@@ -1288,10 +1281,9 @@ ncr53c9x_sched(struct ncr53c9x_softc *sc
                li = TINFO_LUN(ti, lun);
                if (li == NULL) {
                        /* Initialize LUN info and add to list. */
-                       if ((li = malloc(sizeof(*li),
-                           M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
+                       li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT | M_ZERO);
+                       if (li == NULL)
                                continue;
-                       }
                        li->lun = lun;
 
                        LIST_INSERT_HEAD(&ti->luns, li, link);
@@ -1338,7 +1330,7 @@ ncr53c9x_sched(struct ncr53c9x_softc *sc
                        ncr53c9x_select(sc, ecb);
                        break;
                } else {
-                       NCR_TRACE(("%d:%d busy\n",
+                       NCR_TRACE(("[%s %d:%d busy] \n", __func__,
                            ecb->ccb->ccb_h.target_id,
                            ecb->ccb->ccb_h.target_lun));
                }
@@ -1356,7 +1348,7 @@ ncr53c9x_sense(struct ncr53c9x_softc *sc
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("requesting sense "));
+       NCR_TRACE(("[%s] ", __func__));
 
        lun = ccb->ccb_h.target_lun;
        ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
@@ -1368,7 +1360,7 @@ ncr53c9x_sense(struct ncr53c9x_softc *sc
        ss->length = sizeof(struct scsi_sense_data);
        ecb->clen = sizeof(*ss);
        memset(&ccb->csio.sense_data, 0, sizeof(ccb->csio.sense_data));
-       ecb->daddr = (char *)&ccb->csio.sense_data;
+       ecb->daddr = (uint8_t *)&ccb->csio.sense_data;
        ecb->dleft = sizeof(struct scsi_sense_data);
        ecb->flags |= ECB_SENSE;
        ecb->timeout = NCR_SENSE_TIMEOUT;
@@ -1379,9 +1371,9 @@ ncr53c9x_sense(struct ncr53c9x_softc *sc
        ncr53c9x_dequeue(sc, ecb);
        li->untagged = ecb;     /* Must be executed first to fix C/A. */
        li->busy = 2;
-       if (ecb == sc->sc_nexus) {
+       if (ecb == sc->sc_nexus)
                ncr53c9x_select(sc, ecb);
-       } else {
+       else {
                TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
                ecb->flags |= ECB_READY;
                if (sc->sc_state == NCR_IDLE)
@@ -1402,7 +1394,7 @@ ncr53c9x_done(struct ncr53c9x_softc *sc,
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("[ncr53c9x_done(status:%x)] ", ccb->ccb_h.status));
+       NCR_TRACE(("[%s(status:%x)] ", __func__, ccb->ccb_h.status));
 
        ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
        lun = ccb->ccb_h.target_lun;
@@ -1457,7 +1449,7 @@ ncr53c9x_done(struct ncr53c9x_softc *sc,
        }
 
 #ifdef NCR53C9X_DEBUG
-       if (ncr53c9x_debug & NCR_SHOWTRAC) {
+       if ((ncr53c9x_debug & NCR_SHOWTRAC) != 0) {
                if (ccb->csio.resid != 0)
                        printf("resid=%d ", ccb->csio.resid);
                if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) != 0)
@@ -1510,7 +1502,7 @@ ncr53c9x_dequeue(struct ncr53c9x_softc *
        li = TINFO_LUN(ti, lun);
 #ifdef DIAGNOSTIC
        if (li == NULL || li->lun != lun)
-               panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist",
+               panic("%s: lun %qx for ecb %p does not exist", __func__,
                    (long long)lun, ecb);
 #endif
        if (li->untagged == ecb) {
@@ -1521,9 +1513,9 @@ ncr53c9x_dequeue(struct ncr53c9x_softc *
 #ifdef DIAGNOSTIC
                if (li->queued[ecb->tag[1]] != NULL &&
                    (li->queued[ecb->tag[1]] != ecb))
-                       panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
-                           "instead of ecb %p\n", ecb->tag[1],
-                           (long long)lun, li->queued[ecb->tag[1]], ecb);
+                       panic("%s: slot %d for lun %qx has %p instead of ecb "
+                           "%p", __func__, ecb->tag[1], (long long)lun,
+                           li->queued[ecb->tag[1]], ecb);
 #endif
                li->queued[ecb->tag[1]] = NULL;
                li->used--;
@@ -1550,7 +1542,7 @@ ncr53c9x_dequeue(struct ncr53c9x_softc *
        NCRCMD(sc, NCRCMD_SETATN);                                      \
        sc->sc_flags |= NCR_ATN;                                        \
        sc->sc_msgpriq |= (m);                                          \
-} while (0)
+} while (/* CONSTCOND */0)
 
 static void
 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
@@ -1558,7 +1550,7 @@ ncr53c9x_flushfifo(struct ncr53c9x_softc
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("[flushfifo] "));
+       NCR_TRACE(("[%s] ", __func__));
 
        NCRCMD(sc, NCRCMD_FLUSH);
 
@@ -1570,8 +1562,8 @@ ncr53c9x_flushfifo(struct ncr53c9x_softc
 static int
 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
 {
-       u_char *ibuf;
        int i, n;
+       uint8_t *ibuf;
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
@@ -1586,7 +1578,7 @@ ncr53c9x_rdfifo(struct ncr53c9x_softc *s
                break;
 
        default:
-               panic("ncr53c9x_rdfifo: bad flag");
+               panic("%s: bad flag", __func__);
                /* NOTREACHED */
        }
 
@@ -1611,10 +1603,9 @@ ncr53c9x_rdfifo(struct ncr53c9x_softc *s
 
                        ncr53c9x_flushfifo(sc);
                }
-       } else {
+       } else
                for (i = 0; i < n; i++)
                        ibuf[i] = NCR_READ_REG(sc, NCR_FIFO);
-       }
 
        sc->sc_imlen += i;
 
@@ -1622,7 +1613,7 @@ ncr53c9x_rdfifo(struct ncr53c9x_softc *s
 #ifdef NCR53C9X_DEBUG
        NCR_TRACE(("\n[rdfifo %s (%d):",
            (how == NCR_RDFIFO_START) ? "start" : "cont", (int)sc->sc_imlen));
-       if (ncr53c9x_debug & NCR_SHOWTRAC) {
+       if ((ncr53c9x_debug & NCR_SHOWTRAC) != 0) {
                for (i = 0; i < sc->sc_imlen; i++)
                        printf(" %02x", sc->sc_imess[i]);
                printf("]\n");
@@ -1633,7 +1624,7 @@ ncr53c9x_rdfifo(struct ncr53c9x_softc *s
 }
 
 static void
-ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
+ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, uint8_t *p, int len)
 {
        int i;
 
@@ -1641,7 +1632,7 @@ ncr53c9x_wrfifo(struct ncr53c9x_softc *s
 
 #ifdef NCR53C9X_DEBUG
        NCR_MSGS(("[wrfifo(%d):", len));
-       if (ncr53c9x_debug & NCR_SHOWMSGS) {
+       if ((ncr53c9x_debug & NCR_SHOWMSGS) != 0) {
                for (i = 0; i < len; i++)
                        printf(" %02x", p[i]);
                printf("]\n");
@@ -1663,13 +1654,13 @@ ncr53c9x_reselect(struct ncr53c9x_softc 
        struct ncr53c9x_ecb *ecb = NULL;
        struct ncr53c9x_linfo *li;
        struct ncr53c9x_tinfo *ti;
-       u_char lun, selid, target;
+       uint8_t lun, selid, target;
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       if (sc->sc_rev == NCR_VARIANT_FAS366) {
+       if (sc->sc_rev == NCR_VARIANT_FAS366)
                target = sc->sc_selid;
-       } else {
+       else {
                /*
                 * The SCSI chip made a snapshot of the data bus
                 * while the reselection was being negotiated.
@@ -1751,7 +1742,7 @@ abort:
 #define        MSG_IS2BYTE(m)          (((m) & 0xf0) == 0x20)
 
 static inline int
-__verify_msg_format(u_char *p, int len)
+__verify_msg_format(uint8_t *p, int len)
 {
 
        if (len == 1 && MSG_IS1BYTE(p[0]))
@@ -1777,12 +1768,12 @@ ncr53c9x_msgin(struct ncr53c9x_softc *sc
        struct ncr53c9x_ecb *ecb;
        struct ncr53c9x_linfo *li;
        struct ncr53c9x_tinfo *ti;
-       u_char *pb;
+       uint8_t *pb;
        int lun, plen;
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
+       NCR_TRACE(("[%s(curmsglen:%ld)] ", __func__, (long)sc->sc_imlen));
 
        if (sc->sc_imlen == 0) {
                device_printf(sc->sc_dev, "msgin: no msg byte available\n");
@@ -2068,19 +2059,19 @@ gotit:
                            sc->sc_imess[0]);
                        goto reset;
                }
-               (void) ncr53c9x_reselect(sc, sc->sc_msgify,
+               (void)ncr53c9x_reselect(sc, sc->sc_msgify,
                    sc->sc_imess[0], sc->sc_imess[1]);
                break;
 
        case NCR_RESELECTED:
-               if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
+               if (MSG_ISIDENTIFY(sc->sc_imess[1]))
                        sc->sc_msgify = sc->sc_imess[1];
-               } else {
+               else {
                        device_printf(sc->sc_dev, "reselect without IDENTIFY;"
                            " MSG %x; sending DEVICE RESET\n", sc->sc_imess[1]);
                        goto reset;
                }
-               (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
+               (void)ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
                break;
 
        default:
@@ -2124,8 +2115,8 @@ ncr53c9x_msgout(struct ncr53c9x_softc *s
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
-       NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
-           sc->sc_msgpriq, sc->sc_prevphase));
+       NCR_TRACE(("[%s(priq:%x, prevphase:%x)]", __func__, sc->sc_msgpriq,
+           sc->sc_prevphase));
 
        /*
         * XXX - the NCR_ATN flag is not in sync with the actual ATN
@@ -2138,7 +2129,9 @@ ncr53c9x_msgout(struct ncr53c9x_softc *s
                if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
                new:
                        NCRCMD(sc, NCRCMD_FLUSH);
-/*                     DELAY(1); */
+#if 0
+                       DELAY(1);
+#endif
                        sc->sc_msgoutq = 0;
                        sc->sc_omlen = 0;
                }
@@ -2146,10 +2139,9 @@ ncr53c9x_msgout(struct ncr53c9x_softc *s
                if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
                        ncr53c9x_sched_msgout(sc->sc_msgoutq);
                        goto new;
-               } else {
+               } else
                        device_printf(sc->sc_dev, "at line %d: unexpected "
                            "MESSAGE OUT phase\n", __LINE__);
-               }
        }
 
        if (sc->sc_omlen == 0) {
@@ -2181,20 +2173,18 @@ ncr53c9x_msgout(struct ncr53c9x_softc *s
                        break;
 
                case SEND_IDENTIFY:
-                       if (sc->sc_state != NCR_CONNECTED) {
+                       if (sc->sc_state != NCR_CONNECTED)
                                device_printf(sc->sc_dev, "at line %d: no "
                                    "nexus\n", __LINE__);
-                       }
                        ecb = sc->sc_nexus;
                        sc->sc_omess[0] =
                            MSG_IDENTIFY(ecb->ccb->ccb_h.target_lun, 0);
                        break;
 
                case SEND_TAG:
-                       if (sc->sc_state != NCR_CONNECTED) {
+                       if (sc->sc_state != NCR_CONNECTED)
                                device_printf(sc->sc_dev, "at line %d: no "
                                    "nexus\n", __LINE__);
-                       }
                        ecb = sc->sc_nexus;
                        sc->sc_omess[0] = ecb->tag[0];
                        sc->sc_omess[1] = ecb->tag[1];
@@ -2249,7 +2239,7 @@ ncr53c9x_msgout(struct ncr53c9x_softc *s
        }
 
 #ifdef NCR53C9X_DEBUG
-       if (ncr53c9x_debug & NCR_SHOWMSGS) {
+       if ((ncr53c9x_debug & NCR_SHOWMSGS) != 0) {
                NCR_MSGS(("<msgout:"));
                for (i = 0; i < sc->sc_omlen; i++)
                        NCR_MSGS((" %02x", sc->sc_omess[i]));
@@ -2310,7 +2300,7 @@ ncr53c9x_intr1(struct ncr53c9x_softc *sc
        struct timeval cur, wait;
        size_t size;
        int i, nfifo;
-       u_char msg;
+       uint8_t msg;
 
        NCR_LOCK_ASSERT(sc, MA_OWNED);
 
@@ -2385,7 +2375,7 @@ again:
                                 * while we were trying to select
                                 * another target.
                                 */
-#ifdef DEBUG
+#ifdef NCR53C9X_DEBUG
                                device_printf(sc->sc_dev, "ESP100 work-around "
                                    "activated\n");
 #endif
@@ -2492,7 +2482,9 @@ again:
                    sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
                if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
                        NCRCMD(sc, NCRCMD_FLUSH);
-/*                     DELAY(1); */
+#if 0
+                       DELAY(1);
+#endif
                }
                /*
                 * This command must (apparently) be issued within
@@ -2734,7 +2726,7 @@ again:
                                if (sc->sc_state == NCR_IDLE &&
                                    sc->sc_espstep == 0)
                                        return;
-                               panic("ncr53c9x: no nexus");
+                               panic("%s: no nexus", __func__);
                        }
 
                        ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
@@ -2812,8 +2804,8 @@ again:
                                        if (sc->sc_cmdlen == 0)
                                                /* Hope for the best... */
                                                break;
-                               } else if ((NCR_READ_REG(sc, NCR_FFLAG)
-                                   & NCRFIFO_FF) == 0) {
+                               } else if ((NCR_READ_REG(sc, NCR_FFLAG) &
+                                   NCRFIFO_FF) == 0) {
                                        /* Hope for the best... */
                                        break;
                                }
@@ -2872,7 +2864,7 @@ again:
                        /* "Initiate Command Complete Steps" in progress */
                        sc->sc_flags &= ~NCR_ICCS;
 
-                       if (!(sc->sc_espintr & NCRINTR_DONE)) {
+                       if ((sc->sc_espintr & NCRINTR_DONE) == 0) {
                                device_printf(sc->sc_dev, "ICCS: "
                                    ": [intr %x, stat %x, step %x]\n",
                                    sc->sc_espintr, sc->sc_espstat,
@@ -2912,9 +2904,8 @@ again:
         * Driver is now in state NCR_CONNECTED, i.e. we
         * have a current command working the SCSI bus.
         */
-       if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
-               panic("ncr53c9x: no nexus");
-       }
+       if (sc->sc_state != NCR_CONNECTED || ecb == NULL)
+               panic("%s: no nexus", __func__);
 
        switch (sc->sc_phase) {
        case MESSAGE_OUT_PHASE:
@@ -2928,7 +2919,7 @@ msgin:
                NCR_PHASE(("MESSAGE_IN_PHASE "));
                if ((sc->sc_espintr & NCRINTR_BS) != 0) {
                        if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
-                           !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
+                           (sc->sc_espstat2 & NCRFAS_STAT2_EMPTY) == 0) {
                                NCRCMD(sc, NCRCMD_FLUSH);
                        }
                        sc->sc_flags |= NCR_WAITI;
@@ -2945,11 +2936,10 @@ msgin:
                            (sc->sc_prevphase == sc->sc_phase) ?
                            NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
                        ncr53c9x_msgin(sc);
-               } else {
+               } else
                        device_printf(sc->sc_dev, "MSGIN: weird bits: "
                            "[intr %x, stat %x, step %x]\n",
                            sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
-               }
                sc->sc_prevphase = MESSAGE_IN_PHASE;
                goto shortcut;  /* i.e. expect data to be ready */
 
@@ -2966,7 +2956,9 @@ msgin:
                    ecb->cmd.cmd.opcode, ecb->clen));
                if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
                        NCRCMD(sc, NCRCMD_FLUSH);
-/*                     DELAY(1);*/
+#if 0
+                       DELAY(1);
+#endif
                }
                /*
                 * If we have more messages to send, e.g. WDTR or SDTR
@@ -2981,7 +2973,7 @@ msgin:
                        /* Setup DMA transfer for command. */
                        size = ecb->clen;
                        sc->sc_cmdlen = size;
-                       sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
+                       sc->sc_cmdp = (void *)&ecb->cmd.cmd;
                        NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
                            0, &size);
                        /* Program the SCSI counter. */
@@ -2994,7 +2986,8 @@ msgin:
                        NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
                        NCRDMA_GO(sc);
                } else {
-                       ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
+                       ncr53c9x_wrfifo(sc, (uint8_t *)&ecb->cmd.cmd,
+                           ecb->clen);
                        NCRCMD(sc, NCRCMD_TRANS);
                }
                sc->sc_prevphase = COMMAND_PHASE;
@@ -3175,7 +3168,7 @@ ncr53c9x_callout(void *arg)
 static void
 ncr53c9x_watch(void *arg)
 {
-       struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
+       struct ncr53c9x_softc *sc = arg;
        struct ncr53c9x_linfo *li;
        struct ncr53c9x_tinfo *ti;
        time_t old;

Modified: head/sys/dev/esp/ncr53c9xreg.h
==============================================================================
--- head/sys/dev/esp/ncr53c9xreg.h      Sat Oct 15 07:00:28 2011        
(r226380)
+++ head/sys/dev/esp/ncr53c9xreg.h      Sat Oct 15 09:29:43 2011        
(r226381)
@@ -1,4 +1,4 @@
-/*     $NetBSD: ncr53c9xreg.h,v 1.14 2005/02/27 00:27:02 perry Exp $   */
+/*     $NetBSD: ncr53c9xreg.h,v 1.16 2009/09/07 13:31:44 tsutsui Exp $ */
 
 /*-
  * Copyright (c) 1994 Peter Galbavy.  All rights reserved.
@@ -43,84 +43,84 @@
 #define        NCR_FIFO        0x02            /* RW - FIFO data               
*/
 
 #define        NCR_CMD         0x03            /* RW - Command (2 deep)        
*/
-#define  NCRCMD_DMA    0x80            /*      DMA Bit                 */
-#define  NCRCMD_NOP    0x00            /*      No Operation            */
-#define  NCRCMD_FLUSH  0x01            /*      Flush FIFO              */
-#define  NCRCMD_RSTCHIP        0x02            /*      Reset Chip              
*/
-#define  NCRCMD_RSTSCSI        0x03            /*      Reset SCSI Bus          
*/
-#define  NCRCMD_RESEL  0x40            /*      Reselect Sequence       */
-#define  NCRCMD_SELNATN        0x41            /*      Select without ATN      
*/
-#define  NCRCMD_SELATN 0x42            /*      Select with ATN         */
-#define  NCRCMD_SELATNS        0x43            /*      Select with ATN & Stop  
*/
-#define  NCRCMD_ENSEL  0x44            /*      Enable (Re)Selection    */
-#define  NCRCMD_DISSEL 0x45            /*      Disable (Re)Selection   */
-#define  NCRCMD_SELATN3        0x46            /*      Select with ATN3        
*/
-#define  NCRCMD_RESEL3 0x47            /*      Reselect3 Sequence      */
-#define  NCRCMD_SNDMSG 0x20            /*      Send Message            */
-#define  NCRCMD_SNDSTAT        0x21            /*      Send Status             
*/
-#define  NCRCMD_SNDDATA        0x22            /*      Send Data               
*/
-#define  NCRCMD_DISCSEQ        0x23            /*      Disconnect Sequence     
*/
-#define  NCRCMD_TERMSEQ        0x24            /*      Terminate Sequence      
*/
-#define  NCRCMD_TCCS   0x25            /*      Target Command Comp Seq */
-#define  NCRCMD_DISC   0x27            /*      Disconnect              */
-#define  NCRCMD_RECMSG 0x28            /*      Receive Message         */
-#define  NCRCMD_RECCMD 0x29            /*      Receive Command         */
-#define  NCRCMD_RECDATA        0x2a            /*      Receive Data            
*/
-#define  NCRCMD_RECCSEQ        0x2b            /*      Receive Command 
Sequence*/
-#define  NCRCMD_ABORT  0x04            /*      Target Abort DMA        */
-#define  NCRCMD_TRANS  0x10            /*      Transfer Information    */
-#define  NCRCMD_ICCS   0x11            /*      Initiator Cmd Comp Seq  */
-#define  NCRCMD_MSGOK  0x12            /*      Message Accepted        */
-#define  NCRCMD_TRPAD  0x18            /*      Transfer Pad            */
-#define  NCRCMD_SETATN 0x1a            /*      Set ATN                 */
-#define  NCRCMD_RSTATN 0x1b            /*      Reset ATN               */
+#define         NCRCMD_DMA     0x80            /*      DMA Bit                 
*/
+#define         NCRCMD_NOP     0x00            /*      No Operation            
*/
+#define         NCRCMD_FLUSH   0x01            /*      Flush FIFO              
*/
+#define         NCRCMD_RSTCHIP 0x02            /*      Reset Chip              
*/
+#define         NCRCMD_RSTSCSI 0x03            /*      Reset SCSI Bus          
*/
+#define         NCRCMD_RESEL   0x40            /*      Reselect Sequence       
*/
+#define         NCRCMD_SELNATN 0x41            /*      Select without ATN      
*/
+#define         NCRCMD_SELATN  0x42            /*      Select with ATN         
*/
+#define         NCRCMD_SELATNS 0x43            /*      Select with ATN & Stop  
*/
+#define         NCRCMD_ENSEL   0x44            /*      Enable (Re)Selection    
*/
+#define         NCRCMD_DISSEL  0x45            /*      Disable (Re)Selection   
*/
+#define         NCRCMD_SELATN3 0x46            /*      Select with ATN3        
*/
+#define         NCRCMD_RESEL3  0x47            /*      Reselect3 Sequence      
*/
+#define         NCRCMD_SNDMSG  0x20            /*      Send Message            
*/
+#define         NCRCMD_SNDSTAT 0x21            /*      Send Status             
*/
+#define         NCRCMD_SNDDATA 0x22            /*      Send Data               
*/
+#define         NCRCMD_DISCSEQ 0x23            /*      Disconnect Sequence     
*/
+#define         NCRCMD_TERMSEQ 0x24            /*      Terminate Sequence      
*/
+#define         NCRCMD_TCCS    0x25            /*      Target Command Comp Seq 
*/
+#define         NCRCMD_DISC    0x27            /*      Disconnect              
*/
+#define         NCRCMD_RECMSG  0x28            /*      Receive Message         
*/
+#define         NCRCMD_RECCMD  0x29            /*      Receive Command         
*/
+#define         NCRCMD_RECDATA 0x2a            /*      Receive Data            
*/
+#define         NCRCMD_RECCSEQ 0x2b            /*      Receive Command 
Sequence*/
+#define         NCRCMD_ABORT   0x04            /*      Target Abort DMA        
*/
+#define         NCRCMD_TRANS   0x10            /*      Transfer Information    
*/
+#define         NCRCMD_ICCS    0x11            /*      Initiator Cmd Comp Seq  
*/
+#define         NCRCMD_MSGOK   0x12            /*      Message Accepted        
*/
+#define         NCRCMD_TRPAD   0x18            /*      Transfer Pad            
*/
+#define         NCRCMD_SETATN  0x1a            /*      Set ATN                 
*/
+#define         NCRCMD_RSTATN  0x1b            /*      Reset ATN               
*/
 
 #define        NCR_STAT        0x04            /* RO - Status                  
*/
-#define  NCRSTAT_INT   0x80            /*      Interrupt               */
-#define  NCRSTAT_GE    0x40            /*      Gross Error             */
-#define  NCRSTAT_PE    0x20            /*      Parity Error            */
-#define  NCRSTAT_TC    0x10            /*      Terminal Count          */
-#define  NCRSTAT_VGC   0x08            /*      Valid Group Code        */
-#define  NCRSTAT_PHASE 0x07            /*      Phase bits              */
+#define         NCRSTAT_INT    0x80            /*      Interrupt               
*/
+#define         NCRSTAT_GE     0x40            /*      Gross Error             
*/
+#define         NCRSTAT_PE     0x20            /*      Parity Error            
*/
+#define         NCRSTAT_TC     0x10            /*      Terminal Count          
*/
+#define         NCRSTAT_VGC    0x08            /*      Valid Group Code        
*/
+#define         NCRSTAT_PHASE  0x07            /*      Phase bits              
*/
 
 #define        NCR_SELID       0x04            /* WO - Select/Reselect Bus ID  
*/
-#define  NCR_BUSID_HMEXC32     0x40    /*      HME xfer counter is 32bit */
-#define  NCR_BUSID_HMEENCID    0x10    /*      HME encode reselection ID */
+#define         NCR_BUSID_HMEXC32      0x40    /*      HME xfer counter is 
32bit */
+#define         NCR_BUSID_HMEENCID     0x10    /*      HME encode reselection 
ID */
 
 #define        NCR_INTR        0x05            /* RO - Interrupt               
*/
-#define  NCRINTR_SBR   0x80            /*      SCSI Bus Reset          */
-#define  NCRINTR_ILL   0x40            /*      Illegal Command         */
-#define  NCRINTR_DIS   0x20            /*      Disconnect              */
-#define  NCRINTR_BS    0x10            /*      Bus Service             */
-#define  NCRINTR_FC    0x08            /*      Function Complete       */
-#define  NCRINTR_RESEL 0x04            /*      Reselected              */
-#define  NCRINTR_SELATN        0x02            /*      Select with ATN         
*/
-#define  NCRINTR_SEL   0x01            /*      Selected                */
+#define         NCRINTR_SBR    0x80            /*      SCSI Bus Reset          
*/
+#define         NCRINTR_ILL    0x40            /*      Illegal Command         
*/
+#define         NCRINTR_DIS    0x20            /*      Disconnect              
*/
+#define         NCRINTR_BS     0x10            /*      Bus Service             
*/
+#define         NCRINTR_FC     0x08            /*      Function Complete       
*/
+#define         NCRINTR_RESEL  0x04            /*      Reselected              
*/
+#define         NCRINTR_SELATN 0x02            /*      Select with ATN         
*/
+#define         NCRINTR_SEL    0x01            /*      Selected                
*/
 
 #define        NCR_TIMEOUT     0x05            /* WO - Select/Reselect Timeout 
*/
 
 #define        NCR_STEP        0x06            /* RO - Sequence Step           
*/
-#define  NCRSTEP_MASK  0x07            /*      the last 3 bits         */
-#define  NCRSTEP_DONE  0x04            /*      command went out        */
+#define         NCRSTEP_MASK   0x07            /*      the last 3 bits         
*/
+#define         NCRSTEP_DONE   0x04            /*      command went out        
*/
 
 #define        NCR_SYNCTP      0x06            /* WO - Synch Transfer Period   
*/
                                        /*      Default 5 (53C9X)       */
 
 #define        NCR_FFLAG       0x07            /* RO - FIFO Flags              
*/
-#define  NCRFIFO_SS    0xe0            /*      Sequence Step (Dup)     */
-#define  NCRFIFO_FF    0x1f            /*      Bytes in FIFO           */
+#define         NCRFIFO_SS     0xe0            /*      Sequence Step (Dup)     
*/
+#define         NCRFIFO_FF     0x1f            /*      Bytes in FIFO           
*/
 
 #define        NCR_SYNCOFF     0x07            /* WO - Synch Offset            
*/
                                        /*      0 = ASYNC               */
                                        /*      1 - 15 = SYNC bytes     */
 
 #define        NCR_CFG1        0x08            /* RW - Configuration #1        
*/
-#define  NCRCFG1_SLOW  0x80            /*      Slow Cable Mode         */
-#define  NCRCFG1_SRR   0x40            /*      SCSI Reset Rep Int Dis  */
-#define  NCRCFG1_PTEST 0x20            /*      Parity Test Mod         */
-#define  NCRCFG1_PARENB        0x10            /*      Enable Parity Check     
*/
-#define  NCRCFG1_CTEST 0x08            /*      Enable Chip Test        */
-#define  NCRCFG1_BUSID 0x07            /*      Bus ID                  */
+#define         NCRCFG1_SLOW   0x80            /*      Slow Cable Mode         
*/
+#define         NCRCFG1_SRR    0x40            /*      SCSI Reset Rep Int Dis  
*/
+#define         NCRCFG1_PTEST  0x20            /*      Parity Test Mod         
*/
+#define         NCRCFG1_PARENB 0x10            /*      Enable Parity Check     
*/
+#define         NCRCFG1_CTEST  0x08            /*      Enable Chip Test        
*/
+#define         NCRCFG1_BUSID  0x07            /*      Bus ID                  
*/
 
 #define        NCR_CCF         0x09            /* WO - Clock Conversion Factor 
*/
                                        /*      0 = 35.01 - 40MHz       */
@@ -136,24 +136,24 @@
 
 #define        NCR_CFG2        0x0b            /* RW - Configuration #2        
*/
 #define         NCRCFG2_RSVD   0xa0            /*      reserved                
*/
-#define  NCRCFG2_FE    0x40            /*      Features Enable         */
-#define  NCRCFG2_DREQ  0x10            /*      DREQ High Impedance     */
-#define  NCRCFG2_SCSI2 0x08            /*      SCSI-2 Enable           */
-#define  NCRCFG2_BPA   0x04            /*      Target Bad Parity Abort */
-#define  NCRCFG2_RPE   0x02            /*      Register Parity Error   */
-#define  NCRCFG2_DPE   0x01            /*      DMA Parity Error        */
+#define         NCRCFG2_FE     0x40            /*      Features Enable         
*/
+#define         NCRCFG2_DREQ   0x10            /*      DREQ High Impedance     
*/
+#define         NCRCFG2_SCSI2  0x08            /*      SCSI-2 Enable           
*/
+#define         NCRCFG2_BPA    0x04            /*      Target Bad Parity Abort 
*/
+#define         NCRCFG2_RPE    0x02            /*      Register Parity Error   
*/
+#define         NCRCFG2_DPE    0x01            /*      DMA Parity Error        
*/
 
-#define  NCRCFG2_HMEFE 0x10            /*      HME feature enable      */
+#define         NCRCFG2_HMEFE  0x10            /*      HME feature enable      
*/
 #define         NCRCFG2_HME32  0x80            /*      HME 32 extended         
*/
 
 /* Config #3 only on 53C9X */
 #define        NCR_CFG3        0x0c            /* RW - Configuration #3        
*/
 #define         NCRCFG3_RSVD   0xe0            /*      reserved                
*/
-#define  NCRCFG3_IDM   0x10            /*      ID Message Res Check    */
-#define  NCRCFG3_QTE   0x08            /*      Queue Tag Enable        */
-#define  NCRCFG3_CDB   0x04            /*      CDB 10-bytes OK         */
-#define  NCRCFG3_FSCSI 0x02            /*      Fast SCSI               */
-#define  NCRCFG3_FCLK  0x01            /*      Fast Clock (>25MHz)     */
+#define         NCRCFG3_IDM    0x10            /*      ID Message Res Check    
*/
+#define         NCRCFG3_QTE    0x08            /*      Queue Tag Enable        
*/
+#define         NCRCFG3_CDB    0x04            /*      CDB 10-bytes OK         
*/
+#define         NCRCFG3_FSCSI  0x02            /*      Fast SCSI               
*/
+#define         NCRCFG3_FCLK   0x01            /*      Fast Clock (>25MHz)     
*/
 
 /*
  * For some unknown reason, the ESP406/FAS408 looks like every
@@ -164,35 +164,35 @@
 
 /* Config #3 different on ESP406/FAS408 */
 #define        NCR_ESPCFG3             0x0c    /* RW - Configuration #3        
*/
-#define  NCRESPCFG3_IDM                0x80    /*      ID Message Res Check    
*/
-#define  NCRESPCFG3_QTE                0x40    /*      Queue Tag Enable        
*/
-#define  NCRESPCFG3_CDB                0x20    /*      CDB 10-bytes OK         
*/
-#define  NCRESPCFG3_FSCSI      0x10    /*      Fast SCSI               */
+#define         NCRESPCFG3_IDM         0x80    /*      ID Message Res Check    
*/
+#define         NCRESPCFG3_QTE         0x40    /*      Queue Tag Enable        
*/
+#define         NCRESPCFG3_CDB         0x20    /*      CDB 10-bytes OK         
*/
+#define         NCRESPCFG3_FSCSI       0x10    /*      Fast SCSI               
*/
 #define         NCRESPCFG3_SRESB       0x08    /*      Save Residual Byte      
*/
-#define  NCRESPCFG3_FCLK       0x04    /*      Fast Clock (>25MHz)     */
+#define         NCRESPCFG3_FCLK        0x04    /*      Fast Clock (>25MHz)     
*/
 #define         NCRESPCFG3_ADMA        0x02    /*      Alternate DMA Mode      
*/
 #define         NCRESPCFG3_T8M         0x01    /*      Threshold 8 Mode        
*/
 
 /* Config #3 also different on NCR53CF9x/FAS100A/FAS216/FAS236 */
 #define        NCR_F9XCFG3             0x0c    /* RW - Configuration #3        
*/
-#define  NCRF9XCFG3_IDM                0x80    /*      ID Message Res Check    
*/
-#define  NCRF9XCFG3_QTE                0x40    /*      Queue Tag Enable        
*/
-#define  NCRF9XCFG3_CDB                0x20    /*      CDB 10-bytes OK         
*/
-#define  NCRF9XCFG3_FSCSI      0x10    /*      Fast SCSI               */
-#define  NCRF9XCFG3_FCLK       0x08    /*      Fast Clock (>25MHz)     */
-#define  NCRF9XCFG3_SRESB      0x04    /*      Save Residual Byte      */
-#define  NCRF9XCFG3_ADMA       0x02    /*      Alternate DMA Mode      */
-#define  NCRF9XCFG3_T8M                0x01    /*      Threshold 8 Mode        
*/
+#define         NCRF9XCFG3_IDM         0x80    /*      ID Message Res Check    
*/
+#define         NCRF9XCFG3_QTE         0x40    /*      Queue Tag Enable        
*/
+#define         NCRF9XCFG3_CDB         0x20    /*      CDB 10-bytes OK         
*/
+#define         NCRF9XCFG3_FSCSI       0x10    /*      Fast SCSI               
*/
+#define         NCRF9XCFG3_FCLK        0x08    /*      Fast Clock (>25MHz)     
*/
+#define         NCRF9XCFG3_SRESB       0x04    /*      Save Residual Byte      
*/
+#define         NCRF9XCFG3_ADMA        0x02    /*      Alternate DMA Mode      
*/
+#define         NCRF9XCFG3_T8M         0x01    /*      Threshold 8 Mode        
*/
 
 /* Config #3 on FAS366 */
-#define  NCRFASCFG3_OBAUTO     0x80    /*      auto push odd-byte to DMA */
-#define  NCRFASCFG3_EWIDE      0x40    /*      Enable Wide-SCSI     */
-#define  NCRFASCFG3_IDBIT3     0x20    /*      Bit 3 of HME SCSI-ID */
-#define         NCRFASCFG3_IDRESCHK    0x10    /*      ID message checking */
-#define         NCRFASCFG3_QUENB       0x08    /*      3-byte msg support */
-#define         NCRFASCFG3_CDB10       0x04    /*      group 2 scsi-2 support 
*/
-#define         NCRFASCFG3_FASTSCSI    0x02    /*      10 MB/S fast scsi mode 
*/
-#define         NCRFASCFG3_FASTCLK     0x01    /*      fast clock mode */
+#define         NCRFASCFG3_OBAUTO      0x80    /*      auto push odd-byte to 
DMA */
+#define         NCRFASCFG3_EWIDE       0x40    /*      Enable Wide-SCSI     */
+#define         NCRFASCFG3_IDBIT3      0x20    /*      Bit 3 of HME SCSI-ID */
+#define         NCRFASCFG3_IDRESCHK    0x10    /*      ID message checking */
+#define         NCRFASCFG3_QUENB       0x08    /*      3-byte msg support */
+#define         NCRFASCFG3_CDB10       0x04    /*      group 2 scsi-2 support 
*/
+#define         NCRFASCFG3_FASTSCSI    0x02    /*      10 MB/S fast scsi mode 
*/
+#define         NCRFASCFG3_FASTCLK     0x01    /*      fast clock mode */
 
 /* Config #4 only on ESP406/FAS408 */
 #define        NCR_CFG4        0x0d            /* RW - Configuration #4        
*/
@@ -208,8 +208,8 @@
 */
 

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