Author: adrian
Date: Sun Mar 13 08:36:57 2011
New Revision: 219591
URL: http://svn.freebsd.org/changeset/base/219591
Log:
Add the missing AR724x DDR flush routines for if_arge0.
Submitted by: Luiz Otavio O Souza
Modified:
head/sys/mips/atheros/ar724x_chip.c
head/sys/mips/atheros/ar724xreg.h
Modified: head/sys/mips/atheros/ar724x_chip.c
==============================================================================
--- head/sys/mips/atheros/ar724x_chip.c Sun Mar 13 08:34:14 2011
(r219590)
+++ head/sys/mips/atheros/ar724x_chip.c Sun Mar 13 08:36:57 2011
(r219591)
@@ -136,11 +136,13 @@ ar724x_chip_set_pll_ge1(int speed)
static void
ar724x_chip_ddr_flush_ge0(void)
{
+ ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
}
static void
ar724x_chip_ddr_flush_ge1(void)
{
+ ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
}
static uint32_t
Modified: head/sys/mips/atheros/ar724xreg.h
==============================================================================
--- head/sys/mips/atheros/ar724xreg.h Sun Mar 13 08:34:14 2011
(r219590)
+++ head/sys/mips/atheros/ar724xreg.h Sun Mar 13 08:36:57 2011
(r219591)
@@ -47,6 +47,9 @@
#define AR724X_BASE_FREQ 5000000
+#define AR724X_DDR_REG_FLUSH_GE0 (AR71XX_DDR_CONFIG + 0x7c)
+#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80)
+
#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c
#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3)
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