Author: jkim
Date: Tue Dec 7 22:12:02 2010
New Revision: 216272
URL: http://svn.freebsd.org/changeset/base/216272
Log:
Probe P-state invariant TSC from rightful place.
Modified:
head/sys/amd64/amd64/identcpu.c
head/sys/amd64/amd64/tsc.c
head/sys/i386/i386/identcpu.c
head/sys/i386/i386/tsc.c
Modified: head/sys/amd64/amd64/identcpu.c
==============================================================================
--- head/sys/amd64/amd64/identcpu.c Tue Dec 7 22:00:48 2010
(r216271)
+++ head/sys/amd64/amd64/identcpu.c Tue Dec 7 22:12:02 2010
(r216272)
@@ -392,28 +392,6 @@ printcpuinfo(void)
* If this CPU supports P-state invariant TSC then
* mention the capability.
*/
- switch (cpu_vendor_id) {
- case CPU_VENDOR_AMD:
- if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
- CPUID_TO_FAMILY(cpu_id) >= 0x10 ||
- cpu_id == 0x60fb2)
- tsc_is_invariant = 1;
- break;
- case CPU_VENDOR_INTEL:
- if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
- (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
- CPUID_TO_MODEL(cpu_id) >= 0xe) ||
- (CPUID_TO_FAMILY(cpu_id) == 0xf &&
- CPUID_TO_MODEL(cpu_id) >= 0x3))
- tsc_is_invariant = 1;
- break;
- case CPU_VENDOR_CENTAUR:
- if (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
- CPUID_TO_MODEL(cpu_id) >= 0xf &&
- (rdmsr(0x1203) & 0x100000000ULL) == 0)
- tsc_is_invariant = 1;
- break;
- }
if (tsc_is_invariant)
printf("\n TSC: P-state invariant");
Modified: head/sys/amd64/amd64/tsc.c
==============================================================================
--- head/sys/amd64/amd64/tsc.c Tue Dec 7 22:00:48 2010 (r216271)
+++ head/sys/amd64/amd64/tsc.c Tue Dec 7 22:12:02 2010 (r216272)
@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <sys/power.h>
#include <sys/smp.h>
#include <machine/clock.h>
+#include <machine/cputypes.h>
#include <machine/md_var.h>
#include <machine/specialreg.h>
@@ -94,6 +95,28 @@ init_TSC(void)
if (bootverbose)
printf("TSC clock: %lu Hz\n", tsc_freq);
+ switch (cpu_vendor_id) {
+ case CPU_VENDOR_AMD:
+ if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
+ CPUID_TO_FAMILY(cpu_id) >= 0x10 || cpu_id == 0x60fb2)
+ tsc_is_invariant = 1;
+ break;
+ case CPU_VENDOR_INTEL:
+ if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
+ (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
+ CPUID_TO_MODEL(cpu_id) >= 0xe) ||
+ (CPUID_TO_FAMILY(cpu_id) == 0xf &&
+ CPUID_TO_MODEL(cpu_id) >= 0x3))
+ tsc_is_invariant = 1;
+ break;
+ case CPU_VENDOR_CENTAUR:
+ if (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
+ CPUID_TO_MODEL(cpu_id) >= 0xf &&
+ (rdmsr(0x1203) & 0x100000000ULL) == 0)
+ tsc_is_invariant = 1;
+ break;
+ }
+
/*
* Inform CPU accounting about our boot-time clock rate. Once the
* system is finished booting, we will get the real max clock rate
Modified: head/sys/i386/i386/identcpu.c
==============================================================================
--- head/sys/i386/i386/identcpu.c Tue Dec 7 22:00:48 2010
(r216271)
+++ head/sys/i386/i386/identcpu.c Tue Dec 7 22:12:02 2010
(r216272)
@@ -856,28 +856,6 @@ printcpuinfo(void)
* If this CPU supports P-state invariant TSC then
* mention the capability.
*/
- switch (cpu_vendor_id) {
- case CPU_VENDOR_AMD:
- if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
- CPUID_TO_FAMILY(cpu_id) >= 0x10 ||
- cpu_id == 0x60fb2)
- tsc_is_invariant = 1;
- break;
- case CPU_VENDOR_INTEL:
- if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
- (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
- CPUID_TO_MODEL(cpu_id) >= 0xe) ||
- (CPUID_TO_FAMILY(cpu_id) == 0xf &&
- CPUID_TO_MODEL(cpu_id) >= 0x3))
- tsc_is_invariant = 1;
- break;
- case CPU_VENDOR_CENTAUR:
- if (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
- CPUID_TO_MODEL(cpu_id) >= 0xf &&
- (rdmsr(0x1203) & 0x100000000ULL) == 0)
- tsc_is_invariant = 1;
- break;
- }
if (tsc_is_invariant)
printf("\n TSC: P-state invariant");
Modified: head/sys/i386/i386/tsc.c
==============================================================================
--- head/sys/i386/i386/tsc.c Tue Dec 7 22:00:48 2010 (r216271)
+++ head/sys/i386/i386/tsc.c Tue Dec 7 22:12:02 2010 (r216272)
@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <sys/power.h>
#include <sys/smp.h>
#include <machine/clock.h>
+#include <machine/cputypes.h>
#include <machine/md_var.h>
#include <machine/specialreg.h>
@@ -103,6 +104,28 @@ init_TSC(void)
if (bootverbose)
printf("TSC clock: %ju Hz\n", (intmax_t)tsc_freq);
+ switch (cpu_vendor_id) {
+ case CPU_VENDOR_AMD:
+ if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
+ CPUID_TO_FAMILY(cpu_id) >= 0x10 || cpu_id == 0x60fb2)
+ tsc_is_invariant = 1;
+ break;
+ case CPU_VENDOR_INTEL:
+ if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
+ (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
+ CPUID_TO_MODEL(cpu_id) >= 0xe) ||
+ (CPUID_TO_FAMILY(cpu_id) == 0xf &&
+ CPUID_TO_MODEL(cpu_id) >= 0x3))
+ tsc_is_invariant = 1;
+ break;
+ case CPU_VENDOR_CENTAUR:
+ if (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
+ CPUID_TO_MODEL(cpu_id) >= 0xf &&
+ (rdmsr(0x1203) & 0x100000000ULL) == 0)
+ tsc_is_invariant = 1;
+ break;
+ }
+
/*
* Inform CPU accounting about our boot-time clock rate. Once the
* system is finished booting, we will get the real max clock rate
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