Author: alc
Date: Fri Nov 26 19:36:26 2010
New Revision: 215878
URL: http://svn.freebsd.org/changeset/base/215878

Log:
  Make the size of the direct map easily configurable.  Changing NDMPML4E
  now suffices.
  
  Increase the size of the direct map to 1TB.
  
  An earler version of this patch was tested by sbr...@.

Modified:
  head/sys/amd64/amd64/pmap.c
  head/sys/amd64/include/pmap.h
  head/sys/amd64/include/vmparam.h

Modified: head/sys/amd64/amd64/pmap.c
==============================================================================
--- head/sys/amd64/amd64/pmap.c Fri Nov 26 18:44:01 2010        (r215877)
+++ head/sys/amd64/amd64/pmap.c Fri Nov 26 19:36:26 2010        (r215878)
@@ -452,6 +452,8 @@ allocpages(vm_paddr_t *firstaddr, int n)
        return (ret);
 }
 
+CTASSERT(powerof2(NDMPML4E));
+
 static void
 create_pagetables(vm_paddr_t *firstaddr)
 {
@@ -532,9 +534,12 @@ create_pagetables(vm_paddr_t *firstaddr)
        ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
        ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
 
-       /* Connect the Direct Map slot up to the PML4 */
-       ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
-       ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
+       /* Connect the Direct Map slot(s) up to the PML4. */
+       for (i = 0; i < NDMPML4E; i++) {
+               ((pdp_entry_t *)KPML4phys)[DMPML4I + i] = DMPDPphys +
+                   (i << PAGE_SHIFT);
+               ((pdp_entry_t *)KPML4phys)[DMPML4I + i] |= PG_RW | PG_V | PG_U;
+       }
 
        /* Connect the KVA slot up to the PML4 */
        ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
@@ -1589,6 +1594,7 @@ pmap_pinit(pmap_t pmap)
 {
        vm_page_t pml4pg;
        static vm_pindex_t color;
+       int i;
 
        PMAP_LOCK_INIT(pmap);
 
@@ -1606,7 +1612,10 @@ pmap_pinit(pmap_t pmap)
 
        /* Wire in kernel global address entries. */
        pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
-       pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
+       for (i = 0; i < NDMPML4E; i++) {
+               pmap->pm_pml4[DMPML4I + i] = (DMPDPphys + (i << PAGE_SHIFT)) |
+                   PG_RW | PG_V | PG_U;
+       }
 
        /* install self-referential address mapping entry(s) */
        pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pml4pg) | PG_V | PG_RW | 
PG_A | PG_M;
@@ -1855,6 +1864,7 @@ void
 pmap_release(pmap_t pmap)
 {
        vm_page_t m;
+       int i;
 
        KASSERT(pmap->pm_stats.resident_count == 0,
            ("pmap_release: pmap resident count %ld != 0",
@@ -1865,7 +1875,8 @@ pmap_release(pmap_t pmap)
        m = PHYS_TO_VM_PAGE(pmap->pm_pml4[PML4PML4I] & PG_FRAME);
 
        pmap->pm_pml4[KPML4I] = 0;      /* KVA */
-       pmap->pm_pml4[DMPML4I] = 0;     /* Direct Map */
+       for (i = 0; i < NDMPML4E; i++)  /* Direct Map */
+               pmap->pm_pml4[DMPML4I + i] = 0;
        pmap->pm_pml4[PML4PML4I] = 0;   /* Recursive Mapping */
 
        m->wire_count--;

Modified: head/sys/amd64/include/pmap.h
==============================================================================
--- head/sys/amd64/include/pmap.h       Fri Nov 26 18:44:01 2010        
(r215877)
+++ head/sys/amd64/include/pmap.h       Fri Nov 26 19:36:26 2010        
(r215878)
@@ -125,15 +125,21 @@
 #define        NUPDPE          (NUPML4E*NPDPEPG)/* number of userland PDP 
pages */
 #define        NUPDE           (NUPDPE*NPDEPG) /* number of userland PD 
entries */
 
-#define        NDMPML4E        1               /* number of dmap PML4 slots */
+/*
+ * NDMPML4E is the number of PML4 entries that are used to implement the
+ * direct map.  It must be a power of two.
+ */
+#define        NDMPML4E        2
 
 /*
- * The *PDI values control the layout of virtual memory
+ * The *PDI values control the layout of virtual memory.  The starting address
+ * of the direct map, which is controlled by DMPML4I, must be a multiple of
+ * its size.  (See the PHYS_TO_DMAP() and DMAP_TO_PHYS() macros.)
  */
 #define        PML4PML4I       (NPML4EPG/2)    /* Index of recursive pml4 
mapping */
 
 #define        KPML4I          (NPML4EPG-1)    /* Top 512GB for KVM */
-#define        DMPML4I         (KPML4I-1)      /* Next 512GB down for direct 
map */
+#define        DMPML4I         rounddown(KPML4I - NDMPML4E, NDMPML4E) /* Below 
KVM */
 
 #define        KPDPI           (NPDPEPG-2)     /* kernbase at -2GB */
 

Modified: head/sys/amd64/include/vmparam.h
==============================================================================
--- head/sys/amd64/include/vmparam.h    Fri Nov 26 18:44:01 2010        
(r215877)
+++ head/sys/amd64/include/vmparam.h    Fri Nov 26 19:36:26 2010        
(r215878)
@@ -163,8 +163,9 @@
  * 0x0000000000000000 - 0x00007fffffffffff   user map
  * 0x0000800000000000 - 0xffff7fffffffffff   does not exist (hole)
  * 0xffff800000000000 - 0xffff804020100fff   recursive page table (512GB slot)
- * 0xffff804020101000 - 0xfffffeffffffffff   unused
- * 0xffffff0000000000 - 0xffffff7fffffffff   512GB direct map mappings
+ * 0xffff804020101000 - 0xfffffdffffffffff   unused
+ * 0xfffffe0000000000 - 0xfffffeffffffffff   1TB direct map
+ * 0xffffff0000000000 - 0xffffff7fffffffff   unused
  * 0xffffff8000000000 - 0xffffffffffffffff   512GB kernel map
  *
  * Within the kernel map:
@@ -176,7 +177,7 @@
 #define        VM_MIN_KERNEL_ADDRESS   KVADDR(KPML4I, NPDPEPG-512, 0, 0)
 
 #define        DMAP_MIN_ADDRESS        KVADDR(DMPML4I, 0, 0, 0)
-#define        DMAP_MAX_ADDRESS        KVADDR(DMPML4I+1, 0, 0, 0)
+#define        DMAP_MAX_ADDRESS        KVADDR(DMPML4I + NDMPML4E, 0, 0, 0)
 
 #define        KERNBASE                KVADDR(KPML4I, KPDPI, 0, 0)
 
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