Author: gonzo
Date: Fri Sep 24 04:46:46 2010
New Revision: 213091
URL: http://svn.freebsd.org/changeset/base/213091
Log:
- Do not place variables to memory allocated by busdma. pre/post ops
might invalidate cache and hence effectively void validity of values
Modified:
head/sys/dev/hifn/hifn7751.c
head/sys/dev/hifn/hifn7751var.h
Modified: head/sys/dev/hifn/hifn7751.c
==============================================================================
--- head/sys/dev/hifn/hifn7751.c Fri Sep 24 02:41:52 2010
(r213090)
+++ head/sys/dev/hifn/hifn7751.c Fri Sep 24 04:46:46 2010
(r213091)
@@ -1372,45 +1372,45 @@ hifn_alloc_slot(struct hifn_softc *sc, i
{
struct hifn_dma *dma = sc->sc_dma;
- if (dma->cmdi == HIFN_D_CMD_RSIZE) {
- dma->cmdi = 0;
+ if (sc->sc_cmdi == HIFN_D_CMD_RSIZE) {
+ sc->sc_cmdi = 0;
dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_VALID |
HIFN_D_JUMP | HIFN_D_MASKDONEIRQ);
HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE,
BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
}
- *cmdp = dma->cmdi++;
- dma->cmdk = dma->cmdi;
+ *cmdp = sc->sc_cmdi++;
+ sc->sc_cmdk = sc->sc_cmdi;
- if (dma->srci == HIFN_D_SRC_RSIZE) {
- dma->srci = 0;
+ if (sc->sc_srci == HIFN_D_SRC_RSIZE) {
+ sc->sc_srci = 0;
dma->srcr[HIFN_D_SRC_RSIZE].l = htole32(HIFN_D_VALID |
HIFN_D_JUMP | HIFN_D_MASKDONEIRQ);
HIFN_SRCR_SYNC(sc, HIFN_D_SRC_RSIZE,
BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
}
- *srcp = dma->srci++;
- dma->srck = dma->srci;
+ *srcp = sc->sc_srci++;
+ sc->sc_srck = sc->sc_srci;
- if (dma->dsti == HIFN_D_DST_RSIZE) {
- dma->dsti = 0;
+ if (sc->sc_dsti == HIFN_D_DST_RSIZE) {
+ sc->sc_dsti = 0;
dma->dstr[HIFN_D_DST_RSIZE].l = htole32(HIFN_D_VALID |
HIFN_D_JUMP | HIFN_D_MASKDONEIRQ);
HIFN_DSTR_SYNC(sc, HIFN_D_DST_RSIZE,
BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
}
- *dstp = dma->dsti++;
- dma->dstk = dma->dsti;
+ *dstp = sc->sc_dsti++;
+ sc->sc_dstk = sc->sc_dsti;
- if (dma->resi == HIFN_D_RES_RSIZE) {
- dma->resi = 0;
+ if (sc->sc_resi == HIFN_D_RES_RSIZE) {
+ sc->sc_resi = 0;
dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_VALID |
HIFN_D_JUMP | HIFN_D_MASKDONEIRQ);
HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE,
BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
}
- *resp = dma->resi++;
- dma->resk = dma->resi;
+ *resp = sc->sc_resi++;
+ sc->sc_resk = sc->sc_resi;
}
static int
@@ -1563,9 +1563,9 @@ hifn_init_dma(struct hifn_softc *sc)
dma->resr[HIFN_D_RES_RSIZE].p =
htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, resr[0]));
- dma->cmdu = dma->srcu = dma->dstu = dma->resu = 0;
- dma->cmdi = dma->srci = dma->dsti = dma->resi = 0;
- dma->cmdk = dma->srck = dma->dstk = dma->resk = 0;
+ sc->sc_cmdu = sc->sc_srcu = sc->sc_dstu = sc->sc_resu = 0;
+ sc->sc_cmdi = sc->sc_srci = sc->sc_dsti = sc->sc_resi = 0;
+ sc->sc_cmdk = sc->sc_srck = sc->sc_dstk = sc->sc_resk = 0;
}
/*
@@ -1723,7 +1723,7 @@ hifn_dmamap_load_dst(struct hifn_softc *
u_int32_t p, l;
int idx, used = 0, i;
- idx = dma->dsti;
+ idx = sc->sc_dsti;
for (i = 0; i < dst->nsegs - 1; i++) {
dma->dstr[idx].p = htole32(dst->segs[i].ds_addr);
dma->dstr[idx].l = htole32(HIFN_D_VALID |
@@ -1764,8 +1764,8 @@ hifn_dmamap_load_dst(struct hifn_softc *
idx = hifn_dmamap_dstwrap(sc, idx);
- dma->dsti = idx;
- dma->dstu += used;
+ sc->sc_dsti = idx;
+ sc->sc_dstu += used;
return (idx);
}
@@ -1792,7 +1792,7 @@ hifn_dmamap_load_src(struct hifn_softc *
int idx, i;
u_int32_t last = 0;
- idx = dma->srci;
+ idx = sc->sc_srci;
for (i = 0; i < src->nsegs; i++) {
if (i == src->nsegs - 1)
last = HIFN_D_LAST;
@@ -1805,8 +1805,8 @@ hifn_dmamap_load_src(struct hifn_softc *
idx = hifn_dmamap_srcwrap(sc, idx);
}
- dma->srci = idx;
- dma->srcu += src->nsegs;
+ sc->sc_srci = idx;
+ sc->sc_srcu += src->nsegs;
return (idx);
}
@@ -1840,13 +1840,13 @@ hifn_crypto(
* NB: check this first since it's easy.
*/
HIFN_LOCK(sc);
- if ((dma->cmdu + 1) > HIFN_D_CMD_RSIZE ||
- (dma->resu + 1) > HIFN_D_RES_RSIZE) {
+ if ((sc->sc_cmdu + 1) > HIFN_D_CMD_RSIZE ||
+ (sc->sc_resu + 1) > HIFN_D_RES_RSIZE) {
#ifdef HIFN_DEBUG
if (hifn_debug) {
device_printf(sc->sc_dev,
"cmd/result exhaustion, cmdu %u resu %u\n",
- dma->cmdu, dma->resu);
+ sc->sc_cmdu, sc->sc_resu);
}
#endif
hifnstats.hst_nomem_cr++;
@@ -1916,14 +1916,14 @@ hifn_crypto(
}
if (m0 == NULL) {
hifnstats.hst_nomem_mbuf++;
- err = dma->cmdu ? ERESTART : ENOMEM;
+ err = sc->sc_cmdu ? ERESTART : ENOMEM;
goto err_srcmap;
}
if (totlen >= MINCLSIZE) {
MCLGET(m0, M_DONTWAIT);
if ((m0->m_flags & M_EXT) == 0) {
hifnstats.hst_nomem_mcl++;
- err = dma->cmdu ? ERESTART : ENOMEM;
+ err = sc->sc_cmdu ? ERESTART : ENOMEM;
m_freem(m0);
goto err_srcmap;
}
@@ -1937,7 +1937,7 @@ hifn_crypto(
MGET(m, M_DONTWAIT, MT_DATA);
if (m == NULL) {
hifnstats.hst_nomem_mbuf++;
- err = dma->cmdu ? ERESTART : ENOMEM;
+ err = sc->sc_cmdu ? ERESTART : ENOMEM;
m_freem(m0);
goto err_srcmap;
}
@@ -1946,7 +1946,7 @@ hifn_crypto(
MCLGET(m, M_DONTWAIT);
if ((m->m_flags & M_EXT) == 0) {
hifnstats.hst_nomem_mcl++;
- err = dma->cmdu ? ERESTART :
ENOMEM;
+ err = sc->sc_cmdu ? ERESTART :
ENOMEM;
mlast->m_next = m;
m_freem(m0);
goto err_srcmap;
@@ -1994,7 +1994,7 @@ hifn_crypto(
"Entering cmd: stat %8x ien %8x u %d/%d/%d/%d n %d/%d\n",
READ_REG_1(sc, HIFN_1_DMA_CSR),
READ_REG_1(sc, HIFN_1_DMA_IER),
- dma->cmdu, dma->srcu, dma->dstu, dma->resu,
+ sc->sc_cmdu, sc->sc_srcu, sc->sc_dstu, sc->sc_resu,
cmd->src_nsegs, cmd->dst_nsegs);
}
#endif
@@ -2012,14 +2012,14 @@ hifn_crypto(
/*
* need N src, and N dst
*/
- if ((dma->srcu + cmd->src_nsegs) > HIFN_D_SRC_RSIZE ||
- (dma->dstu + cmd->dst_nsegs + 1) > HIFN_D_DST_RSIZE) {
+ if ((sc->sc_srcu + cmd->src_nsegs) > HIFN_D_SRC_RSIZE ||
+ (sc->sc_dstu + cmd->dst_nsegs + 1) > HIFN_D_DST_RSIZE) {
#ifdef HIFN_DEBUG
if (hifn_debug) {
device_printf(sc->sc_dev,
"src/dst exhaustion, srcu %u+%u dstu %u+%u\n",
- dma->srcu, cmd->src_nsegs,
- dma->dstu, cmd->dst_nsegs);
+ sc->sc_srcu, cmd->src_nsegs,
+ sc->sc_dstu, cmd->dst_nsegs);
}
#endif
hifnstats.hst_nomem_sd++;
@@ -2027,14 +2027,14 @@ hifn_crypto(
goto err_dstmap;
}
- if (dma->cmdi == HIFN_D_CMD_RSIZE) {
- dma->cmdi = 0;
+ if (sc->sc_cmdi == HIFN_D_CMD_RSIZE) {
+ sc->sc_cmdi = 0;
dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_VALID |
HIFN_D_JUMP | HIFN_D_MASKDONEIRQ);
HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE,
BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
}
- cmdi = dma->cmdi++;
+ cmdi = sc->sc_cmdi++;
cmdlen = hifn_write_command(cmd, dma->command_bufs[cmdi]);
HIFN_CMD_SYNC(sc, cmdi, BUS_DMASYNC_PREWRITE);
@@ -2043,14 +2043,14 @@ hifn_crypto(
HIFN_D_MASKDONEIRQ);
HIFN_CMDR_SYNC(sc, cmdi,
BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
- dma->cmdu++;
+ sc->sc_cmdu++;
/*
* We don't worry about missing an interrupt (which a "command wait"
* interrupt salvages us from), unless there is more than one command
* in the queue.
*/
- if (dma->cmdu > 1) {
+ if (sc->sc_cmdu > 1) {
sc->sc_dmaier |= HIFN_DMAIER_C_WAIT;
WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
}
@@ -2068,17 +2068,17 @@ hifn_crypto(
if (hifn_debug)
printf("load res\n");
#endif
- if (dma->resi == HIFN_D_RES_RSIZE) {
- dma->resi = 0;
+ if (sc->sc_resi == HIFN_D_RES_RSIZE) {
+ sc->sc_resi = 0;
dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_VALID |
HIFN_D_JUMP | HIFN_D_MASKDONEIRQ);
HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
}
- resi = dma->resi++;
- KASSERT(dma->hifn_commands[resi] == NULL,
+ resi = sc->sc_resi++;
+ KASSERT(sc->sc_hifn_commands[resi] == NULL,
("hifn_crypto: command slot %u busy", resi));
- dma->hifn_commands[resi] = cmd;
+ sc->sc_hifn_commands[resi] = cmd;
HIFN_RES_SYNC(sc, resi, BUS_DMASYNC_PREREAD);
if ((hint & CRYPTO_HINT_MORE) && sc->sc_curbatch < hifn_maxbatch) {
dma->resr[resi].l = htole32(HIFN_MAX_RESULT |
@@ -2094,7 +2094,7 @@ hifn_crypto(
}
HIFN_RESR_SYNC(sc, resi,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
- dma->resu++;
+ sc->sc_resu++;
if (cmd->sloplen)
cmd->slopidx = resi;
@@ -2159,22 +2159,21 @@ hifn_tick(void* vsc)
HIFN_LOCK(sc);
if (sc->sc_active == 0) {
- struct hifn_dma *dma = sc->sc_dma;
u_int32_t r = 0;
- if (dma->cmdu == 0 && sc->sc_c_busy) {
+ if (sc->sc_cmdu == 0 && sc->sc_c_busy) {
sc->sc_c_busy = 0;
r |= HIFN_DMACSR_C_CTRL_DIS;
}
- if (dma->srcu == 0 && sc->sc_s_busy) {
+ if (sc->sc_srcu == 0 && sc->sc_s_busy) {
sc->sc_s_busy = 0;
r |= HIFN_DMACSR_S_CTRL_DIS;
}
- if (dma->dstu == 0 && sc->sc_d_busy) {
+ if (sc->sc_dstu == 0 && sc->sc_d_busy) {
sc->sc_d_busy = 0;
r |= HIFN_DMACSR_D_CTRL_DIS;
}
- if (dma->resu == 0 && sc->sc_r_busy) {
+ if (sc->sc_resu == 0 && sc->sc_r_busy) {
sc->sc_r_busy = 0;
r |= HIFN_DMACSR_R_CTRL_DIS;
}
@@ -2209,9 +2208,9 @@ hifn_intr(void *arg)
device_printf(sc->sc_dev,
"irq: stat %08x ien %08x damier %08x i %d/%d/%d/%d k
%d/%d/%d/%d u %d/%d/%d/%d\n",
dmacsr, READ_REG_1(sc, HIFN_1_DMA_IER), sc->sc_dmaier,
- dma->cmdi, dma->srci, dma->dsti, dma->resi,
- dma->cmdk, dma->srck, dma->dstk, dma->resk,
- dma->cmdu, dma->srcu, dma->dstu, dma->resu);
+ sc->sc_cmdi, sc->sc_srci, sc->sc_dsti, sc->sc_resi,
+ sc->sc_cmdk, sc->sc_srck, sc->sc_dstk, sc->sc_resk,
+ sc->sc_cmdu, sc->sc_srcu, sc->sc_dstu, sc->sc_resu);
}
#endif
@@ -2243,7 +2242,7 @@ hifn_intr(void *arg)
return;
}
- if ((dmacsr & HIFN_DMACSR_C_WAIT) && (dma->cmdu == 0)) {
+ if ((dmacsr & HIFN_DMACSR_C_WAIT) && (sc->sc_cmdu == 0)) {
/*
* If no slots to process and we receive a "waiting on
* command" interrupt, we disable the "waiting on command"
@@ -2254,7 +2253,7 @@ hifn_intr(void *arg)
}
/* clear the rings */
- i = dma->resk; u = dma->resu;
+ i = sc->sc_resk; u = sc->sc_resu;
while (u != 0) {
HIFN_RESR_SYNC(sc, i,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
@@ -2269,10 +2268,10 @@ hifn_intr(void *arg)
u_int8_t *macbuf = NULL;
HIFN_RES_SYNC(sc, i, BUS_DMASYNC_POSTREAD);
- cmd = dma->hifn_commands[i];
+ cmd = sc->sc_hifn_commands[i];
KASSERT(cmd != NULL,
("hifn_intr: null command slot %u", i));
- dma->hifn_commands[i] = NULL;
+ sc->sc_hifn_commands[i] = NULL;
if (cmd->base_masks & HIFN_BASE_CMD_MAC) {
macbuf = dma->result_bufs[i];
@@ -2287,9 +2286,9 @@ hifn_intr(void *arg)
if (++i == (HIFN_D_RES_RSIZE + 1))
i = 0;
}
- dma->resk = i; dma->resu = u;
+ sc->sc_resk = i; sc->sc_resu = u;
- i = dma->srck; u = dma->srcu;
+ i = sc->sc_srck; u = sc->sc_srcu;
while (u != 0) {
if (i == HIFN_D_SRC_RSIZE)
i = 0;
@@ -2302,9 +2301,9 @@ hifn_intr(void *arg)
}
i++, u--;
}
- dma->srck = i; dma->srcu = u;
+ sc->sc_srck = i; sc->sc_srcu = u;
- i = dma->cmdk; u = dma->cmdu;
+ i = sc->sc_cmdk; u = sc->sc_cmdu;
while (u != 0) {
HIFN_CMDR_SYNC(sc, i,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
@@ -2320,7 +2319,7 @@ hifn_intr(void *arg)
if (++i == (HIFN_D_CMD_RSIZE + 1))
i = 0;
}
- dma->cmdk = i; dma->cmdu = u;
+ sc->sc_cmdk = i; sc->sc_cmdu = u;
HIFN_UNLOCK(sc);
@@ -2331,7 +2330,7 @@ hifn_intr(void *arg)
device_printf(sc->sc_dev,
"wakeup crypto (%x) u %d/%d/%d/%d\n",
sc->sc_needwakeup,
- dma->cmdu, dma->srcu, dma->dstu, dma->resu);
+ sc->sc_cmdu, sc->sc_srcu, sc->sc_dstu,
sc->sc_resu);
#endif
sc->sc_needwakeup &= ~wakeup;
crypto_unblock(sc->sc_cid, wakeup);
@@ -2725,11 +2724,11 @@ hifn_abort(struct hifn_softc *sc)
struct cryptop *crp;
int i, u;
- i = dma->resk; u = dma->resu;
+ i = sc->sc_resk; u = sc->sc_resu;
while (u != 0) {
- cmd = dma->hifn_commands[i];
+ cmd = sc->sc_hifn_commands[i];
KASSERT(cmd != NULL, ("hifn_abort: null command slot %u", i));
- dma->hifn_commands[i] = NULL;
+ sc->sc_hifn_commands[i] = NULL;
crp = cmd->crp;
if ((dma->resr[i].l & htole32(HIFN_D_VALID)) == 0) {
@@ -2783,7 +2782,7 @@ hifn_abort(struct hifn_softc *sc)
i = 0;
u--;
}
- dma->resk = i; dma->resu = u;
+ sc->sc_resk = i; sc->sc_resu = u;
hifn_reset_board(sc, 1);
hifn_init_dma(sc);
@@ -2831,7 +2830,7 @@ hifn_callback(struct hifn_softc *sc, str
(caddr_t)&dma->slop[cmd->slopidx]);
}
- i = dma->dstk; u = dma->dstu;
+ i = sc->sc_dstk; u = sc->sc_dstu;
while (u != 0) {
if (i == HIFN_D_DST_RSIZE)
i = 0;
@@ -2844,7 +2843,7 @@ hifn_callback(struct hifn_softc *sc, str
}
i++, u--;
}
- dma->dstk = i; dma->dstu = u;
+ sc->sc_dstk = i; sc->sc_dstu = u;
hifnstats.hst_obytes += cmd->dst_mapsize;
Modified: head/sys/dev/hifn/hifn7751var.h
==============================================================================
--- head/sys/dev/hifn/hifn7751var.h Fri Sep 24 02:41:52 2010
(r213090)
+++ head/sys/dev/hifn/hifn7751var.h Fri Sep 24 04:46:46 2010
(r213091)
@@ -81,7 +81,8 @@
#define MAX_SCATTER 64
/*
- * Data structure to hold all 4 rings and any other ring related data.
+ * Data structure to hold all 4 rings and any other ring related data
+ * that should reside in DMA.
*/
struct hifn_dma {
/*
@@ -93,22 +94,13 @@ struct hifn_dma {
struct hifn_desc dstr[HIFN_D_DST_RSIZE+1];
struct hifn_desc resr[HIFN_D_RES_RSIZE+1];
- struct hifn_command *hifn_commands[HIFN_D_RES_RSIZE];
u_char
command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND];
u_char result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT];
u_int32_t slop[HIFN_D_CMD_RSIZE];
-
u_int64_t test_src, test_dst;
+} ;
- /*
- * Our current positions for insertion and removal from the desriptor
- * rings.
- */
- int cmdi, srci, dsti, resi;
- volatile int cmdu, srcu, dstu, resu;
- int cmdk, srck, dstk, resk;
-};
struct hifn_session {
int hs_used;
@@ -157,6 +149,15 @@ struct hifn_softc {
bus_dma_segment_t sc_dmasegs[1];
bus_addr_t sc_dma_physaddr;/* physical address of sc_dma */
int sc_dmansegs;
+ struct hifn_command *sc_hifn_commands[HIFN_D_RES_RSIZE];
+ /*
+ * Our current positions for insertion and removal from the desriptor
+ * rings.
+ */
+ int sc_cmdi, sc_srci, sc_dsti, sc_resi;
+ volatile int sc_cmdu, sc_srcu, sc_dstu, sc_resu;
+ int sc_cmdk, sc_srck, sc_dstk, sc_resk;
+
int32_t sc_cid;
int sc_maxses;
int sc_nsessions;
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