Author: luporl
Date: Thu Nov 5 20:18:00 2020
New Revision: 367397
URL: https://svnweb.freebsd.org/changeset/base/367397
Log:
Fix powerpc and powerpcspe builds
This change fixes 32-bit PowerPC builds, that r367390 broke
(shift count >= width of type).
Modified:
head/sys/powerpc/include/spr.h
Modified: head/sys/powerpc/include/spr.h
==============================================================================
--- head/sys/powerpc/include/spr.h Thu Nov 5 19:37:56 2020
(r367396)
+++ head/sys/powerpc/include/spr.h Thu Nov 5 20:18:00 2020
(r367397)
@@ -492,13 +492,13 @@
#define SPR_MMCR2 0x311
#define SPR_MMCR2_CNBIT(n, bit) ((bit) << (((5 - (n)) * 9) + 10))
-#define SPR_MMCR2_FCNS(n) SPR_MMCR2_CNBIT(n, 0x100UL)
-#define SPR_MMCR2_FCNP0(n) SPR_MMCR2_CNBIT(n, 0x080UL)
-#define SPR_MMCR2_FCNP1(n) SPR_MMCR2_CNBIT(n, 0x040UL)
-#define SPR_MMCR2_FCNM1(n) SPR_MMCR2_CNBIT(n, 0x020UL)
-#define SPR_MMCR2_FCNM0(n) SPR_MMCR2_CNBIT(n, 0x010UL)
-#define SPR_MMCR2_FCNWAIT(n) SPR_MMCR2_CNBIT(n, 0x008UL)
-#define SPR_MMCR2_FCNH(n) SPR_MMCR2_CNBIT(n, 0x004UL)
+#define SPR_MMCR2_FCNS(n) SPR_MMCR2_CNBIT(n, 0x100ULL)
+#define SPR_MMCR2_FCNP0(n) SPR_MMCR2_CNBIT(n, 0x080ULL)
+#define SPR_MMCR2_FCNP1(n) SPR_MMCR2_CNBIT(n, 0x040ULL)
+#define SPR_MMCR2_FCNM1(n) SPR_MMCR2_CNBIT(n, 0x020ULL)
+#define SPR_MMCR2_FCNM0(n) SPR_MMCR2_CNBIT(n, 0x010ULL)
+#define SPR_MMCR2_FCNWAIT(n) SPR_MMCR2_CNBIT(n, 0x008ULL)
+#define SPR_MMCR2_FCNH(n) SPR_MMCR2_CNBIT(n, 0x004ULL)
/* Freeze Counter N in Hypervisor/Supervisor/Problem states */
#define SPR_MMCR2_FCNHSP(n) \
(SPR_MMCR2_FCNS(n) | SPR_MMCR2_FCNP0(n) | \
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