In message: <3023270a-755a-4bcf-ac9a-c1f290052...@mac.com>
Marcel Moolenaar <xcl...@mac.com> writes:
:
: On Jan 26, 2010, at 12:09 PM, M. Warner Losh wrote:
: > cpu_switch(struct thread *old, struct thread *new, struct mutext *mtx)
: > {
: > /* Save the registers to the pcb */
: > old->td_lock = mtx;
: > #if defined(SMP) && defined(SCHED_ULE)
: > /* s/long/int/ if sizeof(long) != sizeof(void *) */
: > /* as we have no 'void *' version of the atomics */
: > while (atomic_load_acq_long(&new->td_lock) == (long)&blocked_lock)
: > continue;
: > #endif
: > /* Switch to new context */
: > }
:
: Ok. So this is what ia64 has already, except for the atomic_load()
: in the while loop. Since td_lock is volatile, I don't think we need
: atomic_load(). To be explicit, ia64 has:
:
: old->td_lock = mtx;
: #if defined(SCHED_ULE) && defined(SMP)
: /* td_lock is volatile */
: while (new->td_lock == &blocked_lock)
: ;
: #endif
:
: Am I right, or am I missing a critical aspect of using atomic load?
The Atomic load acq also has a memory barrier after the item is
fetched from memory.
: > I also think that we should have that code somewhere for reference.
:
: Since ia64 has a C implementation of cpu_switch(), we could make
: that the reference implementation?
Most likely :)
Warner
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