Author: mav
Date: Fri Jan 15 23:58:37 2010
New Revision: 202428
URL: http://svn.freebsd.org/changeset/base/202428
Log:
MFC r202011:
While AHCI specification tells that multi-vector MSI doesn't use global IS
register, nVidia chipsets have different oppinion, requiring every interrupt
to be acknowledged there.
While there, add interrupt descriptions in multi-vector MSI mode.
Modified:
stable/8/sys/dev/ahci/ahci.c
Directory Properties:
stable/8/sys/ (props changed)
stable/8/sys/amd64/include/xen/ (props changed)
stable/8/sys/cddl/contrib/opensolaris/ (props changed)
stable/8/sys/contrib/dev/acpica/ (props changed)
stable/8/sys/contrib/pf/ (props changed)
stable/8/sys/dev/xen/xenpci/ (props changed)
Modified: stable/8/sys/dev/ahci/ahci.c
==============================================================================
--- stable/8/sys/dev/ahci/ahci.c Fri Jan 15 23:56:19 2010
(r202427)
+++ stable/8/sys/dev/ahci/ahci.c Fri Jan 15 23:58:37 2010
(r202428)
@@ -570,6 +570,12 @@ ahci_setup_interrupt(device_t dev)
device_printf(dev, "unable to setup interrupt\n");
return ENXIO;
}
+ if (ctlr->numirqs > 1) {
+ bus_describe_intr(dev, ctlr->irqs[i].r_irq,
+ ctlr->irqs[i].handle,
+ ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ?
+ "ch%d" : "%d", i);
+ }
}
return (0);
}
@@ -624,8 +630,14 @@ ahci_intr_one(void *data)
int unit;
unit = irq->r_irq_rid - 1;
+ /* Some controllers have edge triggered IS. */
+ if (ctlr->quirks & AHCI_Q_EDGEIS)
+ ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
if ((arg = ctlr->interrupt[unit].argument))
ctlr->interrupt[unit].function(arg);
+ /* AHCI declares level triggered IS. */
+ if (!(ctlr->quirks & AHCI_Q_EDGEIS))
+ ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
}
static struct resource *
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