Author: chuck
Date: Sat Jul 27 17:52:45 2019
New Revision: 350381
URL: https://svnweb.freebsd.org/changeset/base/350381
Log:
MFC r348781
bhyve: Add PCIe Integrated Endpoint capability
Approved by: imp (mentor)
Modified:
stable/12/usr.sbin/bhyve/pci_emul.c
stable/12/usr.sbin/bhyve/pci_nvme.c
Directory Properties:
stable/12/ (props changed)
Modified: stable/12/usr.sbin/bhyve/pci_emul.c
==============================================================================
--- stable/12/usr.sbin/bhyve/pci_emul.c Sat Jul 27 17:48:35 2019
(r350380)
+++ stable/12/usr.sbin/bhyve/pci_emul.c Sat Jul 27 17:52:45 2019
(r350381)
@@ -947,15 +947,23 @@ pci_emul_add_pciecap(struct pci_devinst *pi, int type)
int err;
struct pciecap pciecap;
- if (type != PCIEM_TYPE_ROOT_PORT)
- return (-1);
-
bzero(&pciecap, sizeof(pciecap));
+ /*
+ * Use the integrated endpoint type for endpoints on a root complex bus.
+ *
+ * NB: bhyve currently only supports a single PCI bus that is the root
+ * complex bus, so all endpoints are integrated.
+ */
+ if ((type == PCIEM_TYPE_ENDPOINT) && (pi->pi_bus == 0))
+ type = PCIEM_TYPE_ROOT_INT_EP;
+
pciecap.capid = PCIY_EXPRESS;
- pciecap.pcie_capabilities = PCIECAP_VERSION | PCIEM_TYPE_ROOT_PORT;
- pciecap.link_capabilities = 0x411; /* gen1, x1 */
- pciecap.link_status = 0x11; /* gen1, x1 */
+ pciecap.pcie_capabilities = PCIECAP_VERSION | type;
+ if (type != PCIEM_TYPE_ROOT_INT_EP) {
+ pciecap.link_capabilities = 0x411; /* gen1, x1 */
+ pciecap.link_status = 0x11; /* gen1, x1 */
+ }
err = pci_emul_add_capability(pi, (u_char *)&pciecap, sizeof(pciecap));
return (err);
Modified: stable/12/usr.sbin/bhyve/pci_nvme.c
==============================================================================
--- stable/12/usr.sbin/bhyve/pci_nvme.c Sat Jul 27 17:48:35 2019
(r350380)
+++ stable/12/usr.sbin/bhyve/pci_nvme.c Sat Jul 27 17:52:45 2019
(r350381)
@@ -1925,6 +1925,12 @@ pci_nvme_init(struct vmctx *ctx, struct pci_devinst *p
goto done;
}
+ error = pci_emul_add_pciecap(pi, PCIEM_TYPE_ROOT_INT_EP);
+ if (error) {
+ WPRINTF(("%s pci add Express capability failed\r\n", __func__));
+ goto done;
+ }
+
pthread_mutex_init(&sc->mtx, NULL);
sem_init(&sc->iosemlock, 0, sc->ioslots);
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