Author: markj
Date: Fri May 25 19:16:05 2018
New Revision: 334220
URL: https://svnweb.freebsd.org/changeset/base/334220
Log:
MFC r334050, r334051:
Flush caches before initiating a microcode update on Intel CPUs.
Approved by: re (gjb, kib)
Modified:
stable/11/sys/dev/cpuctl/cpuctl.c
Directory Properties:
stable/11/ (props changed)
Modified: stable/11/sys/dev/cpuctl/cpuctl.c
==============================================================================
--- stable/11/sys/dev/cpuctl/cpuctl.c Fri May 25 19:12:30 2018
(r334219)
+++ stable/11/sys/dev/cpuctl/cpuctl.c Fri May 25 19:16:05 2018
(r334220)
@@ -365,8 +365,10 @@ update_intel(int cpu, cpuctl_update_args_t *args, stru
rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
/*
- * Perform update.
+ * Perform update. Flush caches first to work around seemingly
+ * undocumented errata applying to some Broadwell CPUs.
*/
+ wbinvd();
wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
wrmsr_safe(MSR_BIOS_SIGN, 0);
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