Author: manu
Date: Thu Dec 15 17:26:16 2016
New Revision: 310122
URL: https://svnweb.freebsd.org/changeset/base/310122
Log:
Fix building arm64 kernel after r310117
Pointy hat: me
MFC after: 3 days
Modified:
head/sys/arm/allwinner/a64/a64_padconf.c
head/sys/arm/allwinner/a64/a64_r_padconf.c
Modified: head/sys/arm/allwinner/a64/a64_padconf.c
==============================================================================
--- head/sys/arm/allwinner/a64/a64_padconf.c Thu Dec 15 16:52:17 2016
(r310121)
+++ head/sys/arm/allwinner/a64/a64_padconf.c Thu Dec 15 17:26:16 2016
(r310122)
@@ -41,16 +41,16 @@ __FBSDID("$FreeBSD$");
#ifdef SOC_ALLWINNER_A64
static const struct allwinner_pins a64_pins[] = {
- { "PB0", 1, 0, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", NULL,
"pb_eint0" } 6, 0},
- { "PB1", 1, 1, { "gpio_in", "gpio_out", "uart2", NULL, "jtag",
"sim", "pb_eint1" } 6, 1},
- { "PB2", 1, 2, { "gpio_in", "gpio_out", "uart2", NULL, "jtag",
"sim", "pb_eint2" } 6, 2},
- { "PB3", 1, 3, { "gpio_in", "gpio_out", "uart2", "i2s0", "jtag",
"sim", "pb_eint3" } 6, 3},
- { "PB4", 1, 4, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim",
"pb_eint4" } 6, 4},
- { "PB5", 1, 5, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim",
"pb_eint5" } 6, 5},
- { "PB6", 1, 6, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim",
"pb_eint6" } 6, 6},
- { "PB7", 1, 7, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim",
"pb_eint7" } 6, 7},
- { "PB8", 1, 8, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL,
"pb_eint8" } 6, 8},
- { "PB9", 1, 9, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL,
"pb_eint9" } 6, 9},
+ { "PB0", 1, 0, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", NULL,
"pb_eint0" }, 6, 0},
+ { "PB1", 1, 1, { "gpio_in", "gpio_out", "uart2", NULL, "jtag",
"sim", "pb_eint1" }, 6, 1},
+ { "PB2", 1, 2, { "gpio_in", "gpio_out", "uart2", NULL, "jtag",
"sim", "pb_eint2" }, 6, 2},
+ { "PB3", 1, 3, { "gpio_in", "gpio_out", "uart2", "i2s0", "jtag",
"sim", "pb_eint3" }, 6, 3},
+ { "PB4", 1, 4, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim",
"pb_eint4" }, 6, 4},
+ { "PB5", 1, 5, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim",
"pb_eint5" }, 6, 5},
+ { "PB6", 1, 6, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim",
"pb_eint6" }, 6, 6},
+ { "PB7", 1, 7, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim",
"pb_eint7" }, 6, 7},
+ { "PB8", 1, 8, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL,
"pb_eint8" }, 6, 8},
+ { "PB9", 1, 9, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL,
"pb_eint9" }, 6, 9},
{ "PC0", 2, 0, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
{ "PC1", 2, 1, { "gpio_in", "gpio_out", "nand", "mmc2", "spi0" } },
@@ -123,33 +123,33 @@ static const struct allwinner_pins a64_p
{ "PF5", 5, 5, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
{ "PF6", 5, 6, { "gpio_in", "gpio_out" } },
- { "PG0", 6, 0, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint0" } 6, 0},
- { "PG1", 6, 1, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint1" } 6, 1},
- { "PG2", 6, 2, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint2" } 6, 2},
- { "PG3", 6, 3, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint3" } 6, 3},
- { "PG4", 6, 4, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint4" } 6, 4},
- { "PG5", 6, 5, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint5" } 6, 5},
- { "PG6", 6, 6, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL,
"pg_eint6" } 6, 6},
- { "PG7", 6, 7, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL,
"pg_eint7" } 6, 7},
- { "PG8", 6, 8, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL,
"pg_eint8" } 6, 8},
- { "PG9", 6, 9, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL,
"pg_eint9" } 6, 9},
- { "PG10", 6, 10, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL,
"pg_eint10" } 6, 10},
- { "PG11", 6, 11, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL,
"pg_eint11" } 6, 11},
- { "PG12", 6, 12, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL,
"pg_eint12" } 6, 12},
- { "PG13", 6, 13, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL,
"pg_eint13" } 6, 13},
-
- { "PH0", 7, 0, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL,
"ph_eint0" } 6, 0},
- { "PH1", 7, 1, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL,
"ph_eint1" } 6, 1},
- { "PH2", 7, 2, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL,
"ph_eint2" } 6, 2},
- { "PH3", 7, 3, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL,
"ph_eint3" } 6, 3},
- { "PH4", 7, 4, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL,
"ph_eint4" } 6, 4},
- { "PH5", 7, 5, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL,
"ph_eint5" } 6, 5},
- { "PH6", 7, 6, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL,
"ph_eint6" } 6, 6},
- { "PH7", 7, 7, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL,
"ph_eint7" } 6, 7},
- { "PH8", 7, 8, { "gpio_in", "gpio_out", "owa", NULL, NULL, NULL,
"ph_eint8" } 6, 8},
- { "PH9", 7, 9, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL,
"ph_eint9" } 6, 9},
- { "PH10", 7, 10, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL,
"ph_eint10" } 6, 10},
- { "PH11", 7, 11, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL,
"ph_eint11" } 6, 11},
+ { "PG0", 6, 0, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint0" }, 6, 0},
+ { "PG1", 6, 1, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint1" }, 6, 1},
+ { "PG2", 6, 2, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint2" }, 6, 2},
+ { "PG3", 6, 3, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint3" }, 6, 3},
+ { "PG4", 6, 4, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint4" }, 6, 4},
+ { "PG5", 6, 5, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL,
"pg_eint5" }, 6, 5},
+ { "PG6", 6, 6, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL,
"pg_eint6" }, 6, 6},
+ { "PG7", 6, 7, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL,
"pg_eint7" }, 6, 7},
+ { "PG8", 6, 8, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL,
"pg_eint8" }, 6, 8},
+ { "PG9", 6, 9, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL,
"pg_eint9" }, 6, 9},
+ { "PG10", 6, 10, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL,
"pg_eint10" }, 6, 10},
+ { "PG11", 6, 11, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL,
"pg_eint11" }, 6, 11},
+ { "PG12", 6, 12, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL,
"pg_eint12" }, 6, 12},
+ { "PG13", 6, 13, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL,
"pg_eint13" }, 6, 13},
+
+ { "PH0", 7, 0, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL,
"ph_eint0" }, 6, 0},
+ { "PH1", 7, 1, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL,
"ph_eint1" }, 6, 1},
+ { "PH2", 7, 2, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL,
"ph_eint2" }, 6, 2},
+ { "PH3", 7, 3, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL,
"ph_eint3" }, 6, 3},
+ { "PH4", 7, 4, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL,
"ph_eint4" }, 6, 4},
+ { "PH5", 7, 5, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL,
"ph_eint5" }, 6, 5},
+ { "PH6", 7, 6, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL,
"ph_eint6" }, 6, 6},
+ { "PH7", 7, 7, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL,
"ph_eint7" }, 6, 7},
+ { "PH8", 7, 8, { "gpio_in", "gpio_out", "owa", NULL, NULL, NULL,
"ph_eint8" }, 6, 8},
+ { "PH9", 7, 9, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL,
"ph_eint9" }, 6, 9},
+ { "PH10", 7, 10, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL,
"ph_eint10" }, 6, 10},
+ { "PH11", 7, 11, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL,
"ph_eint11" }, 6, 11},
};
const struct allwinner_padconf a64_padconf = {
Modified: head/sys/arm/allwinner/a64/a64_r_padconf.c
==============================================================================
--- head/sys/arm/allwinner/a64/a64_r_padconf.c Thu Dec 15 16:52:17 2016
(r310121)
+++ head/sys/arm/allwinner/a64/a64_r_padconf.c Thu Dec 15 17:26:16 2016
(r310122)
@@ -41,19 +41,19 @@ __FBSDID("$FreeBSD$");
#ifdef SOC_ALLWINNER_A64
static const struct allwinner_pins a64_r_pins[] = {
- { "PL0", 0, 0, { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL,
NULL, "pl_eint0" } 6, 0},
- { "PL1", 0, 1, { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL,
NULL, "pl_eint1" } 6, 1},
- { "PL2", 0, 2, { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL,
"pl_eint2" } 6, 2},
- { "PL3", 0, 3, { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL,
"pl_eint3" } 6, 3},
- { "PL4", 0, 4, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL,
"pl_eint4" } 6, 4},
- { "PL5", 0, 5, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL,
"pl_eint5" } 6, 5},
- { "PL6", 0, 6, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL,
"pl_eint6" } 6, 6},
- { "PL7", 0, 7, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL,
"pl_eint7" } 6, 7},
- { "PL8", 0, 8, { "gpio_in", "gpio_out", "s_i2c", NULL, NULL, NULL,
"pl_eint8" } 6, 8},
- { "PL9", 0, 9, { "gpio_in", "gpio_out", "s_i2c", NULL, NULL, NULL,
"pl_eint9" } 6, 9},
- { "PL10", 0, 10, { "gpio_in", "gpio_out", "s_pwm", NULL, NULL, NULL,
"pl_eint10" } 6, 10},
- { "PL11", 0, 11, { "gpio_in", "gpio_out", "s_cir", NULL, NULL, NULL,
"pl_eint11" } 6, 11},
- { "PL12", 0, 12, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL,
"pl_eint12" } 6, 12},
+ { "PL0", 0, 0, { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL,
NULL, "pl_eint0" }, 6, 0},
+ { "PL1", 0, 1, { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL,
NULL, "pl_eint1" }, 6, 1},
+ { "PL2", 0, 2, { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL,
"pl_eint2" }, 6, 2},
+ { "PL3", 0, 3, { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL,
"pl_eint3" }, 6, 3},
+ { "PL4", 0, 4, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL,
"pl_eint4" }, 6, 4},
+ { "PL5", 0, 5, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL,
"pl_eint5" }, 6, 5},
+ { "PL6", 0, 6, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL,
"pl_eint6" }, 6, 6},
+ { "PL7", 0, 7, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL,
"pl_eint7" }, 6, 7},
+ { "PL8", 0, 8, { "gpio_in", "gpio_out", "s_i2c", NULL, NULL, NULL,
"pl_eint8" }, 6, 8},
+ { "PL9", 0, 9, { "gpio_in", "gpio_out", "s_i2c", NULL, NULL, NULL,
"pl_eint9" }, 6, 9},
+ { "PL10", 0, 10, { "gpio_in", "gpio_out", "s_pwm", NULL, NULL, NULL,
"pl_eint10" }, 6, 10},
+ { "PL11", 0, 11, { "gpio_in", "gpio_out", "s_cir", NULL, NULL, NULL,
"pl_eint11" }, 6, 11},
+ { "PL12", 0, 12, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL,
"pl_eint12" }, 6, 12},
};
const struct allwinner_padconf a64_r_padconf = {
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