Author: andrew
Date: Sun Jul 31 12:59:10 2016
New Revision: 303585
URL: https://svnweb.freebsd.org/changeset/base/303585
Log:
Relax the barriers around a TLB invalidation to only wait on
inner-shareable memory accesses. There is no need for full system barriers.
Obtained from: ABT Systems Ltd
MFC after: 1 month
Sponsored by: The FreeBSD Foundation
Modified:
head/sys/arm64/arm64/pmap.c
Modified: head/sys/arm64/arm64/pmap.c
==============================================================================
--- head/sys/arm64/arm64/pmap.c Sun Jul 31 12:11:55 2016 (r303584)
+++ head/sys/arm64/arm64/pmap.c Sun Jul 31 12:59:10 2016 (r303585)
@@ -865,9 +865,9 @@ pmap_invalidate_page(pmap_t pmap, vm_off
sched_pin();
__asm __volatile(
- "dsb sy \n"
+ "dsb ishst \n"
"tlbi vaae1is, %0 \n"
- "dsb sy \n"
+ "dsb ish \n"
"isb \n"
: : "r"(va >> PAGE_SHIFT));
sched_unpin();
@@ -879,13 +879,13 @@ pmap_invalidate_range(pmap_t pmap, vm_of
vm_offset_t addr;
sched_pin();
- __asm __volatile("dsb sy");
+ dsb(ishst);
for (addr = sva; addr < eva; addr += PAGE_SIZE) {
__asm __volatile(
"tlbi vaae1is, %0" : : "r"(addr >> PAGE_SHIFT));
}
__asm __volatile(
- "dsb sy \n"
+ "dsb ish \n"
"isb \n");
sched_unpin();
}
@@ -896,9 +896,9 @@ pmap_invalidate_all(pmap_t pmap)
sched_pin();
__asm __volatile(
- "dsb sy \n"
+ "dsb ishst \n"
"tlbi vmalle1is \n"
- "dsb sy \n"
+ "dsb ish \n"
"isb \n");
sched_unpin();
}
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