Author: jfv
Date: Fri Apr 10 02:45:00 2009
New Revision: 190877
URL: http://svn.freebsd.org/changeset/base/190877

Log:
  Add missing file, sorry bout that :)

Added:
  head/sys/dev/ixgbe/ixgbe_82599.c   (contents, props changed)

Added: head/sys/dev/ixgbe/ixgbe_82599.c
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/ixgbe/ixgbe_82599.c    Fri Apr 10 02:45:00 2009        
(r190877)
@@ -0,0 +1,2444 @@
+/******************************************************************************
+
+  Copyright (c) 2001-2009, Intel Corporation 
+  All rights reserved.
+  
+  Redistribution and use in source and binary forms, with or without 
+  modification, are permitted provided that the following conditions are met:
+  
+   1. Redistributions of source code must retain the above copyright notice, 
+      this list of conditions and the following disclaimer.
+  
+   2. Redistributions in binary form must reproduce the above copyright 
+      notice, this list of conditions and the following disclaimer in the 
+      documentation and/or other materials provided with the distribution.
+  
+   3. Neither the name of the Intel Corporation nor the names of its 
+      contributors may be used to endorse or promote products derived from 
+      this software without specific prior written permission.
+  
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGE.
+
+******************************************************************************/
+/*$FreeBSD$*/
+
+#include "ixgbe_type.h"
+#include "ixgbe_api.h"
+#include "ixgbe_common.h"
+#include "ixgbe_phy.h"
+
+u32 ixgbe_get_pcie_msix_count_82599(struct ixgbe_hw *hw);
+s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
+s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
+                                      ixgbe_link_speed *speed,
+                                      bool *autoneg);
+enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw);
+s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw);
+s32 ixgbe_setup_mac_link_speed_multispeed_fiber(struct ixgbe_hw *hw,
+                                     ixgbe_link_speed speed, bool autoneg,
+                                     bool autoneg_wait_to_complete);
+s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw);
+s32 ixgbe_check_mac_link_82599(struct ixgbe_hw *hw,
+                               ixgbe_link_speed *speed,
+                               bool *link_up, bool link_up_wait_to_complete);
+s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw,
+                                     ixgbe_link_speed speed,
+                                     bool autoneg,
+                                     bool autoneg_wait_to_complete);
+static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw);
+static s32 ixgbe_setup_copper_link_speed_82599(struct ixgbe_hw *hw,
+                                               ixgbe_link_speed speed,
+                                               bool autoneg,
+                                               bool autoneg_wait_to_complete);
+s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw);
+void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw);
+s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw);
+s32 ixgbe_set_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
+s32 ixgbe_clear_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
+s32 ixgbe_insert_mac_addr_82599(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
+s32 ixgbe_set_vfta_82599(struct ixgbe_hw *hw, u32 vlan,
+                         u32 vind, bool vlan_on);
+s32 ixgbe_clear_vfta_82599(struct ixgbe_hw *hw);
+s32 ixgbe_init_uta_tables_82599(struct ixgbe_hw *hw);
+s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
+s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
+s32 ixgbe_start_hw_rev_1_82599(struct ixgbe_hw *hw);
+s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw);
+s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw);
+u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw);
+s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval);
+s32 ixgbe_get_san_mac_addr_offset_82599(struct ixgbe_hw *hw,
+                                        u16 *san_mac_offset);
+s32 ixgbe_get_san_mac_addr_82599(struct ixgbe_hw *hw, u8 *san_mac_addr);
+s32 ixgbe_set_san_mac_addr_82599(struct ixgbe_hw *hw, u8 *san_mac_addr);
+s32 ixgbe_get_device_caps_82599(struct ixgbe_hw *hw, u16 *device_caps);
+
+void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw)
+{
+       struct ixgbe_mac_info *mac = &hw->mac;
+
+       DEBUGFUNC("ixgbe_init_mac_link_ops_82599");
+
+       if (hw->phy.multispeed_fiber) {
+               /* Set up dual speed SFP+ support */
+               mac->ops.setup_link =
+                         &ixgbe_setup_mac_link_multispeed_fiber;
+               mac->ops.setup_link_speed =
+                         &ixgbe_setup_mac_link_speed_multispeed_fiber;
+       } else {
+               mac->ops.setup_link =
+                       &ixgbe_setup_mac_link_82599;
+               mac->ops.setup_link_speed =
+                         &ixgbe_setup_mac_link_speed_82599;
+       }
+}
+
+/**
+ *  ixgbe_init_phy_ops_82599 - PHY/SFP specific init
+ *  @hw: pointer to hardware structure
+ *
+ *  Initialize any function pointers that were not able to be
+ *  set during init_shared_code because the PHY/SFP type was
+ *  not known.  Perform the SFP init if necessary.
+ *
+ **/
+s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)
+{
+       struct ixgbe_mac_info *mac = &hw->mac;
+       struct ixgbe_phy_info *phy = &hw->phy;
+       s32 ret_val = IXGBE_SUCCESS;
+
+       DEBUGFUNC("ixgbe_init_phy_ops_82599");
+
+       /* Identify the PHY or SFP module */
+       ret_val = phy->ops.identify(hw);
+       if (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED)
+               goto init_phy_ops_out;
+
+       /* Setup function pointers based on detected SFP module and speeds */
+       ixgbe_init_mac_link_ops_82599(hw);
+       if (hw->phy.sfp_type != ixgbe_sfp_type_unknown)
+               hw->phy.ops.reset = NULL;
+
+       /* If copper media, overwrite with copper function pointers */
+       if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {
+               mac->ops.setup_link = &ixgbe_setup_copper_link_82599;
+               mac->ops.setup_link_speed =
+                                    &ixgbe_setup_copper_link_speed_82599;
+               mac->ops.get_link_capabilities =
+                                 &ixgbe_get_copper_link_capabilities_generic;
+       }
+
+       /* Set necessary function pointers based on phy type */
+       switch (hw->phy.type) {
+       case ixgbe_phy_tn:
+               phy->ops.check_link = &ixgbe_check_phy_link_tnx;
+               phy->ops.get_firmware_version =
+                            &ixgbe_get_phy_firmware_version_tnx;
+               break;
+       case ixgbe_phy_aq:
+               phy->ops.get_firmware_version =
+                            &ixgbe_get_phy_firmware_version_aq;
+               break;
+       default:
+               break;
+       }
+init_phy_ops_out:
+       return ret_val;
+}
+
+s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
+{
+       s32 ret_val = IXGBE_SUCCESS;
+       u16 list_offset, data_offset, data_value;
+
+       DEBUGFUNC("ixgbe_setup_sfp_modules_82599");
+
+       if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) {
+               ixgbe_init_mac_link_ops_82599(hw);
+
+               hw->phy.ops.reset = NULL;
+
+               ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,
+                                                             &data_offset);
+               if (ret_val != IXGBE_SUCCESS)
+                       goto setup_sfp_out;
+
+               hw->eeprom.ops.read(hw, ++data_offset, &data_value);
+               while (data_value != 0xffff) {
+                       IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value);
+                       IXGBE_WRITE_FLUSH(hw);
+                       hw->eeprom.ops.read(hw, ++data_offset, &data_value);
+               }
+               /* Now restart DSP */
+               IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000102);
+               IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000b1d);
+               IXGBE_WRITE_FLUSH(hw);
+       }
+
+setup_sfp_out:
+       return ret_val;
+}
+
+/**
+ *  ixgbe_get_pcie_msix_count_82599 - Gets MSI-X vector count
+ *  @hw: pointer to hardware structure
+ *
+ *  Read PCIe configuration space, and get the MSI-X vector count from
+ *  the capabilities table.
+ **/
+u32 ixgbe_get_pcie_msix_count_82599(struct ixgbe_hw *hw)
+{
+       u32 msix_count = 64;
+
+       if (hw->mac.msix_vectors_from_pcie) {
+               msix_count = IXGBE_READ_PCIE_WORD(hw,
+                                                 IXGBE_PCIE_MSIX_82599_CAPS);
+               msix_count &= IXGBE_PCIE_MSIX_TBL_SZ_MASK;
+
+               /* MSI-X count is zero-based in HW, so increment to give
+                * proper value */
+               msix_count++;
+       }
+
+       return msix_count;
+}
+
+/**
+ *  ixgbe_init_ops_82599 - Inits func ptrs and MAC type
+ *  @hw: pointer to hardware structure
+ *
+ *  Initialize the function pointers and assign the MAC type for 82599.
+ *  Does not touch the hardware.
+ **/
+
+s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw)
+{
+       struct ixgbe_mac_info *mac = &hw->mac;
+       struct ixgbe_phy_info *phy = &hw->phy;
+       s32 ret_val;
+
+       ret_val = ixgbe_init_phy_ops_generic(hw);
+       ret_val = ixgbe_init_ops_generic(hw);
+
+       /* PHY */
+       phy->ops.identify = &ixgbe_identify_phy_82599;
+       phy->ops.init = &ixgbe_init_phy_ops_82599;
+
+       /* MAC */
+       mac->ops.reset_hw = &ixgbe_reset_hw_82599;
+       mac->ops.get_media_type = &ixgbe_get_media_type_82599;
+       mac->ops.get_supported_physical_layer =
+                                   &ixgbe_get_supported_physical_layer_82599;
+       mac->ops.enable_rx_dma = &ixgbe_enable_rx_dma_82599;
+       mac->ops.read_analog_reg8 = &ixgbe_read_analog_reg8_82599;
+       mac->ops.write_analog_reg8 = &ixgbe_write_analog_reg8_82599;
+       mac->ops.start_hw = &ixgbe_start_hw_rev_1_82599;
+       mac->ops.get_san_mac_addr = &ixgbe_get_san_mac_addr_82599;
+       mac->ops.set_san_mac_addr = &ixgbe_set_san_mac_addr_82599;
+       mac->ops.get_device_caps = &ixgbe_get_device_caps_82599;
+
+       /* RAR, Multicast, VLAN */
+       mac->ops.set_vmdq = &ixgbe_set_vmdq_82599;
+       mac->ops.clear_vmdq = &ixgbe_clear_vmdq_82599;
+       mac->ops.insert_mac_addr = &ixgbe_insert_mac_addr_82599;
+       mac->rar_highwater = 1;
+       mac->ops.set_vfta = &ixgbe_set_vfta_82599;
+       mac->ops.clear_vfta = &ixgbe_clear_vfta_82599;
+       mac->ops.init_uta_tables = &ixgbe_init_uta_tables_82599;
+       mac->ops.setup_sfp = &ixgbe_setup_sfp_modules_82599;
+
+       /* Link */
+       mac->ops.get_link_capabilities = &ixgbe_get_link_capabilities_82599;
+       mac->ops.check_link            = &ixgbe_check_mac_link_82599;
+       ixgbe_init_mac_link_ops_82599(hw);
+
+       mac->mcft_size        = 128;
+       mac->vft_size         = 128;
+       mac->num_rar_entries  = 128;
+       mac->max_tx_queues    = 128;
+       mac->max_rx_queues    = 128;
+       mac->max_msix_vectors = ixgbe_get_pcie_msix_count_82599(hw);
+
+       return ret_val;
+}
+
+/**
+ *  ixgbe_get_link_capabilities_82599 - Determines link capabilities
+ *  @hw: pointer to hardware structure
+ *  @speed: pointer to link speed
+ *  @negotiation: TRUE when autoneg or autotry is enabled
+ *
+ *  Determines the link capabilities by reading the AUTOC register.
+ **/
+s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
+                                      ixgbe_link_speed *speed,
+                                      bool *negotiation)
+{
+       s32 status = IXGBE_SUCCESS;
+       u32 autoc = 0;
+
+       /*
+        * Determine link capabilities based on the stored value of AUTOC,
+        * which represents EEPROM defaults.  If AUTOC value has not
+        * been stored, use the current register values.
+        */
+       if (hw->mac.orig_link_settings_stored)
+               autoc = hw->mac.orig_autoc;
+       else
+               autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
+
+       switch (autoc & IXGBE_AUTOC_LMS_MASK) {
+       case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
+               *speed = IXGBE_LINK_SPEED_1GB_FULL;
+               *negotiation = FALSE;
+               break;
+
+       case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
+               *speed = IXGBE_LINK_SPEED_10GB_FULL;
+               *negotiation = FALSE;
+               break;
+
+       case IXGBE_AUTOC_LMS_1G_AN:
+               *speed = IXGBE_LINK_SPEED_1GB_FULL;
+               *negotiation = TRUE;
+               break;
+
+       case IXGBE_AUTOC_LMS_10G_SERIAL:
+               *speed = IXGBE_LINK_SPEED_10GB_FULL;
+               *negotiation = FALSE;
+               break;
+
+       case IXGBE_AUTOC_LMS_KX4_KX_KR:
+       case IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN:
+               *speed = IXGBE_LINK_SPEED_UNKNOWN;
+               if (autoc & IXGBE_AUTOC_KR_SUPP)
+                       *speed |= IXGBE_LINK_SPEED_10GB_FULL;
+               if (autoc & IXGBE_AUTOC_KX4_SUPP)
+                       *speed |= IXGBE_LINK_SPEED_10GB_FULL;
+               if (autoc & IXGBE_AUTOC_KX_SUPP)
+                       *speed |= IXGBE_LINK_SPEED_1GB_FULL;
+               *negotiation = TRUE;
+               break;
+
+       case IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII:
+               *speed = IXGBE_LINK_SPEED_100_FULL;
+               if (autoc & IXGBE_AUTOC_KR_SUPP)
+                       *speed |= IXGBE_LINK_SPEED_10GB_FULL;
+               if (autoc & IXGBE_AUTOC_KX4_SUPP)
+                       *speed |= IXGBE_LINK_SPEED_10GB_FULL;
+               if (autoc & IXGBE_AUTOC_KX_SUPP)
+                       *speed |= IXGBE_LINK_SPEED_1GB_FULL;
+               *negotiation = TRUE;
+               break;
+
+       case IXGBE_AUTOC_LMS_SGMII_1G_100M:
+               *speed = IXGBE_LINK_SPEED_1GB_FULL | IXGBE_LINK_SPEED_100_FULL;
+               *negotiation = FALSE;
+               break;
+
+       default:
+               status = IXGBE_ERR_LINK_SETUP;
+               goto out;
+               break;
+       }
+
+       if (hw->phy.multispeed_fiber) {
+               *speed |= IXGBE_LINK_SPEED_10GB_FULL |
+                         IXGBE_LINK_SPEED_1GB_FULL;
+               *negotiation = TRUE;
+       }
+
+out:
+       return status;
+}
+
+/**
+ *  ixgbe_get_media_type_82599 - Get media type
+ *  @hw: pointer to hardware structure
+ *
+ *  Returns the media type (fiber, copper, backplane)
+ **/
+enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw)
+{
+       enum ixgbe_media_type media_type;
+
+       /* Detect if there is a copper PHY attached. */
+       if (hw->phy.type == ixgbe_phy_cu_unknown ||
+           hw->phy.type == ixgbe_phy_tn ||
+           hw->phy.type == ixgbe_phy_aq) {
+               media_type = ixgbe_media_type_copper;
+               goto out;
+       }
+
+       switch (hw->device_id) {
+       case IXGBE_DEV_ID_82599_KX4:
+               /* Default device ID is mezzanine card KX/KX4 */
+               media_type = ixgbe_media_type_backplane;
+               break;
+       case IXGBE_DEV_ID_82599_SFP:
+               media_type = ixgbe_media_type_fiber;
+               break;
+       case IXGBE_DEV_ID_82599_CX4:
+               media_type = ixgbe_media_type_fiber;
+               break;
+       default:
+               media_type = ixgbe_media_type_unknown;
+               break;
+       }
+out:
+       return media_type;
+}
+
+/**
+ *  ixgbe_setup_mac_link_82599 - Setup MAC link settings
+ *  @hw: pointer to hardware structure
+ *
+ *  Configures link settings based on values in the ixgbe_hw struct.
+ *  Restarts the link.  Performs autonegotiation if needed.
+ **/
+s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw)
+{
+       u32 autoc_reg;
+       u32 links_reg;
+       u32 i;
+       s32 status = IXGBE_SUCCESS;
+
+       /* Restart link */
+       autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
+       autoc_reg |= IXGBE_AUTOC_AN_RESTART;
+       IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
+
+       /* Only poll for autoneg to complete if specified to do so */
+       if (hw->phy.autoneg_wait_to_complete) {
+               if ((autoc_reg & IXGBE_AUTOC_LMS_MASK) ==
+                    IXGBE_AUTOC_LMS_KX4_KX_KR ||
+                   (autoc_reg & IXGBE_AUTOC_LMS_MASK) ==
+                    IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN
+                   || (autoc_reg & IXGBE_AUTOC_LMS_MASK) ==
+                    IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII) {
+                       links_reg = 0; /* Just in case Autoneg time = 0 */
+                       for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
+                               links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
+                               if (links_reg & IXGBE_LINKS_KX_AN_COMP)
+                                       break;
+                               msec_delay(100);
+                       }
+                       if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
+                               status = IXGBE_ERR_AUTONEG_NOT_COMPLETE;
+                               DEBUGOUT("Autoneg did not complete.\n");
+                       }
+               }
+       }
+
+       /* Add delay to filter out noises during initial link setup */
+       msec_delay(50);
+
+       return status;
+}
+
+/**
+ *  ixgbe_setup_mac_link_multispeed_fiber - Setup MAC link settings
+ *  @hw: pointer to hardware structure
+ *
+ *  Configures link settings based on values in the ixgbe_hw struct.
+ *  Restarts the link for multi-speed fiber at 1G speed, if link
+ *  fails at 10G.
+ *  Performs autonegotiation if needed.
+ **/
+s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw)
+{
+       s32 status = IXGBE_SUCCESS;
+       ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_82599_AUTONEG;
+       DEBUGFUNC("ixgbe_setup_mac_link_multispeed_fiber");
+
+       status = ixgbe_setup_mac_link_speed_multispeed_fiber(hw,
+                                                      link_speed, TRUE, true);
+       return status;
+}
+
+/**
+ *  ixgbe_setup_mac_link_speed_multispeed_fiber - Set MAC link speed
+ *  @hw: pointer to hardware structure
+ *  @speed: new link speed
+ *  @autoneg: TRUE if autonegotiation enabled
+ *  @autoneg_wait_to_complete: TRUE when waiting for completion is needed
+ *
+ *  Set the link speed in the AUTOC register and restarts link.
+ **/
+s32 ixgbe_setup_mac_link_speed_multispeed_fiber(struct ixgbe_hw *hw,
+                                     ixgbe_link_speed speed, bool autoneg,
+                                     bool autoneg_wait_to_complete)
+{
+       s32 status = IXGBE_SUCCESS;
+       ixgbe_link_speed link_speed;
+       ixgbe_link_speed highest_link_speed = IXGBE_LINK_SPEED_UNKNOWN;
+       u32 speedcnt = 0;
+       u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);
+       bool link_up = FALSE;
+       bool negotiation;
+
+       /* Mask off requested but non-supported speeds */
+       status = ixgbe_get_link_capabilities(hw, &link_speed, &negotiation);
+       if (status != IXGBE_SUCCESS)
+               goto out;
+
+       speed &= link_speed;
+
+       /*
+        * Try each speed one by one, highest priority first.  We do this in
+        * software because 10gb fiber doesn't support speed autonegotiation.
+        */
+       if (speed & IXGBE_LINK_SPEED_10GB_FULL) {
+               speedcnt++;
+               highest_link_speed = IXGBE_LINK_SPEED_10GB_FULL;
+
+               /* If we already have link at this speed, just jump out */
+               status = ixgbe_check_link(hw, &link_speed, &link_up, FALSE);
+               if (status != IXGBE_SUCCESS)
+                       goto out;
+
+               if ((link_speed == IXGBE_LINK_SPEED_10GB_FULL) && link_up)
+                       goto out;
+
+               /* Set hardware SDP's */
+               esdp_reg |= (IXGBE_ESDP_SDP5_DIR | IXGBE_ESDP_SDP5);
+               IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);
+
+               /* Allow module to change analog characteristics (1G->10G) */
+               msec_delay(40);
+
+               status = ixgbe_setup_mac_link_speed_82599(
+                       hw, IXGBE_LINK_SPEED_10GB_FULL, autoneg,
+                       autoneg_wait_to_complete);
+               if (status != IXGBE_SUCCESS)
+                       goto out;
+
+               msec_delay(100);
+
+               /* If we have link, just jump out */
+               status = ixgbe_check_link(hw, &link_speed, &link_up, FALSE);
+               if (status != IXGBE_SUCCESS)
+                       goto out;
+
+               if (link_up)
+                       goto out;
+       }
+
+       if (speed & IXGBE_LINK_SPEED_1GB_FULL) {
+               speedcnt++;
+               if (highest_link_speed == IXGBE_LINK_SPEED_UNKNOWN)
+                       highest_link_speed = IXGBE_LINK_SPEED_1GB_FULL;
+
+               /* If we already have link at this speed, just jump out */
+               status = ixgbe_check_link(hw, &link_speed, &link_up, FALSE);
+               if (status != IXGBE_SUCCESS)
+                       goto out;
+
+               if ((link_speed == IXGBE_LINK_SPEED_1GB_FULL) && link_up)
+                       goto out;
+
+               /* Set hardware SDP's */
+               esdp_reg &= ~IXGBE_ESDP_SDP5;
+               esdp_reg |= IXGBE_ESDP_SDP5_DIR;
+               IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);
+
+               /* Allow module to change analog characteristics (10G->1G) */
+               msec_delay(40);
+
+               status = ixgbe_setup_mac_link_speed_82599(
+                       hw, IXGBE_LINK_SPEED_1GB_FULL, autoneg,
+                       autoneg_wait_to_complete);
+               if (status != IXGBE_SUCCESS)
+                       goto out;
+
+               msec_delay(100);
+
+               /* If we have link, just jump out */
+               status = ixgbe_check_link(hw, &link_speed, &link_up, FALSE);
+               if (status != IXGBE_SUCCESS)
+                       goto out;
+
+               if (link_up)
+                       goto out;
+       }
+
+       /*
+        * We didn't get link.  Configure back to the highest speed we tried,
+        * (if there was more than one).  We call ourselves back with just the
+        * single highest speed that the user requested.
+        */
+       if (speedcnt > 1)
+               status = ixgbe_setup_mac_link_speed_multispeed_fiber(hw,
+                       highest_link_speed, autoneg, autoneg_wait_to_complete);
+
+out:
+       return status;
+}
+
+/**
+ *  ixgbe_check_mac_link_82599 - Determine link and speed status
+ *  @hw: pointer to hardware structure
+ *  @speed: pointer to link speed
+ *  @link_up: TRUE when link is up
+ *  @link_up_wait_to_complete: bool used to wait for link up or not
+ *
+ *  Reads the links register to determine if link is up and the current speed
+ **/
+s32 ixgbe_check_mac_link_82599(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
+                               bool *link_up, bool link_up_wait_to_complete)
+{
+       u32 links_reg;
+       u32 i;
+
+       links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
+       if (link_up_wait_to_complete) {
+               for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
+                       if (links_reg & IXGBE_LINKS_UP) {
+                               *link_up = TRUE;
+                               break;
+                       } else {
+                               *link_up = FALSE;
+                       }
+                       msec_delay(100);
+                       links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
+               }
+       } else {
+               if (links_reg & IXGBE_LINKS_UP)
+                       *link_up = TRUE;
+               else
+                       *link_up = FALSE;
+       }
+
+       if ((links_reg & IXGBE_LINKS_SPEED_82599) ==
+           IXGBE_LINKS_SPEED_10G_82599)
+               *speed = IXGBE_LINK_SPEED_10GB_FULL;
+       else if ((links_reg & IXGBE_LINKS_SPEED_82599) ==
+                IXGBE_LINKS_SPEED_1G_82599)
+               *speed = IXGBE_LINK_SPEED_1GB_FULL;
+       else
+               *speed = IXGBE_LINK_SPEED_100_FULL;
+
+       /* if link is down, zero out the current_mode */
+       if (*link_up == FALSE) {
+               hw->fc.current_mode = ixgbe_fc_none;
+               hw->fc.fc_was_autonegged = FALSE;
+       }
+
+       return IXGBE_SUCCESS;
+}
+
+/**
+ *  ixgbe_setup_mac_link_speed_82599 - Set MAC link speed
+ *  @hw: pointer to hardware structure
+ *  @speed: new link speed
+ *  @autoneg: TRUE if autonegotiation enabled
+ *  @autoneg_wait_to_complete: TRUE when waiting for completion is needed
+ *
+ *  Set the link speed in the AUTOC register and restarts link.
+ **/
+s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw,
+                                     ixgbe_link_speed speed, bool autoneg,
+                                     bool autoneg_wait_to_complete)
+{
+       s32 status = IXGBE_SUCCESS;
+       u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
+       u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
+       u32 orig_autoc = 0;
+       u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK;
+       u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
+       u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
+       u32 links_reg;
+       u32 i;
+       ixgbe_link_speed link_capabilities = IXGBE_LINK_SPEED_UNKNOWN;
+
+       /* Check to see if speed passed in is supported. */
+       status = ixgbe_get_link_capabilities(hw, &link_capabilities, &autoneg);
+       if (status != IXGBE_SUCCESS)
+               goto out;
+
+       speed &= link_capabilities;
+
+       /* Use stored value (EEPROM defaults) of AUTOC to find KR/KX4 support*/
+       if (hw->mac.orig_link_settings_stored)
+               orig_autoc = hw->mac.orig_autoc;
+       else
+               orig_autoc = autoc;
+
+
+       if (speed == IXGBE_LINK_SPEED_UNKNOWN) {
+               status = IXGBE_ERR_LINK_SETUP;
+       } else if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR ||
+                link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN ||
+                link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII) {
+               /* Set KX4/KX/KR support according to speed requested */
+               autoc &= ~(IXGBE_AUTOC_KX4_KX_SUPP_MASK | IXGBE_AUTOC_KR_SUPP);
+               if (speed & IXGBE_LINK_SPEED_10GB_FULL)
+                       if (orig_autoc & IXGBE_AUTOC_KX4_SUPP)
+                               autoc |= IXGBE_AUTOC_KX4_SUPP;
+                       if (orig_autoc & IXGBE_AUTOC_KR_SUPP)
+                               autoc |= IXGBE_AUTOC_KR_SUPP;
+               if (speed & IXGBE_LINK_SPEED_1GB_FULL)
+                       autoc |= IXGBE_AUTOC_KX_SUPP;
+       } else if ((pma_pmd_1g == IXGBE_AUTOC_1G_SFI) &&
+                (link_mode == IXGBE_AUTOC_LMS_1G_LINK_NO_AN ||
+                 link_mode == IXGBE_AUTOC_LMS_1G_AN)) {
+               /* Switch from 1G SFI to 10G SFI if requested */
+               if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
+                   (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI)) {
+                       autoc &= ~IXGBE_AUTOC_LMS_MASK;
+                       autoc |= IXGBE_AUTOC_LMS_10G_SERIAL;
+               }
+       } else if ((pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI) &&
+                (link_mode == IXGBE_AUTOC_LMS_10G_SERIAL)) {
+               /* Switch from 10G SFI to 1G SFI if requested */
+               if ((speed == IXGBE_LINK_SPEED_1GB_FULL) &&
+                   (pma_pmd_1g == IXGBE_AUTOC_1G_SFI)) {
+                       autoc &= ~IXGBE_AUTOC_LMS_MASK;
+                       if (autoneg)
+                               autoc |= IXGBE_AUTOC_LMS_1G_AN;
+                       else
+                               autoc |= IXGBE_AUTOC_LMS_1G_LINK_NO_AN;
+               }
+       }
+
+       if (status == IXGBE_SUCCESS) {
+               /* Restart link */
+               autoc |= IXGBE_AUTOC_AN_RESTART;
+               IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
+
+               /* Only poll for autoneg to complete if specified to do so */
+               if (autoneg_wait_to_complete) {
+                       if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR ||
+                           link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN ||
+                           link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII) {
+                               links_reg = 0; /*Just in case Autoneg time=0*/
+                               for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
+                                       links_reg =
+                                              IXGBE_READ_REG(hw, IXGBE_LINKS);
+                                       if (links_reg & IXGBE_LINKS_KX_AN_COMP)
+                                               break;
+                                       msec_delay(100);
+                               }
+                               if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
+                                       status =
+                                               IXGBE_ERR_AUTONEG_NOT_COMPLETE;
+                                       DEBUGOUT("Autoneg did not complete.\n");
+                               }
+                       }
+               }
+
+               /* Add delay to filter out noises during initial link setup */
+               msec_delay(50);
+       }
+
+out:
+       return status;
+}
+
+/**
+ *  ixgbe_setup_copper_link_82599 - Setup copper link settings
+ *  @hw: pointer to hardware structure
+ *
+ *  Restarts the link on PHY and then MAC. Performs autonegotiation if needed.
+ **/
+static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw)
+{
+       s32 status;
+
+       /* Restart autonegotiation on PHY */
+       status = hw->phy.ops.setup_link(hw);
+
+       /* Set up MAC */
+       ixgbe_setup_mac_link_82599(hw);
+
+       return status;
+}
+
+/**
+ *  ixgbe_setup_copper_link_speed_82599 - Set the PHY autoneg advertised field
+ *  @hw: pointer to hardware structure
+ *  @speed: new link speed
+ *  @autoneg: TRUE if autonegotiation enabled
+ *  @autoneg_wait_to_complete: TRUE if waiting is needed to complete
+ *
+ *  Restarts link on PHY and MAC based on settings passed in.
+ **/
+static s32 ixgbe_setup_copper_link_speed_82599(struct ixgbe_hw *hw,
+                                               ixgbe_link_speed speed,
+                                               bool autoneg,
+                                               bool autoneg_wait_to_complete)
+{
+       s32 status;
+
+       /* Setup the PHY according to input speed */
+       status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
+                                             autoneg_wait_to_complete);
+       /* Set up MAC */
+       ixgbe_setup_mac_link_82599(hw);
+
+       return status;
+}
+/**
+ *  ixgbe_reset_hw_82599 - Perform hardware reset
+ *  @hw: pointer to hardware structure
+ *
+ *  Resets the hardware by resetting the transmit and receive units, masks
+ *  and clears all interrupts, perform a PHY reset, and perform a link (MAC)
+ *  reset.
+ **/
+s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
+{
+       s32 status = IXGBE_SUCCESS;
+       u32 ctrl, ctrl_ext;
+       u32 i;
+       u32 autoc;
+       u32 autoc2;
+
+       /* Call adapter stop to disable tx/rx and clear interrupts */
+       hw->mac.ops.stop_adapter(hw);
+
+       /* PHY ops must be identified and initialized prior to reset */
+
+       /* Identify PHY and related function pointers */
+       status = hw->phy.ops.init(hw);
+
+       if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
+               goto reset_hw_out;
+
+
+       /* Setup SFP module if there is one present. */
+       if (hw->phy.sfp_setup_needed) {
+               status = hw->mac.ops.setup_sfp(hw);
+               hw->phy.sfp_setup_needed = FALSE;
+       }
+
+       if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
+               goto reset_hw_out;
+
+       /* Reset PHY */
+       if (hw->phy.reset_disable == FALSE && hw->phy.ops.reset != NULL)
+               hw->phy.ops.reset(hw);
+
+       /*
+        * Prevent the PCI-E bus from from hanging by disabling PCI-E master
+        * access and verify no pending requests before reset
+        */
+       status = ixgbe_disable_pcie_master(hw);
+       if (status != IXGBE_SUCCESS) {
+               status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
+               DEBUGOUT("PCI-E Master disable polling has failed.\n");
+       }
+
+       /*
+        * Issue global reset to the MAC.  This needs to be a SW reset.
+        * If link reset is used, it might reset the MAC when mng is using it
+        */
+       ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
+       IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST));
+       IXGBE_WRITE_FLUSH(hw);
+
+       /* Poll for reset bit to self-clear indicating reset is complete */
+       for (i = 0; i < 10; i++) {
+               usec_delay(1);
+               ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
+               if (!(ctrl & IXGBE_CTRL_RST))
+                       break;
+       }
+       if (ctrl & IXGBE_CTRL_RST) {
+               status = IXGBE_ERR_RESET_FAILED;
+               DEBUGOUT("Reset polling failed to complete.\n");
+       }
+       /* Clear PF Reset Done bit so PF/VF Mail Ops can work */
+       ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
+       ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
+       IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
+
+       msec_delay(50);
+
+
+
+       /*
+        * Store the original AUTOC/AUTOC2 values if they have not been
+        * stored off yet.  Otherwise restore the stored original
+        * values since the reset operation sets back to defaults.
+        */
+       autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
+       autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
+       if (hw->mac.orig_link_settings_stored == FALSE) {
+               hw->mac.orig_autoc = autoc;
+               hw->mac.orig_autoc2 = autoc2;
+               hw->mac.orig_link_settings_stored = TRUE;
+       } else {
+               if (autoc != hw->mac.orig_autoc)
+                       IXGBE_WRITE_REG(hw, IXGBE_AUTOC, (hw->mac.orig_autoc |
+                                       IXGBE_AUTOC_AN_RESTART));
+
+               if ((autoc2 & IXGBE_AUTOC2_UPPER_MASK) !=
+                   (hw->mac.orig_autoc2 & IXGBE_AUTOC2_UPPER_MASK)) {
+                       autoc2 &= ~IXGBE_AUTOC2_UPPER_MASK;
+                       autoc2 |= (hw->mac.orig_autoc2 &
+                                  IXGBE_AUTOC2_UPPER_MASK);
+                       IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2);
+               }
+       }
+
+       /*
+        * Store MAC address from RAR0, clear receive address registers, and
+        * clear the multicast table.  Also reset num_rar_entries to 128,
+        * since we modify this value when programming the SAN MAC address.
+        */
+       hw->mac.num_rar_entries = 128;
+       hw->mac.ops.init_rx_addrs(hw);
+
+       /* Store the permanent mac address */
+       hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);
+
+       /* Store the permanent SAN mac address */
+       hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);
+
+       /* Add the SAN MAC address to the RAR only if it's a valid address */
+       if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) {
+               hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
+                                   hw->mac.san_addr, 0, IXGBE_RAH_AV);
+
+               /* Reserve the last RAR for the SAN MAC address */
+               hw->mac.num_rar_entries--;
+       }
+
+reset_hw_out:
+       return status;
+}
+
+/**
+ *  ixgbe_insert_mac_addr_82599 - Find a RAR for this mac address
+ *  @hw: pointer to hardware structure
+ *  @addr: Address to put into receive address register
+ *  @vmdq: VMDq pool to assign
+ *
+ *  Puts an ethernet address into a receive address register, or
+ *  finds the rar that it is aleady in; adds to the pool list
+ **/
+s32 ixgbe_insert_mac_addr_82599(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
+{
+       static const u32 NO_EMPTY_RAR_FOUND = 0xFFFFFFFF;
+       u32 first_empty_rar = NO_EMPTY_RAR_FOUND;
+       u32 rar;
+       u32 rar_low, rar_high;
+       u32 addr_low, addr_high;
+
+       /* swap bytes for HW little endian */
+       addr_low  = addr[0] | (addr[1] << 8)
+                           | (addr[2] << 16)
+                           | (addr[3] << 24);
+       addr_high = addr[4] | (addr[5] << 8);
+
+       /*
+        * Either find the mac_id in rar or find the first empty space.
+        * rar_highwater points to just after the highest currently used
+        * rar in order to shorten the search.  It grows when we add a new
+        * rar to the top.
+        */
+       for (rar = 0; rar < hw->mac.rar_highwater; rar++) {
+               rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar));
+
+               if (((IXGBE_RAH_AV & rar_high) == 0)
+                   && first_empty_rar == NO_EMPTY_RAR_FOUND) {
+                       first_empty_rar = rar;
+               } else if ((rar_high & 0xFFFF) == addr_high) {
+                       rar_low = IXGBE_READ_REG(hw, IXGBE_RAL(rar));
+                       if (rar_low == addr_low)
+                               break;    /* found it already in the rars */
+               }
+       }
+
+       if (rar < hw->mac.rar_highwater) {
+               /* already there so just add to the pool bits */
+               ixgbe_set_vmdq(hw, rar, vmdq);
+       } else if (first_empty_rar != NO_EMPTY_RAR_FOUND) {
+               /* stick it into first empty RAR slot we found */
+               rar = first_empty_rar;
+               ixgbe_set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);
+       } else if (rar == hw->mac.rar_highwater) {
+               /* add it to the top of the list and inc the highwater mark */
+               ixgbe_set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);
+               hw->mac.rar_highwater++;
+       } else if (rar >= hw->mac.num_rar_entries) {
+               return IXGBE_ERR_INVALID_MAC_ADDR;
+       }
+
+       /*
+        * If we found rar[0], make sure the default pool bit (we use pool 0)
+        * remains cleared to be sure default pool packets will get delivered
+        */
+       if (rar == 0)
+               ixgbe_clear_vmdq(hw, rar, 0);
+
+       return rar;
+}
+
+/**
+ *  ixgbe_clear_vmdq_82599 - Disassociate a VMDq pool index from a rx address
+ *  @hw: pointer to hardware struct
+ *  @rar: receive address register index to disassociate
+ *  @vmdq: VMDq pool index to remove from the rar
+ **/
+s32 ixgbe_clear_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
+{

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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