On 2013-05-23, Dave Malham wrote:
I looked into this a year ago and the RPi unfortunately is crippled
for this because the processor used only supports two channels of
audio - HDMI iirc actually only allows for multichannel though it
mandates stereo.
BTW, this discussion brings to my mind an old low level hardware
question of mine. Namely, how about making your own A/D/A? What's really
the absolute minimum in hardware cost for a de novo design you can think
of, for outputting and/or inputting each incremental channel count
required by the successive ambisonic orders? Those (n+1)^2 channels, for
each successive, realistic n? N=0 and n=1 are trivial, because whatever
they use for 5.1 already carries it. But how about n=2..4? That's 9 to
16 channels. What's the cheapest means of getting at least CD quality on
each of them, without undue burden in software development, and an undue
penalty in things like (hardware, software?) synchronization capability?
Presuming any and all circuit topologies are allowed? Has anybody
thought of this kind of amateur approach of late, on the digital side of
things, as they once did on the analog frontier?
By the back of my envelope, at least third order could be done reliably
at CD quality at very low cost, even as a (separately powered) USB
peripheral. It's 16*16*44.1e3 bps, yielding ~26mbps, so that it's
roughly 1/4 of the total bandwidth of 100mpbs Ethernet. It isn't too
much magic to fit that into the newer versions of USB either, and in
particular a simple packing of the bits into an Ethernet frame buys you
everything you need for it. Then, an external power source (one of the
ultracheap Chinese ones for mobile phone charging?), maybe some synch
logic around them individual multichannel (Crystal/Analog?) chips, and
you're game. I think.
What's the minimum cost? I'd argue that it's in the vicinity of $10-20
at cost, and perhaps $50 after all is said and done. For sixteen phase
coherent, CD-like, line-level, unbalanced, analog output channels which
are then usable at will for not only ambisonic, but for whatever you
want. Maybe $70-80 if you want a strictly synchronized A/D set as well.
It wouldn't look pretty with all of those cords and connectors running
off the thing, but it'd royally get the thing done. You could instrument
your granny with something like that.
I might well be wrong since I'm no hardware guru. But still, has anybody
else thought about revisiting the early (quad era or so) DIY-thinking,
with a view towards the current digital age? Instead of picking the
cheapest valves and/or transistors for an analog circuit design and vice
versa, now picking the densest multichannel converter chips on the same
kind of cost/benefit curve?
If they have, where do people twiddle those particular kinds of
bits? I'd like to see it done and perhaps contribute. Maybe the new
breed of SDR minded radio amateurs might be of help, since the ham
circuit certainly retains the DIY mindset, even in an explicitly legally
sanctioned form. Those folks know their DSP and their hardware by
necessity. Who else?
If nobody minds low tech, multiband, nerd audio band I/O appliances, do
we need a new forum for such work? Is anybody interested in such a thing
now/yet?
The BeagleBoard (or rather the BeagleBone) is a better choice though
slightly more expensive.
As you can imagine, I hate it when people talk about named products
instead of talking about the technology underlying them. "Beagle"
doesn't tell me anything, apart from the fact that I'm not getting it
any time soon.
By this, I mean more or less three things: 1) I'm an exemplar of a
person who cannot afford most of the high software or hardware which we
talk about (and I very much like to talk about, and dream of having some
day yet), so that I can maybe speak a bit for "the great unwashed", 2)
eventhough I'm just a wannabe engineer, I still like to return the
discussion to the most basic/basest of things, in order to cut away the
bullshit/hype/extraneous complexity, and 3) I thus like to remind the
list of the humble quad beginnings and seamless scalability promises of
ambisonic, because that's where the adoption necessarily has to begin
with; not with e.g. Ralph Glascal's better-than-best setup.
It has to start with the greatest common denominator, even if we scheme
for world domination. Of late, I haven't seen too much analysis of the
simplest things on-list. So I complain. :)
I have one and a multichannel audio board which I've been meaning to
hook up since last year. The DAC is on an evaluation board for the
ADAU1966 (which has 16 outputs).
Strike me dead, they now really integrate it all the way upto third
order capability. So, how expensive is that in small numbers, and what
sort of support circuitry (mostly buffer amps and power delivery) does
it require in order for it to reliably drive an external analog
chain*16? Can the same be done cheaper by dividing the channel count in
half and synchronizing etc. in software?
I also have a sample of the AD1934 which I will need to make a pcb
for.
Okay, I should have read the whole post before answering. You can kill
me now.
The eventual end result (as a product) would be a board with an Arm, a
dac and an SD card interface, nowt much more.
Personally, if you go with those very highest end chips, I'd argue for
throwing in a full complement of A/D channels as well. Not just as a
clean, separate input channel, but a rigorously synchronized with the
D/A part one as well. Plus a bit of support circuitry. That's because of
what Meridian has done with their DSP loudspeakers: they appear to do
adaptive impedance mathing at least in the LF band, which calls for
feedback from the analog side to the digital. Theoretically you should
be able to implement even that by making your delta-sigma loop such that
its digital input is calibrated precisely to its analog output
value/voltage, pointwise, and then using the synched A/D channel to
sense instantaneous current. In delta-sigma architectures there would
always be a lot of loop delay there, but at least for LF impedance
matching and nonlinear compensation stuff, that could be neglected
because the feedback would then feed to a long term analysis stage,
which would in case feed a merely feedforward, short term correction
filter. For analysis purposes the precise loop delay from digital to
analog and back would have to be known, and it would have to be strictly
synchronous over the various channels, but beyond that the precise
group delay of the loop wouldn't matter.
Given the ridiculously low cost of Arms (and similar processors) these
days I'm very dubious about using arrays for anything but a mass
market product with large sales (or something that needed to be
thoroughly copy protected) - 10 years ago I would have said the
opposite.
ARM ain't even the nastiest exemplar in this vein. Nowadays they're
going with heavy parallelization in the GPU vein, even in embedded
processor architectures: low clock, massive parallelism, no speculation
or lookaside buffers since you can just block as a single thread
amongst millions, in order to amortize memory latency, and so on. That
stuff really started with IBM's conceptual model for Blue Gene, and on
the other hand with GPU parallelism.
So yeah, nobody uses PLA's or even FPGA's for general computation
anymore. If you desire a fully general execution model, you go with
x86/64/the various vector extensions. If your code has features of local
nondeterminism, Itanium/IA-64 or some other WLIV with predication does
the job. If your app is of the SIMD kind, first you vectorize, but
eventually you'll go the GPU/CUDA route. And if you just happen to have
a problem which calls for general computation, and which you are able to
express at *very* low parallel granularity, then you go with something
like Tilera (a direct descendant of RISC in instruction set, and a
direct descendant of Blue Gene in execution model). No model rules them
all, anymore.
So what's the forte of PLAs and FPGAs, today? Is there such a thing?
Well, yes. PLAs can implement arbirary boolean circuits in one cycle.
Many such circuits can be precomputed/minimized to fit within a given
PLA geometry, so, if you need to do heavy duty configurable bit
twiddling, PLAs are your friend. E.g. cryptanalysts, error correction
folks, circuit designers, combinatorial optimizers, whatnot, love that
stuff.
FPGAs are for silicon learning folks, those into specializing (parallel
or not) algorithms, since they incorporate memory they are the choice
for deep pipelining and systolic operation (think: heavily pipelined
cryptoengines before anybody dares take on the cost of a full blown
ASIC), and really, they are are just very regular and easy to deal with
as far as hardware goes. They were designed to be so. Today we even have
compilers which turn straight C code into FPGA configuration packets. Or
some other procedural language; it's just that easy because the FPGA
architecture was designed *to* ease up that transition. Because it was
aimed at being the optimum circuit-minded counterpart to the stateful
process mode that is best represented in Turing's model of computation.
Give me a high end Virtex chip or something akin to that, I think I
could -- even as a total amateur who's never touched the thing a single
time -- put out a design which achieves 400µs total latency per the
whole ambisonic signal vector, at at least full fourth order, using
stock FPGA chips and their standard compilers. FPGAs are to low level
gate logic (including PLAs) as Pascal is to assembler. Or perhaps rather
APL to C; much higher level by design, qualitatively different as far as
you space usage goes, and explicitly parallel and modular at the same
time.
Finally, I hear the price of genuine ASICs has gone down exponentially
as well, in the recent years.. So that they're not too pricy anymore at
all. If this list wanted to see e.g. that third order ambisonics
appliance happen...
I believe,
1) there would now be a number of free and open source tools
available to edit the specification in something like
1a) a subset of C99, or if not,
1b) straight VHDL/Verilog,
2) software to turn that into a hardware design,
2a) using standard library components,
2b) from a free library,
3) then optimize, place and route the thing on silicon,
3a) again using free tools,
3b) even if that would call for some glue logic on the fly as of now,
3c) using free SPICE tools we could get rid of transients and the
like, especilly if we crowdsourced the simulation effort
on-list,
3d) and there are even free solvers of electromagnetic free fields
out there which could help us deduce the optimum surroundings
and shielding for whatever we're trying to accomplish.
My point is, if we really wanted to, we could assume, as a
technologically sophisticated crowd, the major initial cost of designing
a full ASIC. Fuck all else, so to speak, why not go all the way to the
be all and end all of circuit design? Because the price of the initial
mask set has been coming down exponentially too; it really doesn't cost
too much anymore. At current prices it's still too expensive for an
individual project, but once the basic design and testing has been done
plausibly enough and all of the design data has been placed in the open
domain, it's almost certain some hardware manufacturer would try it out.
Especially if the design was kept to the minimum of etching cycles and
metallization layers and angles of incidence during etching; what makes
it particularly easy for us is that we'd *want* a rather low definition
process (in the micrometers perhaps even), simply because we're dealing
with mixed mode audio circuits, and too small of a feature size would
kill our noise floor in any case.
Seriously, if even this kind of a list really wanted to make something
happen, we could easily forget about PLAs, FPGAs, Arms, Intels and
everything else. The price of a pure pedal-to-the-metal ASIC is so low,
and it's allure so great to major hardware manufacturers (if done
right), that we could actually jump to that final semiconductor
technology right now. Seriously. :)
--
Sampo Syreeni, aka decoy - de...@iki.fi, http://decoy.iki.fi/front
+358-50-5756111, 025E D175 ABE5 027C 9494 EEB0 E090 8BA9 0509 85C2
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