Module Name: src
Committed By: jmcneill
Date: Fri Nov 23 11:49:04 UTC 2018
Modified Files:
src/sys/arch/arm/cortex: gicv3.c
Log Message:
Fix LPI pending table size, use correct LPI conf offset in
gicv3_lpi_block_irqs, and set bit[7]=1 for G1NS interrupts when writing to the
LPI configuration table.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/cortex/gicv3.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
