Module Name: src
Committed By: skrll
Date: Sun Jul 24 18:04:04 UTC 2016
Modified Files:
src/sys/arch/mips/mips: spl.S
Log Message:
Two fixes:
1) invesion of enable bits in splx (ipl_sr_map is disable mask)
2) Don't overwrite the cause register in spl0 - there might be pending
softints.
The second helps with recent boot issues after several new workqueues
are created. lwp_startup would call spl0 and lose the pending softints
status.
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mips/mips/spl.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
