Module Name: src
Committed By: jmcneill
Date: Sat May 2 14:10:03 UTC 2015
Modified Files:
src/sys/arch/arm/nvidia: tegra_car.c tegra_carreg.h tegra_sdhc.c
Log Message:
SDMMC clock input is PLLP (408 MHz). Set input divisor to 2 to get a
204 MHz input for the SDHC, which is just below the maximum supported
frequency for SDR104.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/nvidia/tegra_car.c \
src/sys/arch/arm/nvidia/tegra_carreg.h \
src/sys/arch/arm/nvidia/tegra_sdhc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
