Module Name: src
Committed By: martin
Date: Sun Aug 8 10:22:04 UTC 2021
Modified Files:
src/lib/libc/arch/arm/gen [netbsd-9]: swapcontext.S
src/lib/libc/arch/arm/sys [netbsd-9]: __clone.S
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm [netbsd-9]:
aeabi_cfcmp.S divmodsi4.S divsi3.S modsi3.S
Log Message:
Pull up following revision(s) (requested by skrll in ticket #1329):
lib/libc/arch/arm/gen/swapcontext.S: revision 1.18
sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S: revision
1.2
sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S: revision
1.3
sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S:
revision 1.2
sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S:
revision 1.3
lib/libc/arch/arm/sys/__clone.S: revision 1.10
lib/libc/arch/arm/sys/__clone.S: revision 1.11
sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S: revision
1.2
lib/libc/arch/arm/sys/__clone.S: revision 1.12
sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S: revision
1.3
lib/libc/arch/arm/sys/__clone.S: revision 1.13
lib/libc/arch/arm/sys/__clone.S: revision 1.14
sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S:
revision 1.2
sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S:
revision 1.3
lib/libc/arch/arm/gen/swapcontext.S: revision 1.16
lib/libc/arch/arm/gen/swapcontext.S: revision 1.17
Align sp to 8-byte boundary as required by EABI.
This is especially important for non-leaf functions; GCC optimizes codes
based on assumption that sp is aligned properly.
Mostly fix broken earmv5 userland compiled by GCC10 due to alignment
faults in ld.elf_so, where {ld,st}rd are used for [sp, #8x].
No regression for ATF is observed for earmv[67]{,hf}{,eb}.
Align sp to 8-byte boundary as required by EABI.
IIUC, this change only affects libc compiled for ``Thumb-mode userland'',
which we've not officially supported yet.
Fix previous. For Thumb-1:
- sp cannot be manipulated directly
- {add,sub}s should be used instead of {add,sub}
Trailing whitespace
The _INVOKE_CERROR macro deals with thumb so simplify the code (at the
expense of a couple more instructions).
Do previous differently by pushing even number of registers and remove
strange r7 usage.
Do previous differtly by pushing two registers in the same way as the
_INVOKE_CERROR macro
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.15.2.1 src/lib/libc/arch/arm/gen/swapcontext.S
cvs rdiff -u -r1.9 -r1.9.28.1 src/lib/libc/arch/arm/sys/__clone.S
cvs rdiff -u -r1.1.1.1 -r1.1.1.1.26.1 \
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S
cvs rdiff -u -r1.1.1.4 -r1.1.1.4.22.1 \
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S \
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S \
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
