Module Name: src
Committed By: martin
Date: Wed Aug 5 16:02:53 UTC 2020
Modified Files:
src/sys/arch/x86/include [netbsd-8]: specialreg.h
Log Message:
Pull up the following revisions, requested by msaitoh in ticket #1588:
sys/arch/x86/include/specialreg.h 1.162-1.168 via patch
- AMD CPUID Fn8000_000a %edx bit 20 is "SPEC_CTRL".
- Add some bit definitions of AMD's CPUID Fn8000_001f Encrypted Memory
features.
- Add AMD INVLPGB/TLBSYNC hypervisor enable in VMCB and TLBSYNC
intercept bit.
- Add AMD MSR_DE_CFG's bit 1 as DE_CFG_LFENCE_SERIALIZE.
- Add some definitions for Intel:
- Add CPUID leaf 6 %eax bit 19 for HW_FEEDBACK* and
IA32_PACKAGE_TERM* MSRs.
- Add CPUID leaf 7 %ecx bit 31 for Protection Keys.
- Add definition of Load only TLB and Store only TLB.
- Add IF_PSCHANGE_MC_NO bit of IA32_ARCH_CAPABILITIES
- Fix HWP_IGNIDL.
- Add CPUID 7 %edx bit 9 "SRBDS_CTRL"
- Modify comment. Style and fix typo.
To generate a diff of this commit:
cvs rdiff -u -r1.98.2.19 -r1.98.2.20 src/sys/arch/x86/include/specialreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
