Module Name: src Committed By: martin Date: Thu Feb 27 18:43:41 UTC 2020
Modified Files: src/sys/arch/powerpc/ibm4xx [netbsd-9]: trap.c Log Message: Pull up following revision(s) (requested by rin in ticket #735): sys/arch/powerpc/ibm4xx/trap.c: revision 1.71 sys/arch/powerpc/ibm4xx/trap.c: revision 1.72 sys/arch/powerpc/ibm4xx/trap.c: revision 1.73 sys/arch/powerpc/ibm4xx/trap.c: revision 1.74 sys/arch/powerpc/ibm4xx/trap.c: revision 1.75 sys/arch/powerpc/ibm4xx/trap.c: revision 1.76 sys/arch/powerpc/ibm4xx/trap.c: revision 1.77 sys/arch/powerpc/ibm4xx/trap.c: revision 1.78 Sort headers. - Sort more headers... - Convert mi_userret(9) into powerpc-specific userret(). This is necessary in order to support RAS. There are some sanity checks in userret() as well. - Oops, sort header again. My bad... - Comment out badaddr() and badaddr_read() on ibm4xx for now. They are not used nor exposed externally in any header file; these functions may have never been tested so far. Enable them again when necessary. Note that badaddr() for oea is used by macppc port, where it is declared as an external function. - Cosmetic changes for assembler codes. No binary changes. - Tiny improvements to copyin() and copyout(): - Use lwz/stw instead of 4-byte lswi/stswi for 405 and later, which support unaligned word load/store by hardware. In many cases, both source and destination are aligned on word boundaries. - Use dcbst instead of dcbf to flush cache. The former does not invalidate the cache line. Copied data should be used soon after. - Do not try to recovery from data page fault in interrupt context; catch up belatedly with powerpc/trap.c rev 1.49 and etc.: http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/powerpc/powerpc/trap.c#rev1.49 To generate a diff of this commit: cvs rdiff -u -r1.70 -r1.70.4.1 src/sys/arch/powerpc/ibm4xx/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.