Module Name: src Committed By: andvar Date: Thu Jan 23 22:33:43 UTC 2025
Modified Files: src/sys/dev/pci: pcidevs Log Message: Add VIA VT8261 southbridge SATA controller IDs and PCIB. To generate a diff of this commit: cvs rdiff -u -r1.1517 -r1.1518 src/sys/dev/pci/pcidevs Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.