Module Name: src
Committed By: snj
Date: Fri Dec 6 20:28:17 UTC 2024
Modified Files:
src/share/man/man4 [netbsd-10]: puc.4
src/sys/dev/pci [netbsd-10]: pucdata.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1025):
share/man/man4/puc.4: revision 1.46
sys/dev/pci/pucdata.c: revision 1.117
Add many Brainboxes devices. Reported in PR/kern 58824 by Cameron Williams.
To generate a diff of this commit:
cvs rdiff -u -r1.43.2.1 -r1.43.2.2 src/share/man/man4/puc.4
cvs rdiff -u -r1.113.4.2 -r1.113.4.3 src/sys/dev/pci/pucdata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/share/man/man4/puc.4
diff -u src/share/man/man4/puc.4:1.43.2.1 src/share/man/man4/puc.4:1.43.2.2
--- src/share/man/man4/puc.4:1.43.2.1 Mon Jan 30 11:44:39 2023
+++ src/share/man/man4/puc.4 Fri Dec 6 20:28:17 2024
@@ -1,4 +1,4 @@
-.\" $NetBSD: puc.4,v 1.43.2.1 2023/01/30 11:44:39 martin Exp $
+.\" $NetBSD: puc.4,v 1.43.2.2 2024/12/06 20:28:17 snj Exp $
.\"
.\" Copyright (c) 1998 Christopher G. Demetriou
.\" All rights reserved.
@@ -32,7 +32,7 @@
.\"
.\" <<Id: LICENSE,v 1.2 2000/06/14 15:57:33 cgd Exp>>
.\"
-.Dd January 29, 2023
+.Dd November 11, 2024
.Dt PUC 4
.Os
.Sh NAME
@@ -73,6 +73,9 @@ The driver currently supports the follow
.It Tn "Avlab PCI 2S (2 port serial)"
.It Tn "Boca Research Turbo Serial 654 (4 port serial)"
.It Tn "Boca Research Turbo Serial 658 (8 port serial)"
+.It Tn "Brainboxes UC card range"
+.It Tn "Brainboxes UP card range"
+.It Tn "Brainboxes PX card range"
.It Tn "Chase Research / Perle PCI-FAST4 (4 port serial)"
.It Tn "Chase Research / Perle PCI-FAST8 (8 port serial)"
.It Tn "Comtrol RocketPort 550/4 series (4 port serial)"
@@ -93,6 +96,13 @@ The driver currently supports the follow
.It Tn "Exsys EX-41098 (4 port serial)"
.It Tn "IBM 4810 SurePOS 300 Series SCC (4 port serial)"
.It Tn "InnoSys Keyspan SX Pro (4 port serial)"
+.It Tn "IntaShield IS-100 (single serial)"
+.It Tn "IntaShield IS-200 (dual serial)"
+.It Tn "IntaShield IS-300 (single serial only)"
+.It Tn "IntaShield IS-400 (4 port serial)"
+.It Tn "IntaShield IX-100 (single serial)"
+.It Tn "IntaShield IX-200 (dual serial)"
+.It Tn "IntaShield IX-400 (4 port serial)"
.It Tn "Intel chipset internal Serial over LAN"
.It Tn "I-O DATA RSA-PCI (2 port serial)"
.It Tn "I-O DATA RSA-PCI2 (2 port serial)"
Index: src/sys/dev/pci/pucdata.c
diff -u src/sys/dev/pci/pucdata.c:1.113.4.2 src/sys/dev/pci/pucdata.c:1.113.4.3
--- src/sys/dev/pci/pucdata.c:1.113.4.2 Sat Aug 24 16:10:57 2024
+++ src/sys/dev/pci/pucdata.c Fri Dec 6 20:28:17 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: pucdata.c,v 1.113.4.2 2024/08/24 16:10:57 martin Exp $ */
+/* $NetBSD: pucdata.c,v 1.113.4.3 2024/12/06 20:28:17 snj Exp $ */
/*
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.113.4.2 2024/08/24 16:10:57 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.113.4.3 2024/12/06 20:28:17 snj Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -256,6 +256,31 @@ const struct puc_device_description puc_
{ PUC_PORT_TYPE_COM, PCI_BAR2, 0x0018, COM_FREQ },
},
},
+ { "Brainboxes IX-100",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IX100, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes IX-200",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IX200, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes IX-400",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IX400, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1400, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1600, COM_FREQ * 0x22 },
+ },
+ },
{ "Brainboxes UC-101",
{ PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC101, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
@@ -652,6 +677,227 @@ const struct puc_device_description puc_
{ PUC_PORT_TYPE_COM, PCI_BAR2, 0x0008, COM_FREQ },
},
},
+ { "Brainboxes PX-101",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX101, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-101",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX101R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-246",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX246, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-246",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX246R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-257",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX257, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-257",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX257R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-260",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX260, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1400, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1600, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-279",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX279, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR2, 0x0000, COM_FREQ },
+ { PUC_PORT_TYPE_COM, PCI_BAR2, 0x0008, COM_FREQ },
+ { PUC_PORT_TYPE_COM, PCI_BAR2, 0x0010, COM_FREQ },
+ { PUC_PORT_TYPE_COM, PCI_BAR2, 0x0018, COM_FREQ },
+ { PUC_PORT_TYPE_COM, PCI_BAR2, 0x0020, COM_FREQ },
+ { PUC_PORT_TYPE_COM, PCI_BAR2, 0x0028, COM_FREQ },
+ { PUC_PORT_TYPE_COM, PCI_BAR2, 0x0030, COM_FREQ },
+ { PUC_PORT_TYPE_COM, PCI_BAR2, 0x0038, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-310",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX310, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-313",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX313, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-320",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX320, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-346",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX346, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1400, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1600, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-368",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX368, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1400, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1600, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-420",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX420, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-420",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX420R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1400, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1600, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-431",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX431, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-431",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX431R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1400, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-475",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX475, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-803",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX803, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-820",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX820, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-820",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX820R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1400, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1600, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-831",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX831, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-831",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX831R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1400, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-846",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX846, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-846",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX846R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ },
+ },
+ { "Brainboxes PX-857",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX857, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x0000, COM_FREQ },
+ },
+ },
+ { "Brainboxes PX-857",
+ { PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX857R3, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1000, COM_FREQ * 0x22 },
+ { PUC_PORT_TYPE_COM, PCI_BAR0, 0x1200, COM_FREQ * 0x22 },
+ },
+ },
/*
* Comtrol
