Module Name:    src
Committed By:   andvar
Date:           Sat Sep 14 21:12:10 UTC 2024

Modified Files:
        src/share/man/man4: gpioirq.4
        src/sys/dev/ic: hd64570.c hd64570reg.h

Log Message:
s/intrerrupt/interrupt/ in documentation and comments.
gpioirq(4) typo was accidentally restored in the last commit.


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/share/man/man4/gpioirq.4
cvs rdiff -u -r1.60 -r1.61 src/sys/dev/ic/hd64570.c
cvs rdiff -u -r1.13 -r1.14 src/sys/dev/ic/hd64570reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/share/man/man4/gpioirq.4
diff -u src/share/man/man4/gpioirq.4:1.4 src/share/man/man4/gpioirq.4:1.5
--- src/share/man/man4/gpioirq.4:1.4	Mon Nov  6 00:35:05 2023
+++ src/share/man/man4/gpioirq.4	Sat Sep 14 21:12:10 2024
@@ -1,4 +1,4 @@
-.\" $NetBSD: gpioirq.4,v 1.4 2023/11/06 00:35:05 brad Exp $
+.\" $NetBSD: gpioirq.4,v 1.5 2024/09/14 21:12:10 andvar Exp $
 .\"
 .\" Copyright (c) 2016, 2023 Brad Spencer <b...@anduin.eldar.org>
 .\"
@@ -50,7 +50,7 @@ edge of the pin.
 .It Dv 0x04
 Interrupt on both edges of the pin.
 .It Dv 0x08
-Assert the intrerrupt as long as the pin is high.
+Assert the interrupt as long as the pin is high.
 .It Dv 0x10
 Assert the interrupt as long as the pin is low.
 .El

Index: src/sys/dev/ic/hd64570.c
diff -u src/sys/dev/ic/hd64570.c:1.60 src/sys/dev/ic/hd64570.c:1.61
--- src/sys/dev/ic/hd64570.c:1.60	Fri Jul  5 04:31:51 2024
+++ src/sys/dev/ic/hd64570.c	Sat Sep 14 21:12:10 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: hd64570.c,v 1.60 2024/07/05 04:31:51 rin Exp $	*/
+/*	$NetBSD: hd64570.c,v 1.61 2024/09/14 21:12:10 andvar Exp $	*/
 
 /*
  * Copyright (c) 1999 Christian E. Hopps
@@ -65,7 +65,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: hd64570.c,v 1.60 2024/07/05 04:31:51 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: hd64570.c,v 1.61 2024/09/14 21:12:10 andvar Exp $");
 
 #include "opt_inet.h"
 
@@ -358,7 +358,7 @@ sca_init(struct sca_softc *sc)
 	sca_write_1(sc, SCA_ITCR,
 	    SCA_ITCR_INTR_PRI_MSCI | SCA_ITCR_ACK_NONE | SCA_ITCR_VOUT_IVR);
 #if 0
-	/* these are for the intrerrupt ack cycle which we don't use */
+	/* these are for the interrupt ack cycle which we don't use */
 	sca_write_1(sc, SCA_IVR, 0x40);
 	sca_write_1(sc, SCA_IMVR, 0x40);
 #endif

Index: src/sys/dev/ic/hd64570reg.h
diff -u src/sys/dev/ic/hd64570reg.h:1.13 src/sys/dev/ic/hd64570reg.h:1.14
--- src/sys/dev/ic/hd64570reg.h:1.13	Sat Jul  6 10:09:15 2024
+++ src/sys/dev/ic/hd64570reg.h	Sat Sep 14 21:12:10 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: hd64570reg.h,v 1.13 2024/07/06 10:09:15 andvar Exp $	*/
+/*	$NetBSD: hd64570reg.h,v 1.14 2024/09/14 21:12:10 andvar Exp $	*/
 
 /*
  * Copyright (c) 1998 Vixie Enterprises
@@ -434,7 +434,7 @@ struct hdlc_llc_header {
 #define	SCA_ISR2_TIMER_IRQ3	0x80	/* timer channel 3 int */
 
 /* masks/values for the Interrupt Control Register (ITCR) */
-#define SCA_ITCR_INTR_PRI_MASK	0x80	/* priority of intrerrupts */
+#define SCA_ITCR_INTR_PRI_MASK	0x80	/* priority of interrupts */
 #define	SCA_ITCR_INTR_PRI_MSCI	0x00	/* msci over dmac */
 #define	SCA_ITCR_INTR_PRI_DMAC	0x80	/* dmac over msci */
 #define	SCA_ITCR_ACK_MASK	0x60	/* mask for intr ack cycle setting */

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