Module Name:    src
Committed By:   andvar
Date:           Mon Feb  5 22:18:18 UTC 2024

Modified Files:
        src/sys/arch/next68k/stand/boot: scsi.c
        src/sys/arch/pmax/pmax: locore_machdep.S
        src/sys/dev/pci: twareg.h
        src/sys/dev/qbus: tsreg.h

Log Message:
s/bufffer/buffer/ in comments and log message.


To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/next68k/stand/boot/scsi.c
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/pmax/pmax/locore_machdep.S
cvs rdiff -u -r1.11 -r1.12 src/sys/dev/pci/twareg.h
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/qbus/tsreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/next68k/stand/boot/scsi.c
diff -u src/sys/arch/next68k/stand/boot/scsi.c:1.14 src/sys/arch/next68k/stand/boot/scsi.c:1.15
--- src/sys/arch/next68k/stand/boot/scsi.c:1.14	Sun Feb 12 10:04:56 2023
+++ src/sys/arch/next68k/stand/boot/scsi.c	Mon Feb  5 22:18:17 2024
@@ -1,4 +1,4 @@
-/*      $NetBSD: scsi.c,v 1.14 2023/02/12 10:04:56 tsutsui Exp $        */
+/*      $NetBSD: scsi.c,v 1.15 2024/02/05 22:18:17 andvar Exp $        */
 /*
  * Copyright (c) 1994, 1997 Rolf Grossmann
  * All rights reserved.
@@ -357,7 +357,7 @@ dma_start(char *addr, int len)
 
     PRINTF(("DMA start: %lx, %d byte.\n", (long)addr, len));
 
-    DPRINTF(("dma_bufffer: start: 0x%lx end: 0x%lx \n",
+    DPRINTF(("dma_buffer: start: 0x%lx end: 0x%lx \n",
 				(long)dma_buffer,(long)DMA_ENDALIGN(char *, dma_buffer+len)));
 
     sc->dma_addr = addr;

Index: src/sys/arch/pmax/pmax/locore_machdep.S
diff -u src/sys/arch/pmax/pmax/locore_machdep.S:1.25 src/sys/arch/pmax/pmax/locore_machdep.S:1.26
--- src/sys/arch/pmax/pmax/locore_machdep.S:1.25	Mon Mar 28 14:40:00 2011
+++ src/sys/arch/pmax/pmax/locore_machdep.S	Mon Feb  5 22:18:17 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore_machdep.S,v 1.25 2011/03/28 14:40:00 tsutsui Exp $	*/
+/*	$NetBSD: locore_machdep.S,v 1.26 2024/02/05 22:18:17 andvar Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -68,7 +68,7 @@
  * Copy data to a DMA buffer padded with 16 bits of data, 16
  * bits of padding per 32bit word (e.g., for pmin/pmax sii DMA).
  *
- * The DMA bufffer can only be written one short at a time
+ * The DMA buffer can only be written one short at a time
  * (and takes ~14 cycles).
  *
  *	CopyToBuffer(src, dst, length)
@@ -93,7 +93,7 @@ END(CopyToBuffer)
 
 /*
  * Copy data from the DMA buffer.
- * The DMA bufffer can only be read one short at a time
+ * The DMA buffer can only be read one short at a time
  * (and takes ~12 cycles).
  *
  *	CopyFromBuffer(src, dst, length)

Index: src/sys/dev/pci/twareg.h
diff -u src/sys/dev/pci/twareg.h:1.11 src/sys/dev/pci/twareg.h:1.12
--- src/sys/dev/pci/twareg.h:1.11	Mon Nov 22 23:02:16 2010
+++ src/sys/dev/pci/twareg.h	Mon Feb  5 22:18:17 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: twareg.h,v 1.11 2010/11/22 23:02:16 dholland Exp $ */
+/*	$NetBSD: twareg.h,v 1.12 2024/02/05 22:18:17 andvar Exp $ */
 /*	$wasabi: twareg.h,v 1.14 2006/07/28 18:29:51 wrstuden Exp $ */
 
 /*-
@@ -226,7 +226,7 @@
 #define TWA_MAX_ATA_SG_ELEMENTS		60
 #define TWA_Q_LENGTH			TWA_INIT_MESSAGE_CREDITS
 #define TWA_MAX_RESET_TRIES		3
-#define TWA_SECTOR_SIZE			0x200	/* generic I/O bufffer */
+#define TWA_SECTOR_SIZE			0x200	/* generic I/O buffer */
 #define TWA_SENSE_DATA_LENGTH		18
 #define TWA_MICROSECOND                 1000000
 #define TWA_ERROR_LOGICAL_UNIT_NOT_SUPPORTED	0x010a

Index: src/sys/dev/qbus/tsreg.h
diff -u src/sys/dev/qbus/tsreg.h:1.5 src/sys/dev/qbus/tsreg.h:1.6
--- src/sys/dev/qbus/tsreg.h:1.5	Mon May 22 17:22:29 2017
+++ src/sys/dev/qbus/tsreg.h	Mon Feb  5 22:18:18 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: tsreg.h,v 1.5 2017/05/22 17:22:29 ragge Exp $ */
+/*	$NetBSD: tsreg.h,v 1.6 2024/02/05 22:18:18 andvar Exp $ */
 /*
  * Copyright (c) 1995 Ludd, University of Lule}, Sweden.
  * All rights reserved.
@@ -33,7 +33,7 @@
  * The TSV05 Subsystem has four device registers that occupy only two
  * LSI-11 Bus word locations: a Data Buffer (TSDB), a Bus Address
  * Register (TSBA), a Status Register (TSSR), and an Extended Data
- * Bufffer (TSDBX). The TSDB is an 18-bit register that is ...
+ * Buffer (TSDBX). The TSDB is an 18-bit register that is ...
  */
 
 #ifdef notdef

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