Module Name: src
Committed By: andvar
Date: Fri Feb 2 22:39:10 UTC 2024
Modified Files:
src/sys/dev/audio: mulaw.c
src/sys/dev/i2c: sht3xreg.h
src/sys/dev/ic: aic6915.c aic79xx.c aic7xxx.c
src/sys/dev/marvell: if_mvxpereg.h mvgbereg.h
src/sys/dev/microcode/aic7xxx: aic7xxx.reg
src/sys/dev/pci: if_sipreg.h if_skreg.h
src/sys/netinet: sctp_input.c
src/tests/lib/libm: t_round.c
Log Message:
fix various typos in comments.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/audio/mulaw.c
cvs rdiff -u -r1.3 -r1.4 src/sys/dev/i2c/sht3xreg.h
cvs rdiff -u -r1.45 -r1.46 src/sys/dev/ic/aic6915.c
cvs rdiff -u -r1.69 -r1.70 src/sys/dev/ic/aic79xx.c
cvs rdiff -u -r1.147 -r1.148 src/sys/dev/ic/aic7xxx.c
cvs rdiff -u -r1.7 -r1.8 src/sys/dev/marvell/if_mvxpereg.h
cvs rdiff -u -r1.9 -r1.10 src/sys/dev/marvell/mvgbereg.h
cvs rdiff -u -r1.6 -r1.7 src/sys/dev/microcode/aic7xxx/aic7xxx.reg
cvs rdiff -u -r1.21 -r1.22 src/sys/dev/pci/if_sipreg.h
cvs rdiff -u -r1.31 -r1.32 src/sys/dev/pci/if_skreg.h
cvs rdiff -u -r1.16 -r1.17 src/sys/netinet/sctp_input.c
cvs rdiff -u -r1.9 -r1.10 src/tests/lib/libm/t_round.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/audio/mulaw.c
diff -u src/sys/dev/audio/mulaw.c:1.5 src/sys/dev/audio/mulaw.c:1.6
--- src/sys/dev/audio/mulaw.c:1.5 Wed Jul 21 06:35:44 2021
+++ src/sys/dev/audio/mulaw.c Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: mulaw.c,v 1.5 2021/07/21 06:35:44 skrll Exp $ */
+/* $NetBSD: mulaw.c,v 1.6 2024/02/02 22:39:10 andvar Exp $ */
/*
* Copyright (C) 2017 Tetsuya Isaki. All rights reserved.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1.5 2021/07/21 06:35:44 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1.6 2024/02/02 22:39:10 andvar Exp $");
#include <sys/param.h>
#include <sys/types.h>
@@ -57,7 +57,7 @@ __KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1.
* About mulaw32 format.
*
* The format which I call ``mulaw32'' is only used in dev/tc/bba.c .
- * It is 8bit mu-law but 16bit left-shifted and its containter is 32bit.
+ * It is 8bit mu-law but 16bit left-shifted and its container is 32bit.
* Not mu-law calculated in 32bit.
*
* When MULAW32 is not defined (it's default), this file outputs
Index: src/sys/dev/i2c/sht3xreg.h
diff -u src/sys/dev/i2c/sht3xreg.h:1.3 src/sys/dev/i2c/sht3xreg.h:1.4
--- src/sys/dev/i2c/sht3xreg.h:1.3 Sat May 28 10:36:23 2022
+++ src/sys/dev/i2c/sht3xreg.h Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: sht3xreg.h,v 1.3 2022/05/28 10:36:23 andvar Exp $ */
+/* $NetBSD: sht3xreg.h,v 1.4 2024/02/02 22:39:10 andvar Exp $ */
/*
* Copyright (c) 2021 Brad Spencer <b...@anduin.eldar.org>
@@ -84,7 +84,7 @@
the information in the datasheet was not enough to
get it working. A read of the registers appears to
function just fine, but writes do not do anything, and
- the chip does not indicate any errors occured.
+ the chip does not indicate any errors occurred.
*/
#define SHT3X_READ_HIGH_ALERT_SET 0xE11F
#define SHT3X_READ_HIGH_ALERT_CLEAR 0xE114
Index: src/sys/dev/ic/aic6915.c
diff -u src/sys/dev/ic/aic6915.c:1.45 src/sys/dev/ic/aic6915.c:1.46
--- src/sys/dev/ic/aic6915.c:1.45 Sun Sep 25 18:43:32 2022
+++ src/sys/dev/ic/aic6915.c Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: aic6915.c,v 1.45 2022/09/25 18:43:32 thorpej Exp $ */
+/* $NetBSD: aic6915.c,v 1.46 2024/02/02 22:39:10 andvar Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: aic6915.c,v 1.45 2022/09/25 18:43:32 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: aic6915.c,v 1.46 2024/02/02 22:39:10 andvar Exp $");
#include <sys/param.h>
@@ -824,7 +824,7 @@ sf_tick(void *arg)
/*
* sf_stats_update:
*
- * Read the statitistics counters.
+ * Read the statistics counters.
*/
static void
sf_stats_update(struct sf_softc *sc)
Index: src/sys/dev/ic/aic79xx.c
diff -u src/sys/dev/ic/aic79xx.c:1.69 src/sys/dev/ic/aic79xx.c:1.70
--- src/sys/dev/ic/aic79xx.c:1.69 Tue Aug 1 20:50:11 2023
+++ src/sys/dev/ic/aic79xx.c Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: aic79xx.c,v 1.69 2023/08/01 20:50:11 andvar Exp $ */
+/* $NetBSD: aic79xx.c,v 1.70 2024/02/02 22:39:10 andvar Exp $ */
/*
* Core routines and tables shareable across OS platforms.
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: aic79xx.c,v 1.69 2023/08/01 20:50:11 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: aic79xx.c,v 1.70 2024/02/02 22:39:10 andvar Exp $");
#include <dev/ic/aic79xx_osm.h>
#include <dev/ic/aic79xx_inline.h>
@@ -1871,7 +1871,7 @@ ahd_handle_transmission_error(struct ahd
* If we raise ATN and the target completes the entire
* stream (P0 asserted during the last packet), the
* hardware will ack all data and return to the ISTART
- * state. When the target reponds to our ATN condition,
+ * state. When the target responds to our ATN condition,
* LQIPHASE_LQ will be asserted. We should respond to
* this with an LQIRETRY to prepare for any future
* packets. NONPACKREQ will not be asserted again
@@ -7620,7 +7620,7 @@ ahd_reset_channel(struct ahd_softc *ahd,
*/
next_fifo = fifo = ahd_inb(ahd, DFFSTAT) & CURRFIFO;
if (next_fifo > CURRFIFO_1)
- /* If disconneced, arbitrarily start with FIFO1. */
+ /* If disconnected, arbitrarily start with FIFO1. */
next_fifo = fifo = 0;
do {
next_fifo ^= CURRFIFO_1;
@@ -7900,7 +7900,7 @@ ahd_handle_scsi_status(struct ahd_softc
printf("Invalid Command IU Field\n");
break;
case SIU_PFC_TMF_NOT_SUPPORTED:
- printf("TMF not supportd\n");
+ printf("TMF not supported\n");
break;
case SIU_PFC_TMF_FAILED:
printf("TMF failed\n");
@@ -8962,7 +8962,7 @@ ahd_read_seeprom(struct ahd_softc *ahd,
}
/*
- * Write count 16bit words from tbuf, into SEEPROM attache to the
+ * Write count 16bit words from tbuf, into SEEPROM attached to the
* controller starting at 16bit word address start_addr, using the
* controller's SEEPROM writing state machine.
*/
@@ -8986,7 +8986,7 @@ ahd_write_seeprom(struct ahd_softc *ahd,
return (error);
/*
- * Write the data. If we don't get throught the loop at
+ * Write the data. If we don't get through the loop at
* least once, the arguments were invalid.
*/
retval = EINVAL;
Index: src/sys/dev/ic/aic7xxx.c
diff -u src/sys/dev/ic/aic7xxx.c:1.147 src/sys/dev/ic/aic7xxx.c:1.148
--- src/sys/dev/ic/aic7xxx.c:1.147 Mon Jun 27 22:41:29 2022
+++ src/sys/dev/ic/aic7xxx.c Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $ */
+/* $NetBSD: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $ */
/*
* Core routines and tables shareable across OS platforms.
@@ -39,7 +39,7 @@
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $
+ * $Id: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $
*
* //depot/aic7xxx/aic7xxx/aic7xxx.c#112 $
*
@@ -50,7 +50,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $");
#include <dev/ic/aic7xxx_osm.h>
#include <dev/ic/aic7xxx_inline.h>
@@ -4140,7 +4140,7 @@ ahc_build_free_scb_list(struct ahc_softc
/*
* Touch all SCB bytes to avoid parity errors
* should one of our debugging routines read
- * an otherwise uninitiatlized byte.
+ * an otherwise uninitialized byte.
*/
for (j = 0; j < scbsize; j++)
ahc_outb(ahc, SCB_BASE+j, 0xFF);
Index: src/sys/dev/marvell/if_mvxpereg.h
diff -u src/sys/dev/marvell/if_mvxpereg.h:1.7 src/sys/dev/marvell/if_mvxpereg.h:1.8
--- src/sys/dev/marvell/if_mvxpereg.h:1.7 Wed Nov 10 15:55:35 2021
+++ src/sys/dev/marvell/if_mvxpereg.h Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: if_mvxpereg.h,v 1.7 2021/11/10 15:55:35 msaitoh Exp $ */
+/* $NetBSD: if_mvxpereg.h,v 1.8 2024/02/02 22:39:10 andvar Exp $ */
/*
* Copyright (c) 2015 Internet Initiative Japan Inc.
* All rights reserved.
@@ -489,7 +489,7 @@
#define MVXPE_PTXS_GET_PDC(x) ((x) & 0x3fff)
/* Port TX queues Status Update (MVXPE_PTXSU) */
- /* Number Of Written Descriptoes */
+ /* Number Of Written Descriptors */
#define MVXPE_PTXSU_NOWD(x) (((x) & 0xff) << 0)
/* Number Of Released Buffers */
#define MVXPE_PTXSU_NORB(x) (((x) & 0xff) << 16)
Index: src/sys/dev/marvell/mvgbereg.h
diff -u src/sys/dev/marvell/mvgbereg.h:1.9 src/sys/dev/marvell/mvgbereg.h:1.10
--- src/sys/dev/marvell/mvgbereg.h:1.9 Mon Aug 30 00:08:28 2021
+++ src/sys/dev/marvell/mvgbereg.h Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: mvgbereg.h,v 1.9 2021/08/30 00:08:28 rin Exp $ */
+/* $NetBSD: mvgbereg.h,v 1.10 2024/02/02 22:39:10 andvar Exp $ */
/*
* Copyright (c) 2007, 2013 KIYOHARA Takashi
* All rights reserved.
@@ -583,7 +583,7 @@
#define MVGBE_PTXS_TBC(x) (((x) & 0x3fff) << 16)
/* Port TX queues Status Update (MVGBE_PTXSU) */
- /* Number Of Written Descriptoes */
+ /* Number Of Written Descriptors */
#define MVGBE_PTXSU_NOWD(x) (((x) & 0xff) << 0)
/* Number Of Released Buffers */
#define MVGBE_PTXSU_NORB(x) (((x) & 0xff) << 16)
@@ -779,7 +779,7 @@
/*
* DMA descriptors
* Despite the documentation saying these descriptors only need to be
- * aligned to 16-byte bondaries, 32-byte alignment seems to be required
+ * aligned to 16-byte boundaries, 32-byte alignment seems to be required
* by the hardware. We'll just pad them out to that to make it easier.
*/
struct mvgbe_tx_desc {
Index: src/sys/dev/microcode/aic7xxx/aic7xxx.reg
diff -u src/sys/dev/microcode/aic7xxx/aic7xxx.reg:1.6 src/sys/dev/microcode/aic7xxx/aic7xxx.reg:1.7
--- src/sys/dev/microcode/aic7xxx/aic7xxx.reg:1.6 Tue Jan 25 22:01:34 2022
+++ src/sys/dev/microcode/aic7xxx/aic7xxx.reg Fri Feb 2 22:39:10 2024
@@ -39,7 +39,7 @@
*
* $FreeBSD: /repoman/r/ncvs/src/sys/dev/aic7xxx/aic7xxx.reg,v 1.43 2003/01/20 20:44:55 gibbs Exp $
*/
-VERSION = "$NetBSD: aic7xxx.reg,v 1.6 2022/01/25 22:01:34 andvar Exp $"
+VERSION = "$NetBSD: aic7xxx.reg,v 1.7 2024/02/02 22:39:10 andvar Exp $"
/*
* This file is processed by the aic7xxx_asm utility for use in assembling
@@ -470,7 +470,7 @@ register TARGID {
}
/*
- * Serial Port I/O Cabability register (p. 4-95 aic7860 Data Book)
+ * Serial Port I/O Capability register (p. 4-95 aic7860 Data Book)
* Indicates if external logic has been attached to the chip to
* perform the tasks of accessing a serial eeprom, testing termination
* strength, and performing cable detection. On the aic7860, most of
Index: src/sys/dev/pci/if_sipreg.h
diff -u src/sys/dev/pci/if_sipreg.h:1.21 src/sys/dev/pci/if_sipreg.h:1.22
--- src/sys/dev/pci/if_sipreg.h:1.21 Sun Mar 8 02:44:12 2020
+++ src/sys/dev/pci/if_sipreg.h Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: if_sipreg.h,v 1.21 2020/03/08 02:44:12 thorpej Exp $ */
+/* $NetBSD: if_sipreg.h,v 1.22 2024/02/02 22:39:10 andvar Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -685,7 +685,7 @@ struct sip_desc {
#define SIP_TBICR 0xe0 /* TBI control register */
#define TBICR_MR_LOOPBACK 0x00004000 /* TBI PCS loopback enable */
#define TBICR_MR_AN_ENABLE 0x00001000 /* TBI autonegotiation enable */
-#define TBICR_MR_RESTART_AN 0x00000200 /* restart TBI autoneogtiation */
+#define TBICR_MR_RESTART_AN 0x00000200 /* restart TBI autonegotiation */
#define SIP_TBISR 0xe4 /* TBI status register */
#define TBISR_MR_LINK_STATUS 0x00000020 /* TBI link status */
Index: src/sys/dev/pci/if_skreg.h
diff -u src/sys/dev/pci/if_skreg.h:1.31 src/sys/dev/pci/if_skreg.h:1.32
--- src/sys/dev/pci/if_skreg.h:1.31 Wed Feb 23 21:54:41 2022
+++ src/sys/dev/pci/if_skreg.h Fri Feb 2 22:39:10 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: if_skreg.h,v 1.31 2022/02/23 21:54:41 andvar Exp $ */
+/* $NetBSD: if_skreg.h,v 1.32 2024/02/02 22:39:10 andvar Exp $ */
/*-
* Copyright (c) 2003 The NetBSD Foundation, Inc.
@@ -1856,16 +1856,16 @@ struct msk_status_desc {
/* Source Address High #2 (SAH2) */
#define YUKON_SAH2 0x0030 /* SA2[47:32] */
-/* Multicatst Address Hash Register 1 (MCAH1) */
+/* Multicast Address Hash Register 1 (MCAH1) */
#define YUKON_MCAH1 0x0034
-/* Multicatst Address Hash Register 2 (MCAH2) */
+/* Multicast Address Hash Register 2 (MCAH2) */
#define YUKON_MCAH2 0x0038
-/* Multicatst Address Hash Register 3 (MCAH3) */
+/* Multicast Address Hash Register 3 (MCAH3) */
#define YUKON_MCAH3 0x003c
-/* Multicatst Address Hash Register 4 (MCAH4) */
+/* Multicast Address Hash Register 4 (MCAH4) */
#define YUKON_MCAH4 0x0040
/* Transmit Interrupt Register (TIR) */
Index: src/sys/netinet/sctp_input.c
diff -u src/sys/netinet/sctp_input.c:1.16 src/sys/netinet/sctp_input.c:1.17
--- src/sys/netinet/sctp_input.c:1.16 Fri Apr 8 10:27:04 2022
+++ src/sys/netinet/sctp_input.c Fri Feb 2 22:39:09 2024
@@ -1,5 +1,5 @@
/* $KAME: sctp_input.c,v 1.28 2005/04/21 18:36:21 nishida Exp $ */
-/* $NetBSD: sctp_input.c,v 1.16 2022/04/08 10:27:04 andvar Exp $ */
+/* $NetBSD: sctp_input.c,v 1.17 2024/02/02 22:39:09 andvar Exp $ */
/*
* Copyright (C) 2002, 2003, 2004 Cisco Systems Inc,
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sctp_input.c,v 1.16 2022/04/08 10:27:04 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sctp_input.c,v 1.17 2024/02/02 22:39:09 andvar Exp $");
#ifdef _KERNEL_OPT
#include "opt_ipsec.h"
@@ -388,7 +388,7 @@ sctp_process_init_ack(struct mbuf *m, in
/*
* Cancel the INIT timer, We do this first before queueing
* the cookie. We always cancel at the primary to assume that
- * we are canceling the timer started by the INIT which always
+ * we are cancelling the timer started by the INIT which always
* goes to the primary.
*/
sctp_timer_stop(SCTP_TIMER_TYPE_INIT, stcb->sctp_ep, stcb,
Index: src/tests/lib/libm/t_round.c
diff -u src/tests/lib/libm/t_round.c:1.9 src/tests/lib/libm/t_round.c:1.10
--- src/tests/lib/libm/t_round.c:1.9 Sun Sep 3 13:41:19 2017
+++ src/tests/lib/libm/t_round.c Fri Feb 2 22:39:09 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: t_round.c,v 1.9 2017/09/03 13:41:19 wiz Exp $ */
+/* $NetBSD: t_round.c,v 1.10 2024/02/02 22:39:09 andvar Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
/*
* This tests for a bug in the initial implementation where
- * precision was lost in an internal substraction, leading to
+ * precision was lost in an internal subtraction, leading to
* rounding into the wrong direction.
*/
