Module Name:    src
Committed By:   tsutsui
Date:           Fri Dec 29 02:30:36 UTC 2023

Modified Files:
        src/sys/arch/luna68k/include: pmap.h
        src/sys/arch/luna68k/luna68k: genassym.cf locore.s

Log Message:
Use proper macro for the 030/040 TT registers to map LUNA's I/O spaces.

No binary change.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/luna68k/include/pmap.h
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/luna68k/luna68k/genassym.cf
cvs rdiff -u -r1.71 -r1.72 src/sys/arch/luna68k/luna68k/locore.s

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/luna68k/include/pmap.h
diff -u src/sys/arch/luna68k/include/pmap.h:1.10 src/sys/arch/luna68k/include/pmap.h:1.11
--- src/sys/arch/luna68k/include/pmap.h:1.10	Sun Nov  3 19:56:29 2002
+++ src/sys/arch/luna68k/include/pmap.h	Fri Dec 29 02:30:35 2023
@@ -1,3 +1,38 @@
-/*	$NetBSD: pmap.h,v 1.10 2002/11/03 19:56:29 chs Exp $	*/
+/*	$NetBSD: pmap.h,v 1.11 2023/12/29 02:30:35 tsutsui Exp $	*/
+
+#ifndef _LUNA68K_PMAP_H_
 
 #include <m68k/pmap_motorola.h>
+#include <m68k/mmu_30.h>
+
+/*
+ * Transparent translation register values for IO space 0x40000000-0xffffffff
+ *
+ * map via TT0: 0x40000000-0x7fffffff
+ * map via TT1: 0x80000000-0xffffffff
+ *
+ * On 030 both use Function Codes 4-7 (to get SUPERD and SUPERP).
+ * XXX: they can probably just use SUPERD.
+ */
+
+#define	LUNA68K_TT30_IO0	(0x40000000 |				\
+				 __SHIFTIN(0x3f,TT30_LAM) |		\
+				 TT30_E | TT30_CI | TT30_RWM |	\
+				__SHIFTIN(4,TT30_FCBASE) |		\
+				__SHIFTIN(3,TT30_FCMASK))
+#define	LUNA68K_TT30_IO1	(0x80000000 |				\
+				 __SHIFTIN(0x7f,TT30_LAM) |		\
+				 TT30_E | TT30_CI | TT30_RWM |	\
+				__SHIFTIN(4,TT30_FCBASE) |		\
+				__SHIFTIN(3,TT30_FCMASK))
+
+#define	LUNA68K_TT40_IO0	(0x40000000 |				\
+				 __SHIFTIN(0x3f,TTR40_LAM) |		\
+				 TTR40_E | TTR40_SUPER |		\
+				 PTE40_CM_NC_SER)
+#define	LUNA68K_TT40_IO1	(0x80000000 |				\
+				 __SHIFTIN(0x7f,TTR40_LAM) |		\
+				 TTR40_E | TTR40_SUPER |		\
+				 PTE40_CM_NC_SER)
+
+#endif /* _LUNA68K_PMAP_H_ */

Index: src/sys/arch/luna68k/luna68k/genassym.cf
diff -u src/sys/arch/luna68k/luna68k/genassym.cf:1.25 src/sys/arch/luna68k/luna68k/genassym.cf:1.26
--- src/sys/arch/luna68k/luna68k/genassym.cf:1.25	Wed Dec 27 17:35:35 2023
+++ src/sys/arch/luna68k/luna68k/genassym.cf	Fri Dec 29 02:30:36 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.25 2023/12/27 17:35:35 thorpej Exp $
+#	$NetBSD: genassym.cf,v 1.26 2023/12/29 02:30:36 tsutsui Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -91,6 +91,12 @@ export	MMU51_CRP_BITS
 export	MMU51_TCR_BITS
 export	MMU40_TCR_BITS
 
+# Transparent translation register values (from pmap.h)
+export	LUNA68K_TT30_IO0
+export	LUNA68K_TT30_IO1
+export	LUNA68K_TT40_IO0
+export	LUNA68K_TT40_IO1
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/luna68k/luna68k/locore.s
diff -u src/sys/arch/luna68k/luna68k/locore.s:1.71 src/sys/arch/luna68k/luna68k/locore.s:1.72
--- src/sys/arch/luna68k/luna68k/locore.s:1.71	Wed Dec 27 03:03:41 2023
+++ src/sys/arch/luna68k/luna68k/locore.s	Fri Dec 29 02:30:36 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.71 2023/12/27 03:03:41 thorpej Exp $ */
+/* $NetBSD: locore.s,v 1.72 2023/12/29 02:30:36 tsutsui Exp $ */
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -898,16 +898,16 @@ GLOBAL(protocrp)
 
 GLOBAL(prototc)
 	.long	MMU51_TCR_BITS	| %tc -- see pmap.h
-GLOBAL(protott0)		| tt0 0x4000.0000-0x7fff.ffff
-	.long	0x403f8543	|
-GLOBAL(protott1)		| tt1 0x8000.0000-0xffff.ffff
-	.long	0x807f8543	|
+GLOBAL(protott0)
+	.long	LUNA68K_TT30_IO0 | prototype transparent translation register 0
+GLOBAL(protott1)
+	.long	LUNA68K_TT30_IO1 | prototype transparent translation register 1
 GLOBAL(proto040tc)
 	.long	MMU40_TCR_BITS	| %tc -- see pmap.h
-GLOBAL(proto040tt0)		| tt0 0x4000.0000-0x7fff.ffff
-	.long	0x403fa040	| kernel only, cache inhibit, serialized
-GLOBAL(proto040tt1)		| tt1 0x8000.0000-0xffff.ffff
-	.long	0x807fa040	| kernel only, cache inhibit, serialized
+GLOBAL(proto040tt0)
+	.long	LUNA68K_TT40_IO0 | prototype transparent translation register 0
+GLOBAL(proto040tt1)
+	.long	LUNA68K_TT40_IO1 | prototype transparent translation register 1
 nullrp:
 	.long	0x7fff0001	| do-nothing MMU root pointer
 

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