Module Name:    src
Committed By:   thorpej
Date:           Wed Dec 27 03:03:42 UTC 2023

Modified Files:
        src/sys/arch/amiga/amiga: amiga_init.c genassym.cf locore.s
        src/sys/arch/atari/atari: atari_init.c genassym.cf locore.s
        src/sys/arch/cesfic/cesfic: genassym.cf locore.s
        src/sys/arch/hp300/hp300: genassym.cf locore.s
        src/sys/arch/luna68k/luna68k: genassym.cf locore.s
        src/sys/arch/m68k/include: pmap_motorola.h pte_motorola.h
        src/sys/arch/mac68k/mac68k: genassym.cf locore.s
        src/sys/arch/mvme68k/mvme68k: genassym.cf locore.s
        src/sys/arch/news68k/news68k: genassym.cf locore.s
        src/sys/arch/next68k/next68k: genassym.cf locore.s
        src/sys/arch/x68k/x68k: genassym.cf locore.s

Log Message:
Stop using magic numbers for the MMU root pointer attributes and the
Translation Control register, and also get rid of "#if PGSHIFT == ..."
where those magic numbers are used.

Instead, define new macros: MMU51_SRP_BITS, MMU51_CRP_BITS, MMU51_TCR_BITS,
and MMU40_TCR_BITS, in terms of the definitions in mmu_{40,51}.h.  These
automagically adapt to 8K and 4K pages based on the machine-specific value
of PGSHIFT.


To generate a diff of this commit:
cvs rdiff -u -r1.131 -r1.132 src/sys/arch/amiga/amiga/amiga_init.c
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/amiga/amiga/genassym.cf
cvs rdiff -u -r1.164 -r1.165 src/sys/arch/amiga/amiga/locore.s
cvs rdiff -u -r1.108 -r1.109 src/sys/arch/atari/atari/atari_init.c
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/atari/atari/genassym.cf
cvs rdiff -u -r1.120 -r1.121 src/sys/arch/atari/atari/locore.s
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/cesfic/cesfic/genassym.cf
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/cesfic/cesfic/locore.s
cvs rdiff -u -r1.47 -r1.48 src/sys/arch/hp300/hp300/genassym.cf
cvs rdiff -u -r1.176 -r1.177 src/sys/arch/hp300/hp300/locore.s
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/luna68k/luna68k/genassym.cf
cvs rdiff -u -r1.70 -r1.71 src/sys/arch/luna68k/luna68k/locore.s
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/m68k/include/pmap_motorola.h
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/m68k/include/pte_motorola.h
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/mac68k/mac68k/genassym.cf
cvs rdiff -u -r1.176 -r1.177 src/sys/arch/mac68k/mac68k/locore.s
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/mvme68k/mvme68k/genassym.cf
cvs rdiff -u -r1.120 -r1.121 src/sys/arch/mvme68k/mvme68k/locore.s
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/news68k/news68k/genassym.cf
cvs rdiff -u -r1.73 -r1.74 src/sys/arch/news68k/news68k/locore.s
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/next68k/next68k/genassym.cf
cvs rdiff -u -r1.75 -r1.76 src/sys/arch/next68k/next68k/locore.s
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/x68k/x68k/genassym.cf
cvs rdiff -u -r1.124 -r1.125 src/sys/arch/x68k/x68k/locore.s

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amiga/amiga/amiga_init.c
diff -u src/sys/arch/amiga/amiga/amiga_init.c:1.131 src/sys/arch/amiga/amiga/amiga_init.c:1.132
--- src/sys/arch/amiga/amiga/amiga_init.c:1.131	Tue Aug 17 22:00:27 2021
+++ src/sys/arch/amiga/amiga/amiga_init.c	Wed Dec 27 03:03:40 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: amiga_init.c,v 1.131 2021/08/17 22:00:27 andvar Exp $	*/
+/*	$NetBSD: amiga_init.c,v 1.132 2023/12/27 03:03:40 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1994 Michael L. Hitch
@@ -39,7 +39,7 @@
 #include "ser.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amiga_init.c,v 1.131 2021/08/17 22:00:27 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amiga_init.c,v 1.132 2023/12/27 03:03:40 thorpej Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -783,10 +783,9 @@ start_c(int id, u_int fphystart, u_int f
 #endif
 	{
 		/*
-		 * setup and load SRP
-		 * nolimit, share global, 4 byte PTE's
+		 * setup and load SRP (see pmap.h)
 		 */
-		(RELOC(protorp[0], u_int)) = 0x80000202;
+		(RELOC(protorp[0], u_int)) = MMU51_SRP_BITS;
 		__asm volatile ("pmove %0@,%%srp":: "a" (&RELOC(protorp, u_int)));
 	}
 }

Index: src/sys/arch/amiga/amiga/genassym.cf
diff -u src/sys/arch/amiga/amiga/genassym.cf:1.33 src/sys/arch/amiga/amiga/genassym.cf:1.34
--- src/sys/arch/amiga/amiga/genassym.cf:1.33	Thu Feb 20 08:27:38 2020
+++ src/sys/arch/amiga/amiga/genassym.cf	Wed Dec 27 03:03:40 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.33 2020/02/20 08:27:38 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.34 2023/12/27 03:03:40 thorpej Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -84,6 +84,12 @@ ifdef DRACO
 define	DRACO		DRACO
 endif
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/amiga/amiga/locore.s
diff -u src/sys/arch/amiga/amiga/locore.s:1.164 src/sys/arch/amiga/amiga/locore.s:1.165
--- src/sys/arch/amiga/amiga/locore.s:1.164	Tue Dec 26 02:38:26 2023
+++ src/sys/arch/amiga/amiga/locore.s	Wed Dec 27 03:03:40 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.164 2023/12/26 02:38:26 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.165 2023/12/27 03:03:40 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -933,7 +933,7 @@ Lstartnot040:
 	orl	#0x0000c044,%d0		| 16 MB, ro, cache inhibited
 	.word	0x4e7b,0x0004		| movc %d0,%itt0
 	.word	0xf518			| pflusha
-	movl	#0xc000,%d0		| enable MMU
+	movl	#MMU40_TCR_BITS,%d0	| enable MMU
 	.word	0x4e7b,0x0003		| movc %d0,%tc
 	jmp	Lcleanitt0:l
 Lcleanitt0:
@@ -963,7 +963,7 @@ LMMUenable_start:
 	cmpl	#MMU_68040,%a0@
 	jne	Lenable030
 	.word	0xf518			| pflusha
-	movl	#0xc000,%d0		| enable MMU
+	movl	#MMU40_TCR_BITS,%d0	| enable MMU
 	.word	0x4e7b,0x0003		| movc	%d0,%tc
 	jmp	LMMUenable_end:l
 #endif /* M68040 || M68060 */
@@ -973,8 +973,7 @@ Lenable030:
 	pmove	%a0@,%tc
 	jmp	LMMUenable_end:l
 
-/* ENABLE, SRP_ENABLE, 8K pages, 8bit A-level, 11bit B-level */
-Ltc:	.long	0x82d08b00
+Ltc:	.long	MMU51_TCR_BITS		| see pmap.h
 
 LMMUenable_end:
 
@@ -1419,7 +1418,7 @@ GLOBAL(ectype)
 GLOBAL(fputype)
 	.long	FPU_NONE
 GLOBAL(protorp)
-	.long	0x80000002,0	| prototype root pointer
+	.long	MMU51_CRP_BITS,0 | prototype root pointer
 GLOBAL(delaydivisor)
 	.long	12		| should be enough for 80 MHz 68060
 				| will be adapted to other CPUs in

Index: src/sys/arch/atari/atari/atari_init.c
diff -u src/sys/arch/atari/atari/atari_init.c:1.108 src/sys/arch/atari/atari/atari_init.c:1.109
--- src/sys/arch/atari/atari/atari_init.c:1.108	Thu Dec  7 16:56:09 2023
+++ src/sys/arch/atari/atari/atari_init.c	Wed Dec 27 03:03:40 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: atari_init.c,v 1.108 2023/12/07 16:56:09 thorpej Exp $	*/
+/*	$NetBSD: atari_init.c,v 1.109 2023/12/27 03:03:40 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1995 Leo Weppelman
@@ -33,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.108 2023/12/07 16:56:09 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.109 2023/12/27 03:03:40 thorpej Exp $");
 
 #include "opt_ddb.h"
 #include "opt_mbtype.h"
@@ -600,9 +600,9 @@ start_c(int id, u_int ttphystart, u_int 
 
 	/*
 	 * Prepare to enable the MMU.
-	 * Setup and load SRP nolimit, share global, 4 byte PTE's
+	 * Setup and load SRP (see pmap.h)
 	 */
-	protorp[0] = 0x80000202;
+	protorp[0] = MMU51_SRP_BITS;
 	protorp[1] = Sysseg_pa;			/* + segtable address */
 
 	cpu_init_kcorehdr(kbase, Sysseg_pa);
@@ -650,7 +650,7 @@ start_c(int id, u_int ttphystart, u_int 
 		 * enable_cpr, enable_srp, pagesize=8k,
 		 * A = 8 bits, B = 11 bits
 		 */
-		tc = 0x82d08b00;
+		tc = MMU51_TCR_BITS;
 		__asm volatile ("pflusha" : : );
 		__asm volatile ("pmove %0@,%%tc" : : "a" (&tc));
 	}

Index: src/sys/arch/atari/atari/genassym.cf
diff -u src/sys/arch/atari/atari/genassym.cf:1.36 src/sys/arch/atari/atari/genassym.cf:1.37
--- src/sys/arch/atari/atari/genassym.cf:1.36	Fri Jan  6 10:28:27 2023
+++ src/sys/arch/atari/atari/genassym.cf	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.36 2023/01/06 10:28:27 tsutsui Exp $
+#	$NetBSD: genassym.cf,v 1.37 2023/12/27 03:03:41 thorpej Exp $
 
 #-
 # Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -67,6 +67,12 @@ ifdef M68060
 define	M68060			1
 endif
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/atari/atari/locore.s
diff -u src/sys/arch/atari/atari/locore.s:1.120 src/sys/arch/atari/atari/locore.s:1.121
--- src/sys/arch/atari/atari/locore.s:1.120	Tue Dec 26 02:38:27 2023
+++ src/sys/arch/atari/atari/locore.s	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.120 2023/12/26 02:38:27 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.121 2023/12/27 03:03:41 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -1260,7 +1260,7 @@ Ldorebootend:
 	.space	PAGE_SIZE
 ASLOCAL(tmpstk)
 GLOBAL(protorp)
-	.long	0x80000002,0		|  prototype root pointer
+	.long	MMU51_CRP_BITS,0	| prototype root pointer
 
 #ifdef M68060 /* XXX */
 L60iem:		.long	0

Index: src/sys/arch/cesfic/cesfic/genassym.cf
diff -u src/sys/arch/cesfic/cesfic/genassym.cf:1.17 src/sys/arch/cesfic/cesfic/genassym.cf:1.18
--- src/sys/arch/cesfic/cesfic/genassym.cf:1.17	Thu Feb 20 08:27:38 2020
+++ src/sys/arch/cesfic/cesfic/genassym.cf	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.17 2020/02/20 08:27:38 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.18 2023/12/27 03:03:41 thorpej Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -93,6 +93,12 @@ define	PAGE_SIZE		PAGE_SIZE
 define	PGSHIFT			PGSHIFT
 define	USRSTACK		USRSTACK
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/cesfic/cesfic/locore.s
diff -u src/sys/arch/cesfic/cesfic/locore.s:1.36 src/sys/arch/cesfic/cesfic/locore.s:1.37
--- src/sys/arch/cesfic/cesfic/locore.s:1.36	Tue Dec 26 02:38:27 2023
+++ src/sys/arch/cesfic/cesfic/locore.s	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.36 2023/12/26 02:38:27 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.37 2023/12/27 03:03:41 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1980, 1990, 1993
@@ -278,10 +278,10 @@ Lstart2:
 	jra	Lstploaddone
 Lmotommu1:
 	RELOC(protorp, %a0)
-	movl	#0x80000202,%a0@	| nolimit + share global + 4 byte PTEs
+	movl	#MMU51_SRP_BITS,%a0@	| see pmap.h
 	movl	%d1,%a0@(4)		| + segtable address
 	pmove	%a0@,%srp		| load the supervisor root pointer
-	movl	#0x80000002,%a0@	| reinit upper half for CRP loads
+	movl	#MMU51_CRP_BITS,%a0@	| reinit upper half for CRP loads
 Lstploaddone:
 
 	RELOC(mmutype, %a0)
@@ -298,7 +298,7 @@ Lstploaddone:
 	.word	0xf4d8			| cinva bc
 	.word	0xf518			| pflusha
 
-	movl	#0x8000, %d0
+	movl	#MMU40_TCR_BITS, %d0
 	.long	0x4e7b0003		| movc d0,tc
 	movl	#0x80008000, %d0
 	movc	%d0, %cacr		| turn on both caches
@@ -308,7 +308,7 @@ Lmotommu2:
 	/* XXX do TT here */
 	pflusha
 	RELOC(prototc, %a2)
-	movl	#0x82c0aa00,%a2@	| value to load TC with
+	movl	#MMU51_TCR_BITS,%a2@	| value to load TC with
 	pmove	%a2@,%tc		| load it
 	jmp	Lenab1
 

Index: src/sys/arch/hp300/hp300/genassym.cf
diff -u src/sys/arch/hp300/hp300/genassym.cf:1.47 src/sys/arch/hp300/hp300/genassym.cf:1.48
--- src/sys/arch/hp300/hp300/genassym.cf:1.47	Thu Feb 20 08:27:38 2020
+++ src/sys/arch/hp300/hp300/genassym.cf	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.47 2020/02/20 08:27:38 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.48 2023/12/27 03:03:41 thorpej Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -140,6 +140,12 @@ define	PGSHIFT			PGSHIFT
 define	USRSTACK		USRSTACK
 define	MAXADDR			MAXADDR
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/hp300/hp300/locore.s
diff -u src/sys/arch/hp300/hp300/locore.s:1.176 src/sys/arch/hp300/hp300/locore.s:1.177
--- src/sys/arch/hp300/hp300/locore.s:1.176	Tue Dec 26 02:38:27 2023
+++ src/sys/arch/hp300/hp300/locore.s	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.176 2023/12/26 02:38:27 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.177 2023/12/27 03:03:41 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1980, 1990, 1993
@@ -459,10 +459,10 @@ Lstart3:
 	jra	Lstploaddone
 Lmotommu1:
 	RELOC(protorp, %a0)
-	movl	#0x80000202,%a0@	| nolimit + share global + 4 byte PTEs
+	movl	#MMU51_SRP_BITS,%a0@	| see pmap.h
 	movl	%d1,%a0@(4)		| + segtable address
 	pmove	%a0@,%srp		| load the supervisor root pointer
-	movl	#0x80000002,%a0@	| reinit upper half for CRP loads
+	movl	#MMU51_CRP_BITS,%a0@	| reinit upper half for CRP loads
 	jra	Lstploaddone		| done
 Lhpmmu2:
 	moveq	#PGSHIFT,%d2
@@ -517,11 +517,7 @@ Lhighcode:
 	.long	0x4e7b0007		| movc %d0,%dtt1
 	.word	0xf4d8			| cinva bc
 	.word	0xf518			| pflusha
-#if PGSHIFT == 13
-	movl	#0xc000,%d0
-#else
-	movl	#0x8000,%d0
-#endif
+	movl	#MMU40_TCR_BITS,%d0
 	.long	0x4e7b0003		| movc %d0,%tc
 	movl	#CACHE40_ON,%d0
 	movc	%d0,%cacr		| turn on both caches
@@ -531,11 +527,7 @@ Lmotommu2:
 					| enable 68881 and i-cache
 	pflusha
 	RELOC(prototc, %a2)
-#if PGSHIFT == 13
-	movl	#0x82d08b00,%a2@	| value to load TC with
-#else
-	movl	#0x82c0aa00,%a2@	| value to load TC with
-#endif
+	movl	#MMU51_TCR_BITS,%a2@	| value to load TC with
 	pmove	%a2@,%tc		| load it
 	jmp	Lenab1:l		| forced not be pc-relative
 Lhpmmu3:

Index: src/sys/arch/luna68k/luna68k/genassym.cf
diff -u src/sys/arch/luna68k/luna68k/genassym.cf:1.23 src/sys/arch/luna68k/luna68k/genassym.cf:1.24
--- src/sys/arch/luna68k/luna68k/genassym.cf:1.23	Thu Feb 20 08:27:39 2020
+++ src/sys/arch/luna68k/luna68k/genassym.cf	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.23 2020/02/20 08:27:39 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.24 2023/12/27 03:03:41 thorpej Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -84,6 +84,12 @@ define	PAGE_SIZE		PAGE_SIZE
 define	PGSHIFT			PGSHIFT
 define	USRSTACK		USRSTACK
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/luna68k/luna68k/locore.s
diff -u src/sys/arch/luna68k/luna68k/locore.s:1.70 src/sys/arch/luna68k/luna68k/locore.s:1.71
--- src/sys/arch/luna68k/luna68k/locore.s:1.70	Tue Dec 26 02:38:27 2023
+++ src/sys/arch/luna68k/luna68k/locore.s	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.70 2023/12/26 02:38:27 thorpej Exp $ */
+/* $NetBSD: locore.s,v 1.71 2023/12/27 03:03:41 thorpej Exp $ */
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -892,26 +892,18 @@ GLOBAL(fputype)
 	.long	FPU_68881	| default to 68881
 
 GLOBAL(protosrp)
-	.long	0x80000202,0	| prototype supervisor root pointer
+	.long	MMU51_SRP_BITS,0 | prototype supervisor root pointer
 GLOBAL(protocrp)
-	.long	0x80000002,0	| prototype CPU root pointer
+	.long	MMU51_CRP_BITS,0 | prototype CPU root pointer
 
 GLOBAL(prototc)
-#if PGSHIFT == 13
-	.long	0x82d08b00	| %tc (SRP,CRP,8KB page, TIA/TIB=8/11bits)
-#else
-	.long	0x82c0aa00	| %tc (SRP,CRP,4KB page, TIA/TIB=10/10bits)
-#endif
+	.long	MMU51_TCR_BITS	| %tc -- see pmap.h
 GLOBAL(protott0)		| tt0 0x4000.0000-0x7fff.ffff
 	.long	0x403f8543	|
 GLOBAL(protott1)		| tt1 0x8000.0000-0xffff.ffff
 	.long	0x807f8543	|
 GLOBAL(proto040tc)
-#if PGSHIFT == 13
-	.long	0xc000		| %tc (8KB page)
-#else
-	.long	0x8000		| %tc (4KB page)
-#endif
+	.long	MMU40_TCR_BITS	| %tc -- see pmap.h
 GLOBAL(proto040tt0)		| tt0 0x4000.0000-0x7fff.ffff
 	.long	0x403fa040	| kernel only, cache inhibit, serialized
 GLOBAL(proto040tt1)		| tt1 0x8000.0000-0xffff.ffff

Index: src/sys/arch/m68k/include/pmap_motorola.h
diff -u src/sys/arch/m68k/include/pmap_motorola.h:1.41 src/sys/arch/m68k/include/pmap_motorola.h:1.42
--- src/sys/arch/m68k/include/pmap_motorola.h:1.41	Tue Dec 26 17:48:38 2023
+++ src/sys/arch/m68k/include/pmap_motorola.h	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap_motorola.h,v 1.41 2023/12/26 17:48:38 thorpej Exp $	*/
+/*	$NetBSD: pmap_motorola.h,v 1.42 2023/12/27 03:03:41 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1991, 1993
@@ -98,6 +98,21 @@ struct pmap {
 };
 
 /*
+ * Root Pointer attributes for Supervisor and User modes.
+ *
+ * Supervisor:
+ * - No index limit (Lower limit == 0)
+ * - Points to Short format descriptor table.
+ * - Shared Globally
+ *
+ * User:
+ * - No index limit (Lower limit == 0)
+ * - Points to Short format descriptor table.
+ */
+#define	MMU51_SRP_BITS	(DTE51_LOWER | DTE51_SG | DT51_SHORT)
+#define	MMU51_CRP_BITS	(DTE51_LOWER |            DT51_SHORT)
+
+/*
  * MMU specific segment values
  *
  * We are using following segment layout in m68k pmap_motorola.c:
@@ -122,12 +137,19 @@ struct pmap {
  * so they have different values between 020/030 and 040/060.
  */
 							/*  8KB /  4KB	*/
-#define TIB_SHIFT	(PG_SHIFT - 2)			/*   11 /   10	*/
+#define TIB_SHIFT	(PGSHIFT - 2)			/*   11 /   10	*/
 #define TIB_SIZE	(1U << TIB_SHIFT)		/* 2048 / 1024	*/
-#define TIA_SHIFT	(32 - TIB_SHIFT - PG_SHIFT)	/*    8 /   10	*/
+#define TIA_SHIFT	(32 - TIB_SHIFT - PGSHIFT)	/*    8 /   10	*/
 #define TIA_SIZE	(1U << TIA_SHIFT)		/*  256 / 1024	*/
 
-#define SEGSHIFT	(TIB_SHIFT + PG_SHIFT)		/*   24 /   22	*/
+#define	MMU51_TCR_BITS	(TCR51_E | TCR51_SRE |				\
+			 __SHIFTIN(PGSHIFT, TCR51_PS) |			\
+			 __SHIFTIN(TIA_SHIFT, TCR51_TIA) |		\
+			 __SHIFTIN(TIB_SHIFT, TCR51_TIB))
+#define	MMU40_TCR_BITS	(TCR40_E |					\
+			 __SHIFTIN(PGSHIFT - 12, TCR40_P))
+
+#define SEGSHIFT	(TIB_SHIFT + PGSHIFT)		/*   24 /   22	*/
 
 #define NBSEG30		(1U << SEGSHIFT)
 #define NBSEG40		(1U << SG4_SHIFT2)

Index: src/sys/arch/m68k/include/pte_motorola.h
diff -u src/sys/arch/m68k/include/pte_motorola.h:1.8 src/sys/arch/m68k/include/pte_motorola.h:1.9
--- src/sys/arch/m68k/include/pte_motorola.h:1.8	Tue Feb  8 20:20:16 2011
+++ src/sys/arch/m68k/include/pte_motorola.h	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: pte_motorola.h,v 1.8 2011/02/08 20:20:16 rmind Exp $	*/
+/*	$NetBSD: pte_motorola.h,v 1.9 2023/12/27 03:03:41 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -41,6 +41,9 @@
 #ifndef	_MACHINE_PTE_H_
 #define	_MACHINE_PTE_H_
 
+#include <m68k/mmu_51.h>
+#include <m68k/mmu_40.h>
+
 /*
  * m68k motorola MMU segment/page table entries
  */

Index: src/sys/arch/mac68k/mac68k/genassym.cf
diff -u src/sys/arch/mac68k/mac68k/genassym.cf:1.41 src/sys/arch/mac68k/mac68k/genassym.cf:1.42
--- src/sys/arch/mac68k/mac68k/genassym.cf:1.41	Thu Feb 20 08:27:39 2020
+++ src/sys/arch/mac68k/mac68k/genassym.cf	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.41 2020/02/20 08:27:39 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.42 2023/12/27 03:03:41 thorpej Exp $
 
 #
 # Copyright (c) 1990 The Regents of the University of California.
@@ -74,6 +74,12 @@ define	PGSHIFT 		PGSHIFT
 define	USRIOSIZE		USRIOSIZE
 define	USRSTACK		USRSTACK
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/mac68k/mac68k/locore.s
diff -u src/sys/arch/mac68k/mac68k/locore.s:1.176 src/sys/arch/mac68k/mac68k/locore.s:1.177
--- src/sys/arch/mac68k/mac68k/locore.s:1.176	Mon Dec 25 21:32:57 2023
+++ src/sys/arch/mac68k/mac68k/locore.s	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.176 2023/12/25 21:32:57 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.177 2023/12/27 03:03:41 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -383,11 +383,7 @@ Lnodjmemc:
 	movl	%sp@+,%a3
 #endif
 
-#if PGSHIFT == 13
-	movl	#0xc000,%d0
-#else
-	movl	#0x8000,%d0
-#endif
+	movl	#MMU40_TCR_BITS,%d0
 	.long	0x4e7b0003		| movc %d0,%tc   ;Enable MMU
 	movl	#CACHE40_ON,%d0
 	movc	%d0,%cacr		| turn on both caches
@@ -404,17 +400,13 @@ Lenablepre040MMU:
 
 LnokillTT:
 	lea	_C_LABEL(protorp),%a0
-	movl	#0x80000202,%a0@	| nolimit + share global + 4 byte PTEs
+	movl	#MMU51_SRP_BITS,%a0@	| see pmap.h
 	movl	%a1,%a0@(4)		| + segtable address
 	pmove	%a0@,%srp		| load the supervisor root pointer
-	movl	#0x80000002,%a0@	| reinit upper half for CRP loads
+	movl	#MMU51_CRP_BITS,%a0@	| reinit upper half for CRP loads
 	pflusha
 	lea	_ASM_LABEL(longscratch),%a2
-#if PGSHIFT == 13
-	movl	#0x82d08b00,%a2@	| value to load %TC with
-#else
-	movl	#0x82c0aa00,%a2@	| value to load %TC with
-#endif
+	movl	#MMU51_TCR_BITS,%a2@	| value to load %TC with
 	pmove	%a2@,%tc		| load it
 
 Lloaddone:

Index: src/sys/arch/mvme68k/mvme68k/genassym.cf
diff -u src/sys/arch/mvme68k/mvme68k/genassym.cf:1.38 src/sys/arch/mvme68k/mvme68k/genassym.cf:1.39
--- src/sys/arch/mvme68k/mvme68k/genassym.cf:1.38	Thu Feb 20 08:27:39 2020
+++ src/sys/arch/mvme68k/mvme68k/genassym.cf	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.38 2020/02/20 08:27:39 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.39 2023/12/27 03:03:41 thorpej Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -113,6 +113,12 @@ define	MVMEPROM_OUTSTRCRLF	MVMEPROM_OUTS
 define	MVMEPROM_BRDID_SIZE	sizeof(struct mvmeprom_brdid)
 define	MVMEPROM_BRDID_MODEL_OFFSET	offsetof(struct mvmeprom_brdid, model)
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/mvme68k/mvme68k/locore.s
diff -u src/sys/arch/mvme68k/mvme68k/locore.s:1.120 src/sys/arch/mvme68k/mvme68k/locore.s:1.121
--- src/sys/arch/mvme68k/mvme68k/locore.s:1.120	Tue Dec 26 02:38:27 2023
+++ src/sys/arch/mvme68k/mvme68k/locore.s	Wed Dec 27 03:03:41 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.120 2023/12/26 02:38:27 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.121 2023/12/27 03:03:41 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -581,10 +581,10 @@ Lstart2:
 	jra	Lstploaddone
 Lmotommu1:
 	RELOC(protorp, %a0)
-	movl	#0x80000202,%a0@	| nolimit + share global + 4 byte PTEs
+	movl	#MMU51_SRP_BITS,%a0@	| see pmap.h
 	movl	%d1,%a0@(4)		| + segtable address
 	pmove	%a0@,%srp		| load the supervisor root pointer
-	movl	#0x80000002,%a0@	| reinit upper half for CRP loads
+	movl	#MMU51_CRP_BITS,%a0@	| reinit upper half for CRP loads
 Lstploaddone:
 	RELOC(mmutype, %a0)
 	cmpl	#MMU_68040,%a0@		| 68040?
@@ -614,7 +614,7 @@ Lnot060cache:
 	jmp	Lenab1
 Lmotommu2:
 	pflusha
-	movl	#0x82c0aa00,%sp@-	| value to load TC with
+	movl	#MMU51_TCR_BITS,%sp@-	| value to load TC with
 	pmove	%sp@,%tc		| load it
 
 /*

Index: src/sys/arch/news68k/news68k/genassym.cf
diff -u src/sys/arch/news68k/news68k/genassym.cf:1.30 src/sys/arch/news68k/news68k/genassym.cf:1.31
--- src/sys/arch/news68k/news68k/genassym.cf:1.30	Thu Feb 20 08:27:39 2020
+++ src/sys/arch/news68k/news68k/genassym.cf	Wed Dec 27 03:03:42 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.30 2020/02/20 08:27:39 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.31 2023/12/27 03:03:42 thorpej Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -89,6 +89,12 @@ define	PAGE_SIZE		PAGE_SIZE
 define	PGSHIFT			PGSHIFT
 define	USRSTACK		USRSTACK
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/news68k/news68k/locore.s
diff -u src/sys/arch/news68k/news68k/locore.s:1.73 src/sys/arch/news68k/news68k/locore.s:1.74
--- src/sys/arch/news68k/news68k/locore.s:1.73	Tue Dec 26 02:38:27 2023
+++ src/sys/arch/news68k/news68k/locore.s	Wed Dec 27 03:03:42 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.73 2023/12/26 02:38:27 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.74 2023/12/27 03:03:42 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -356,10 +356,10 @@ Lstart2:
 	jra	Lstploaddone
 Lmotommu1:
 	RELOC(protorp, %a0)
-	movl	#0x80000202,%a0@	| nolimit + share global + 4 byte PTEs
+	movl	#MMU51_SRP_BITS,%a0@	| see pmap.h
 	movl	%d1,%a0@(4)		| + segtable address
 	pmove	%a0@,%srp		| load the supervisor root pointer
-	movl	#0x80000002,%a0@	| reinit upper half for CRP loads
+	movl	#MMU51_CRP_BITS,%a0@	| reinit upper half for CRP loads
 Lstploaddone:
 	RELOC(mmutype, %a0)
 	cmpl	#MMU_68040,%a0@		| 68040?
@@ -371,11 +371,7 @@ Lstploaddone:
 	.long	0x4e7b0007		| movc %d0,%dtt1
 	.word	0xf4d8			| cinva bc
 	.word	0xf518			| pflusha
-#if PGSHIFT == 13
-	movl	#0xc000,%d0
-#else
-	movl	#0x8000,%d0
-#endif
+	movl	#MMU40_TCR_BITS,%d0
 	.long	0x4e7b0003		| movc %d0,%tc
 	movl	#CACHE40_ON,%d0
 	movc	%d0,%cacr		| turn on both caches
@@ -392,11 +388,7 @@ Lmotommu2:
 
 	pflusha
 	RELOC(prototc, %a2)
-#if PGSHIFT == 13
-	movl	#0x82d08b00,%a2@	| value to load TC with
-#else
-	movl	#0x82c0aa00,%a2@	| value to load TC with
-#endif
+	movl	#MMU51_TCR_BITS,%a2@	| value to load TC with
 	pmove	%a2@,%tc		| load it
 
 /*

Index: src/sys/arch/next68k/next68k/genassym.cf
diff -u src/sys/arch/next68k/next68k/genassym.cf:1.29 src/sys/arch/next68k/next68k/genassym.cf:1.30
--- src/sys/arch/next68k/next68k/genassym.cf:1.29	Thu Feb 20 08:27:39 2020
+++ src/sys/arch/next68k/next68k/genassym.cf	Wed Dec 27 03:03:42 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.29 2020/02/20 08:27:39 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.30 2023/12/27 03:03:42 thorpej Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -110,6 +110,12 @@ define	USRSTACK		USRSTACK
 
 define NEXT_RAMBASE             NEXT_RAMBASE
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/next68k/next68k/locore.s
diff -u src/sys/arch/next68k/next68k/locore.s:1.75 src/sys/arch/next68k/next68k/locore.s:1.76
--- src/sys/arch/next68k/next68k/locore.s:1.75	Tue Dec 26 02:38:27 2023
+++ src/sys/arch/next68k/next68k/locore.s	Wed Dec 27 03:03:42 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.75 2023/12/26 02:38:27 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.76 2023/12/27 03:03:42 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1998 Darrin B. Jewell
@@ -336,10 +336,10 @@ Lstart3:
 	jra	Lstploaddone
 Lmotommu1:
 	RELOC(protorp, %a0)
-	movl	#0x80000202,%a0@	| nolimit + share global + 4 byte PTEs
+	movl	#MMU51_SRP_BITS,%a0@	| see pmap.h
 	movl	%d1,%a0@(4)		| + segtable address
 	pmove	%a0@,%srp		| load the supervisor root pointer
-	movl	#0x80000002,%a0@	| reinit upper half for CRP loads
+	movl	#MMU51_CRP_BITS,%a0@	| reinit upper half for CRP loads
 
 Lstploaddone:
 
@@ -386,7 +386,7 @@ Lturnoffttr:
 Lmotommu2:
 	pflusha
 	RELOC(prototc, %a2)
-	movl	#0x82c0aa00,%a2@	| value to load TC with
+	movl	#MMU51_TCR_BITS,%a2@	| value to load TC with
 	pmove	%a2@,%tc		| load it
 	jmp	Lenab1:l		| force absolute (not pc-relative) jmp
 

Index: src/sys/arch/x68k/x68k/genassym.cf
diff -u src/sys/arch/x68k/x68k/genassym.cf:1.37 src/sys/arch/x68k/x68k/genassym.cf:1.38
--- src/sys/arch/x68k/x68k/genassym.cf:1.37	Thu Feb 20 08:27:40 2020
+++ src/sys/arch/x68k/x68k/genassym.cf	Wed Dec 27 03:03:42 2023
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.37 2020/02/20 08:27:40 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.38 2023/12/27 03:03:42 thorpej Exp $
 
 #
 # Copyright (c) 1982, 1990, 1993
@@ -93,6 +93,12 @@ define	PAGE_SIZE		PAGE_SIZE
 define	PGSHIFT			PGSHIFT
 define	USRSTACK		USRSTACK
 
+# MMU configuration constants (from pmap.h)
+export	MMU51_SRP_BITS
+export	MMU51_CRP_BITS
+export	MMU51_TCR_BITS
+export	MMU40_TCR_BITS
+
 # lwp & proc fields and values
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_PROC			offsetof(struct lwp, l_proc)

Index: src/sys/arch/x68k/x68k/locore.s
diff -u src/sys/arch/x68k/x68k/locore.s:1.124 src/sys/arch/x68k/x68k/locore.s:1.125
--- src/sys/arch/x68k/x68k/locore.s:1.124	Tue Dec 26 02:38:27 2023
+++ src/sys/arch/x68k/x68k/locore.s	Wed Dec 27 03:03:42 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.124 2023/12/26 02:38:27 thorpej Exp $	*/
+/*	$NetBSD: locore.s,v 1.125 2023/12/27 03:03:42 thorpej Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -264,10 +264,10 @@ Lstart3:
 	jra	Lstploaddone
 Lmotommu1:
 	RELOC(protorp, %a0)
-	movl	#0x80000202,%a0@	| nolimit + share global + 4 byte PTEs
+	movl	#MMU51_SRP_BITS,%a0@	| nolimit + share global + 4 byte PTEs
 	movl	%d1,%a0@(4)		| + segtable address
 	pmove	%a0@,%srp		| load the supervisor root pointer
-	movl	#0x80000002,%a0@	| reinit upper half for CRP loads
+	movl	#MMU51_CRP_BITS,%a0@	| reinit upper half for CRP loads
 Lstploaddone:
 	RELOC(mmutype, %a0)
 	cmpl	#MMU_68040,%a0@		| 68040?
@@ -299,11 +299,7 @@ Ljupiterdone:
 	.long	0x4e7b0007		| movc %d0,%dtt1
 	.word	0xf4d8			| cinva bc
 	.word	0xf518			| pflusha
-#if PGSHIFT == 13
-	movl	#0xc000,%d0
-#else
-	movl	#0x8000,%d0
-#endif
+	movl	#MMU40_TCR_BITS,%d0
 	.long	0x4e7b0003		| movc %d0,%tc
 #ifdef M68060
 	RELOC(cputype, %a0)
@@ -321,11 +317,7 @@ Lnot060cache:
 	jmp	Lenab1
 Lmotommu2:
 	pflusha
-#if PGSHIFT == 13
-	movl	#0x82d08b00,%sp@-	| value to load TC with
-#else
-	movl	#0x82c0aa00,%sp@-	| value to load TC with
-#endif
+	movl	#MMU51_TCR_BITS,%sp@-	| value to load TC with
 	pmove	%sp@,%tc		| load it
 
 /*

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