Module Name: src
Committed By: tnn
Date: Tue Oct 17 19:13:05 UTC 2023
Modified Files:
src/sys/arch/arm/rockchip: rk3588_cru.c
Log Message:
rk3588_cru: fix clock id for BIGCORE1
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3588_cru.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3588_cru.c
diff -u src/sys/arch/arm/rockchip/rk3588_cru.c:1.1 src/sys/arch/arm/rockchip/rk3588_cru.c:1.2
--- src/sys/arch/arm/rockchip/rk3588_cru.c:1.1 Tue Aug 23 05:39:06 2022
+++ src/sys/arch/arm/rockchip/rk3588_cru.c Tue Oct 17 19:13:05 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3588_cru.c,v 1.1 2022/08/23 05:39:06 ryo Exp $ */
+/* $NetBSD: rk3588_cru.c,v 1.2 2023/10/17 19:13:05 tnn Exp $ */
/*-
* Copyright (c) 2022 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rk3588_cru.c,v 1.1 2022/08/23 05:39:06 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk3588_cru.c,v 1.2 2023/10/17 19:13:05 tnn Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -636,7 +636,7 @@ static struct rk_cru_clk rk3588_cru_clks
CLKSEL_CON(BIGCORE0, 1), /* div1_reg */
__BITS(4,0), /* div1_mask */
armclk_b01_rates),
- RK_CPU_CORE2(RK3588_ARMCLK_B01, "armclk_b23", mux_armclkb23_parents,
+ RK_CPU_CORE2(RK3588_ARMCLK_B23, "armclk_b23", mux_armclkb23_parents,
CLKSEL_CON(BIGCORE1, 0), /* reg */
__BITS(7,6), 2, 1, /* mux_mask, mux_main, mux_alt */
CLKSEL_CON(BIGCORE1, 0), /* div0_reg */
@@ -673,7 +673,6 @@ static struct rk_cru_clk rk3588_cru_clks
"armclk_b23",
CLKGATE_CON(BIGCORE1, 0), 13),
-
RK_COMPOSITE(RK3588_CLK_50M_SRC, "clk_50m_src",
gpll_cpll_parents,
CLKSEL_CON(0, 0), __BITS(5,5), __BITS(4,0),
