Module Name: src
Committed By: martin
Date: Tue Aug 22 16:19:57 UTC 2023
Modified Files:
src/sys/dev/pci [netbsd-8]: sdhc_pci.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1889):
sys/dev/pci/sdhc_pci.c: revision 1.21
Add quirk setting for some Intel eMMC devices.
On some Intel eMMC controllers, the driver reports "autoconfiguration error:
couldn't enable card: 60" even though they really have eMMC device.
This change fixes the problem on some machines. It might be required more
quirks for newer devices (or HS400 support). At least, this change fixes the
problem on GIGABYTE MA10-ST0.
To generate a diff of this commit:
cvs rdiff -u -r1.14.2.2 -r1.14.2.3 src/sys/dev/pci/sdhc_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/sdhc_pci.c
diff -u src/sys/dev/pci/sdhc_pci.c:1.14.2.2 src/sys/dev/pci/sdhc_pci.c:1.14.2.3
--- src/sys/dev/pci/sdhc_pci.c:1.14.2.2 Wed Jan 18 19:31:43 2023
+++ src/sys/dev/pci/sdhc_pci.c Tue Aug 22 16:19:57 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc_pci.c,v 1.14.2.2 2023/01/18 19:31:43 martin Exp $ */
+/* $NetBSD: sdhc_pci.c,v 1.14.2.3 2023/08/22 16:19:57 martin Exp $ */
/* $OpenBSD: sdhc_pci.c,v 1.7 2007/10/30 18:13:45 chl Exp $ */
/*
@@ -18,7 +18,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc_pci.c,v 1.14.2.2 2023/01/18 19:31:43 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc_pci.c,v 1.14.2.3 2023/08/22 16:19:57 martin Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -155,7 +155,8 @@ static const struct sdhc_pci_quirk {
0xffff,
0xffff,
~0,
- SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
},
{
@@ -166,6 +167,97 @@ static const struct sdhc_pci_quirk {
~0,
SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET
},
+
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_C3K_EMMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_BAYTRAIL_SCC_MMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_BAYTRAIL_SCC_MMC2,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_APL_EMMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_GLK_EMMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_3HS_U_EMMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_495_YU_PCIE_EMMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_CMTLK_EMMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_JSL_EMMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
+ {
+ PCI_VENDOR_INTEL,
+ PCI_PRODUCT_INTEL_EHL_EMMC,
+ 0xffff,
+ 0xffff,
+ ~0,
+ SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET |
+ SDHC_PCI_QUIRK_NO_PWR0
+ },
};
static void sdhc_pci_quirk_ti_hack(struct pci_attach_args *);
