Module Name: src
Committed By: rin
Date: Tue Jul 18 02:50:18 UTC 2023
Modified Files:
src/external/gpl3/gcc/dist/gcc/config/sh: sh.md
Log Message:
gcc: Fix peephole optimization bug for sh3 (PR port-sh3/56311)
Cherry-picked from upstream:
https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=4dbb3af1efe55174a714d15c2994cf2842ef8c28
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101469
Now, the PR confirmed fixed. No regression observed for full ATF run on
landisk (compared with GCC built with this peephole optimization being
removed by hand).
We thank Oleg Endo, the author of the upstream commit.
Also thanks hgutch@ and uwe@ for analysis.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/external/gpl3/gcc/dist/gcc/config/sh/sh.md
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/external/gpl3/gcc/dist/gcc/config/sh/sh.md
diff -u src/external/gpl3/gcc/dist/gcc/config/sh/sh.md:1.2 src/external/gpl3/gcc/dist/gcc/config/sh/sh.md:1.3
--- src/external/gpl3/gcc/dist/gcc/config/sh/sh.md:1.2 Mon Jul 5 10:34:25 2021
+++ src/external/gpl3/gcc/dist/gcc/config/sh/sh.md Tue Jul 18 02:50:18 2023
@@ -10681,6 +10681,45 @@
&& peep2_reg_dead_p (2, operands[1]) && peep2_reg_dead_p (3, operands[0])"
[(const_int 0)]
{
+ if (MEM_P (operands[3]) && reg_overlap_mentioned_p (operands[0], operands[3]))
+ {
+ // Take care when the eliminated operand[0] register is part of
+ // the destination memory address.
+ rtx addr = XEXP (operands[3], 0);
+
+ if (REG_P (addr))
+ operands[3] = replace_equiv_address (operands[3], operands[1]);
+
+ else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0))
+ && CONST_INT_P (XEXP (addr, 1))
+ && REGNO (operands[0]) == REGNO (XEXP (addr, 0)))
+ operands[3] = replace_equiv_address (operands[3],
+ gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1)));
+
+ else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0))
+ && REG_P (XEXP (addr, 1)))
+ {
+ // register + register address @(R0, Rn)
+ // can change only the Rn in the address, not R0.
+ if (REGNO (operands[0]) == REGNO (XEXP (addr, 0))
+ && REGNO (XEXP (addr, 0)) != 0)
+ {
+ operands[3] = replace_equiv_address (operands[3],
+ gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1)));
+ }
+ else if (REGNO (operands[0]) == REGNO (XEXP (addr, 1))
+ && REGNO (XEXP (addr, 1)) != 0)
+ {
+ operands[3] = replace_equiv_address (operands[3],
+ gen_rtx_PLUS (SImode, XEXP (addr, 0), operands[1]));
+ }
+ else
+ FAIL;
+ }
+ else
+ FAIL;
+ }
+
emit_insn (gen_addsi3 (operands[1], operands[1], operands[2]));
sh_peephole_emit_move_insn (operands[3], operands[1]);
})
