Module Name: src
Committed By: riastradh
Date: Wed Mar 1 08:17:53 UTC 2023
Modified Files:
src/sys/arch/arm/arm32: cpuswitch.S
Log Message:
arm32: Optimization: Omit needless membar when triggering softint.
When we are triggering a softint, it can't already hold any mutexes.
So any path to mutex_exit(mtx) must go via mutex_enter(mtx), which is
always done with atomic r/m/w, and we need not issue any explicit
barrier between ci->ci_curlwp = softlwp and a potential load of
mtx->mtx_owner in mutex_exit.
PR kern/57240
XXX pullup-8
XXX pullup-9
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.106 -r1.107 src/sys/arch/arm/arm32/cpuswitch.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/cpuswitch.S
diff -u src/sys/arch/arm/arm32/cpuswitch.S:1.106 src/sys/arch/arm/arm32/cpuswitch.S:1.107
--- src/sys/arch/arm/arm32/cpuswitch.S:1.106 Thu Feb 23 14:55:25 2023
+++ src/sys/arch/arm/arm32/cpuswitch.S Wed Mar 1 08:17:53 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.106 2023/02/23 14:55:25 riastradh Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.107 2023/03/01 08:17:53 riastradh Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -87,7 +87,7 @@
#include <arm/asm.h>
#include <arm/locore.h>
- RCSID("$NetBSD: cpuswitch.S,v 1.106 2023/02/23 14:55:25 riastradh Exp $")
+ RCSID("$NetBSD: cpuswitch.S,v 1.107 2023/03/01 08:17:53 riastradh Exp $")
/* LINTSTUB: include <sys/param.h> */
@@ -417,9 +417,13 @@ ENTRY_NP(softint_switch)
dmb /* for mutex_enter; see cpu_switchto */
#endif
str r5, [r7, #(CI_CURLWP)] /* save new lwp */
-#ifdef _ARM_ARCH_7
- dmb /* for mutex_enter; see cpu_switchto */
-#endif
+ /*
+ * No need for barrier after ci->ci_curlwp = softlwp -- when we
+ * enter a softint lwp, it can't be holding any mutexes, so it
+ * can't release any until after it has acquired them, so we
+ * need not participate in the protocol with mutex_vector_enter
+ * barriers here.
+ */
#ifdef KASAN
mov r0, r5
