Module Name: src
Committed By: martin
Date: Mon Jan 23 12:52:17 UTC 2023
Modified Files:
src/sys/arch/x86/include [netbsd-10]: specialreg.h
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #56):
sys/arch/x86/include/specialreg.h: revision 1.200
sys/arch/x86/include/specialreg.h: revision 1.201
sys/arch/x86/include/specialreg.h: revision 1.199
Use __BIT(). Add comment. Whitespace. No functional change.
Update definitions from the latest Intel SDM.
- Rename HW_FEEDBACK to HWI (Hardware Feedback Interface).
- Add CPUID Fn0000_0006 %eax bit 24 IA32_THERM_INTERRUPT MSR bit 25 Hardware
Feedback Notification support.
- Add CPUID Fn0000_0007 %ecx bit 29 ENQCMD.
- Add CPUID Fn0000_0007 %edx bit 1 SGX-KEYS.
- Add CPUID Fn0000_0007 %edx bit 5 UINTR(User INTeRrupts).
- Add CPUID Fn0000_0007 %edx bit 1 RTM_ALWAYS_ABORT.
- Rename TSX_FORCE_ABORT to RTM_FORCE_ABORT.
- Add CPUID Fn0000_0007 %edx bit 22 AMX_BF16.
- Add CPUID Fn0000_0007 %edx bit 23 AVX512_FP16.
- Add CPUID Fn0000_0007 %edx bit 24 AMX_TILE.
- Add CPUID Fn0000_0007 %edx bit 25 AMX_INT8.
- Add CPUID Fn0000_0007 sub-leaf 1 %edx bit 18 CET_SSS.
- Add CPUID Fn0000_0007 sub-leaf 2 %edx bit 0 PSFD.
- Add CPUID Fn0000_0007 sub-leaf 2 %edx bit 1 IPRED_CTRL.
- Add CPUID Fn0000_0007 sub-leaf 2 %edx bit 2 RRSBA_CTRL.
- Add CPUID Fn0000_0007 sub-leaf 2 %edx bit 3 DDPD_U.
- Add CPUID Fn0000_0007 sub-leaf 2 %edx bit 4 BHI_CTRL.
- Add CPUID Fn0000_0007 sub-leaf 2 %edx bit 5 MCDT_NO.
- Modify comment. Both Intel and AMD support CPUID Fn0000000b.
- Add CPUID Fn0000_000d sub-leaf 1 %eax bit 4 XFD.
- Modify comment. Hybrid Information -> Native Model ID Information.
- Add CPUID Fn0000_001d Tile Information.
- Add CPUID Fn0000_001e TMUL Information.
Fix comment.
To generate a diff of this commit:
cvs rdiff -u -r1.198 -r1.198.2.1 src/sys/arch/x86/include/specialreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
