Module Name:    src
Committed By:   andvar
Date:           Mon Oct 31 20:30:23 UTC 2022

Modified Files:
        src/sys/arch/arm/marvell: dovereg.h kirkwoodreg.h mv78xx0reg.h
        src/sys/arch/mac68k/dev: if_mcreg.h
        src/sys/arch/macppc/dev: am79c950reg.h
        src/sys/arch/news68k/dev: kb_hbreg.h kbcreg.h ms_hbreg.h
        src/sys/arch/vax/vax: subr.S
        src/sys/dev/sbus: spifvar.h

Log Message:
s/interrut/interrupt/ and s/accelelerator/accelerator/ in comments.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/marvell/dovereg.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/marvell/kirkwoodreg.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/marvell/mv78xx0reg.h
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mac68k/dev/if_mcreg.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/macppc/dev/am79c950reg.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/news68k/dev/kb_hbreg.h \
    src/sys/arch/news68k/dev/kbcreg.h src/sys/arch/news68k/dev/ms_hbreg.h
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/vax/vax/subr.S
cvs rdiff -u -r1.4 -r1.5 src/sys/dev/sbus/spifvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/marvell/dovereg.h
diff -u src/sys/arch/arm/marvell/dovereg.h:1.1 src/sys/arch/arm/marvell/dovereg.h:1.2
--- src/sys/arch/arm/marvell/dovereg.h:1.1	Sat Jan  7 16:19:28 2017
+++ src/sys/arch/arm/marvell/dovereg.h	Mon Oct 31 20:30:22 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: dovereg.h,v 1.1 2017/01/07 16:19:28 kiyohara Exp $	*/
+/*	$NetBSD: dovereg.h,v 1.2 2022/10/31 20:30:22 andvar Exp $	*/
 /*
  * Copyright (c) 2016 KIYOHARA Takashi
  * All rights reserved.
@@ -33,7 +33,7 @@
 #define DOVE_UNITID_DDR			MVSOC_UNITID_DDR
 #define DOVE_UNITID_DEVBUS		MVSOC_UNITID_DEVBUS
 #define DOVE_UNITID_DB			0x2	/* Downstream Bridge reg */
-#define DOVE_UNITID_SA			0x3	/* Security Accelelerator reg */
+#define DOVE_UNITID_SA			0x3	/* Security Accelerator reg */
 #define DOVE_UNITID_PEX			MVSOC_UNITID_PEX
 #define DOVE_UNITID_USB			0x5
 #define DOVE_UNITID_XOR			0x6
@@ -233,8 +233,8 @@
 #define DOVE_PMU_CPUCDC0R_XPRATIO(x)		(((x) >> 16) & 0x3f) /* L2C */
 #define DOVE_PMU_CPUCDC0R_BPRATIO(x)		(((x) >> 8) & 0x3f) /* AXI DS */
 #define DOVE_PMU_CPUCDC0R_PPRATIO(x)		(((x) >> 0) & 0x3f) /* CPU */
-#define DOVE_PMU_PMUICR			0x50	/* PMU Interruts Cause reg */
-#define DOVE_PMU_PMUIMR			0x54	/* PMU Interruts Mask reg */
+#define DOVE_PMU_PMUICR			0x50	/* PMU Interrupts Cause reg */
+#define DOVE_PMU_PMUIMR			0x54	/* PMU Interrupts Mask reg */
 #define DOVE_PMU_PMUI_DFSDONE			(1 << 0) /* DFS Done */
 #define DOVE_PMU_PMUI_DVSDONE			(1 << 1) /* DVS Done */
 #define DOVE_PMU_PMUI_THERMCOOLING		(1 << 3) /* Thermal Cooling */

Index: src/sys/arch/arm/marvell/kirkwoodreg.h
diff -u src/sys/arch/arm/marvell/kirkwoodreg.h:1.6 src/sys/arch/arm/marvell/kirkwoodreg.h:1.7
--- src/sys/arch/arm/marvell/kirkwoodreg.h:1.6	Mon Dec 23 02:52:47 2013
+++ src/sys/arch/arm/marvell/kirkwoodreg.h	Mon Oct 31 20:30:22 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: kirkwoodreg.h,v 1.6 2013/12/23 02:52:47 kiyohara Exp $	*/
+/*	$NetBSD: kirkwoodreg.h,v 1.7 2022/10/31 20:30:22 andvar Exp $	*/
 /*
  * Copyright (c) 2007, 2008 KIYOHARA Takashi
  * All rights reserved.
@@ -46,7 +46,7 @@
 #define KIRKWOOD_UNITID_DEVBUS		MVSOC_UNITID_DEVBUS
 #define KIRKWOOD_UNITID_MLMB		MVSOC_UNITID_MLMB
 #define KIRKWOOD_UNITID_CRYPT		0x3	/* Cryptographic Engine reg */
-#define KIRKWOOD_UNITID_SA		0x3	/* Security Accelelerator reg */
+#define KIRKWOOD_UNITID_SA		0x3	/* Security Accelerator reg */
 #define KIRKWOOD_UNITID_PEX		MVSOC_UNITID_PEX
 #define KIRKWOOD_UNITID_USB		0x5	/* USB registers */
 #define KIRKWOOD_UNITID_IDMA		0x6	/* IDMA registers */

Index: src/sys/arch/arm/marvell/mv78xx0reg.h
diff -u src/sys/arch/arm/marvell/mv78xx0reg.h:1.2 src/sys/arch/arm/marvell/mv78xx0reg.h:1.3
--- src/sys/arch/arm/marvell/mv78xx0reg.h:1.2	Mon Sep 30 13:21:10 2013
+++ src/sys/arch/arm/marvell/mv78xx0reg.h	Mon Oct 31 20:30:22 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: mv78xx0reg.h,v 1.2 2013/09/30 13:21:10 kiyohara Exp $	*/
+/*	$NetBSD: mv78xx0reg.h,v 1.3 2022/10/31 20:30:22 andvar Exp $	*/
 /*
  * Copyright (c) 2010 KIYOHARA Takashi
  * All rights reserved.
@@ -48,7 +48,7 @@
 #define MV78XX0_UNITID_GBE01		0x7	/* Gigabit Ethernet registers */
 #define MV78XX0_UNITID_PEX1		0x8
 #define MV78XX0_UNITID_CRYPT		0x9	/* Cryptographic Engine reg */
-#define MV78XX0_UNITID_SA		0x9	/* Security Accelelerator reg */
+#define MV78XX0_UNITID_SA		0x9	/* Security Accelerator reg */
 #define MV78XX0_UNITID_SATA		0xa	/* SATA registers */
 #define MV78XX0_UNITID_TDM		0xb	/* TDM registers */
 

Index: src/sys/arch/mac68k/dev/if_mcreg.h
diff -u src/sys/arch/mac68k/dev/if_mcreg.h:1.4 src/sys/arch/mac68k/dev/if_mcreg.h:1.5
--- src/sys/arch/mac68k/dev/if_mcreg.h:1.4	Sun Dec 11 12:18:02 2005
+++ src/sys/arch/mac68k/dev/if_mcreg.h	Mon Oct 31 20:30:23 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_mcreg.h,v 1.4 2005/12/11 12:18:02 christos Exp $	*/
+/*	$NetBSD: if_mcreg.h,v 1.5 2022/10/31 20:30:23 andvar Exp $	*/
 
 /*-
  * Copyright (c) 1997 David Huang <k...@azeotrope.org>
@@ -116,7 +116,7 @@
 #define	RCVINT		0x02	/* Receive Interrupt */
 #define	XMTINT		0x01	/* Transmit Interrupt */
 
-/* 9: Interrut Mask Register (IMR) */
+/* 9: Interrupt Mask Register (IMR) */
 #define	JABM		0x80	/* Jabber Error Mask */
 #define	BABLM		0x40	/* Babble Error Mask */
 #define	CERRM		0x20	/* Collision Error Mask */

Index: src/sys/arch/macppc/dev/am79c950reg.h
diff -u src/sys/arch/macppc/dev/am79c950reg.h:1.1 src/sys/arch/macppc/dev/am79c950reg.h:1.2
--- src/sys/arch/macppc/dev/am79c950reg.h:1.1	Fri May 15 10:15:47 1998
+++ src/sys/arch/macppc/dev/am79c950reg.h	Mon Oct 31 20:30:23 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: am79c950reg.h,v 1.1 1998/05/15 10:15:47 tsubai Exp $	*/
+/*	$NetBSD: am79c950reg.h,v 1.2 2022/10/31 20:30:23 andvar Exp $	*/
 
 /*-
  * Copyright (c) 1997 David Huang <k...@bga.com>
@@ -116,7 +116,7 @@
 #define	RCVINT		0x02	/* Receive Interrupt */
 #define	XMTINT		0x01	/* Transmit Interrupt */
 
-/* 9: Interrut Mask Register (IMR) */
+/* 9: Interrupt Mask Register (IMR) */
 #define	JABM		0x80	/* Jabber Error Mask */
 #define	BABLM		0x40	/* Babble Error Mask */
 #define	CERRM		0x20	/* Collision Error Mask */

Index: src/sys/arch/news68k/dev/kb_hbreg.h
diff -u src/sys/arch/news68k/dev/kb_hbreg.h:1.2 src/sys/arch/news68k/dev/kb_hbreg.h:1.3
--- src/sys/arch/news68k/dev/kb_hbreg.h:1.2	Wed May 14 13:29:28 2008
+++ src/sys/arch/news68k/dev/kb_hbreg.h	Mon Oct 31 20:30:23 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: kb_hbreg.h,v 1.2 2008/05/14 13:29:28 tsutsui Exp $	*/
+/*	$NetBSD: kb_hbreg.h,v 1.3 2022/10/31 20:30:23 andvar Exp $	*/
 
 /*-
  * Copyright (c) 2001 Izumi Tsutsui.  All rights reserved.
@@ -37,6 +37,6 @@
 #define KB_INTE			0x01	/* interrupt enable */
 
 /* status port definitions */
-#define KBSTAT_INT		0x08	/* keyboard interrut flag */
+#define KBSTAT_INT		0x08	/* keyboard interrupt flag */
 #define KBSTAT_BUF		0x20	/* keyboard buffer full */
 #define KBSTAT_RDY		0x80	/* keyboard Rx data ready */
Index: src/sys/arch/news68k/dev/kbcreg.h
diff -u src/sys/arch/news68k/dev/kbcreg.h:1.2 src/sys/arch/news68k/dev/kbcreg.h:1.3
--- src/sys/arch/news68k/dev/kbcreg.h:1.2	Wed May 14 13:29:28 2008
+++ src/sys/arch/news68k/dev/kbcreg.h	Mon Oct 31 20:30:23 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: kbcreg.h,v 1.2 2008/05/14 13:29:28 tsutsui Exp $	*/
+/*	$NetBSD: kbcreg.h,v 1.3 2022/10/31 20:30:23 andvar Exp $	*/
 
 /*-
  * Copyright (c) 2001 Izumi Tsutsui.  All rights reserved.
@@ -40,7 +40,7 @@
 
 /* status port definitions */
 #define KBCSTAT_MSINT		0x04	/* mouse interrupt flag */
-#define KBCSTAT_KBINT		0x08	/* keyboard interrut flag */
+#define KBCSTAT_KBINT		0x08	/* keyboard interrupt flag */
 #define KBCSTAT_MSBUF		0x10	/* mouse buffer full */
 #define KBCSTAT_KBBUF		0x20	/* keyboard buffer full */
 #define KBCSTAT_MSRDY		0x40	/* mouse Rx data ready */
Index: src/sys/arch/news68k/dev/ms_hbreg.h
diff -u src/sys/arch/news68k/dev/ms_hbreg.h:1.2 src/sys/arch/news68k/dev/ms_hbreg.h:1.3
--- src/sys/arch/news68k/dev/ms_hbreg.h:1.2	Wed May 14 13:29:28 2008
+++ src/sys/arch/news68k/dev/ms_hbreg.h	Mon Oct 31 20:30:23 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: ms_hbreg.h,v 1.2 2008/05/14 13:29:28 tsutsui Exp $	*/
+/*	$NetBSD: ms_hbreg.h,v 1.3 2022/10/31 20:30:23 andvar Exp $	*/
 
 /*-
  * Copyright (c) 2001 Izumi Tsutsui.  All rights reserved.
@@ -35,6 +35,6 @@
 #define MS_INTE			0x01	/* interrupt enable */
 
 /* status port definitions */
-#define MSSTAT_INT		0x04	/* mouse interrut flag */
+#define MSSTAT_INT		0x04	/* mouse interrupt flag */
 #define MSSTAT_BUF		0x10	/* mouse buffer full */
 #define MSSTAT_RDY		0x40	/* mouse Rx data ready */

Index: src/sys/arch/vax/vax/subr.S
diff -u src/sys/arch/vax/vax/subr.S:1.40 src/sys/arch/vax/vax/subr.S:1.41
--- src/sys/arch/vax/vax/subr.S:1.40	Sun Dec  5 03:01:59 2021
+++ src/sys/arch/vax/vax/subr.S	Mon Oct 31 20:30:23 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: subr.S,v 1.40 2021/12/05 03:01:59 msaitoh Exp $	   */
+/*	$NetBSD: subr.S,v 1.41 2022/10/31 20:30:23 andvar Exp $	   */
 
 /*
  * Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@@ -225,7 +225,7 @@ _C_LABEL(cmn_idsptch):
 	calls	$0,_C_LABEL(krnunlock)
 #endif
 	popr	$0x3f		# pop registers
-	rei			# return from interrut
+	rei			# return from interrupt
 #if 0
 2:	.asciz	"intr %p(%p)\n"
 #endif

Index: src/sys/dev/sbus/spifvar.h
diff -u src/sys/dev/sbus/spifvar.h:1.4 src/sys/dev/sbus/spifvar.h:1.5
--- src/sys/dev/sbus/spifvar.h:1.4	Mon Jul 18 00:58:52 2011
+++ src/sys/dev/sbus/spifvar.h	Mon Oct 31 20:30:23 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: spifvar.h,v 1.4 2011/07/18 00:58:52 mrg Exp $	*/
+/*	$NetBSD: spifvar.h,v 1.5 2022/10/31 20:30:23 andvar Exp $	*/
 /*	$OpenBSD: spifvar.h,v 1.3 2003/06/02 18:32:41 jason Exp $	*/
 
 /*
@@ -65,7 +65,7 @@ struct sbpp_softc {
 struct spif_softc {
 	device_t sc_dev;
 	void *sc_stcih;			/* stc interrupt vector */
-	void *sc_ppcih;			/* ppc interrut vector */
+	void *sc_ppcih;			/* ppc interrupt vector */
 	void *sc_softih;		/* soft interrupt vector */
 	int	sc_rev;			/* revision level */
 	int	sc_osc;			/* oscillator speed (hz) */

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