Module Name: src
Committed By: jmcneill
Date: Sat Oct 15 11:07:39 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space.c db_interface.c locore.S
pmap.c
src/sys/arch/aarch64/conf: files.aarch64
src/sys/arch/aarch64/include: pmap.h
src/sys/arch/arm/acpi: acpi_machdep.c acpi_pci_graviton.c
acpi_pci_layerscape_gen4.c acpi_pci_n1sdp.c acpipchb.c
src/sys/arch/arm/apple: apple_platform.c
src/sys/arch/arm/broadcom: bcm2838_pcie.c
src/sys/arch/arm/fdt: pcihost_fdt.c
src/sys/arch/arm/include: bus_defs.h
src/sys/arch/arm/nvidia: tegra_pcie.c
src/sys/arch/arm/rockchip: rk3399_pcie.c
src/sys/arch/evbarm/fdt: fdt_bus_machdep.c
Log Message:
Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings
Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/aarch64/bus_space.c
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/aarch64/aarch64/db_interface.c
cvs rdiff -u -r1.87 -r1.88 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.139 -r1.140 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/aarch64/conf/files.aarch64
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/aarch64/include/pmap.h
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/acpi/acpi_machdep.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/acpi/acpi_pci_graviton.c \
src/sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/acpi/acpi_pci_n1sdp.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/acpi/acpipchb.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/apple/apple_platform.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/broadcom/bcm2838_pcie.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/fdt/pcihost_fdt.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/include/bus_defs.h
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/arm/nvidia/tegra_pcie.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/rockchip/rk3399_pcie.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbarm/fdt/fdt_bus_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space.c
diff -u src/sys/arch/aarch64/aarch64/bus_space.c:1.16 src/sys/arch/aarch64/aarch64/bus_space.c:1.17
--- src/sys/arch/aarch64/aarch64/bus_space.c:1.16 Wed Apr 14 05:43:09 2021
+++ src/sys/arch/aarch64/aarch64/bus_space.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.16 2021/04/14 05:43:09 ryo Exp $ */
+/* $NetBSD: bus_space.c,v 1.17 2022/10/15 11:07:38 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.16 2021/04/14 05:43:09 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.17 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -568,8 +568,8 @@ generic_bs_map(void *t, bus_addr_t bpa,
pmapflags = PMAP_WRITE_COMBINE;
else if ((flag & BUS_SPACE_MAP_CACHEABLE) != 0)
pmapflags = PMAP_WRITE_BACK;
- else if ((flag & _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED) != 0)
- pmapflags = PMAP_DEV_SO;
+ else if ((flag & BUS_SPACE_MAP_NONPOSTED) != 0)
+ pmapflags = PMAP_DEV_NP;
else
pmapflags = PMAP_DEV;
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.19 src/sys/arch/aarch64/aarch64/db_interface.c:1.20
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.19 Mon Sep 19 17:23:14 2022
+++ src/sys/arch/aarch64/aarch64/db_interface.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.19 2022/09/19 17:23:14 ryo Exp $ */
+/* $NetBSD: db_interface.c,v 1.20 2022/10/15 11:07:38 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.19 2022/09/19 17:23:14 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.20 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/types.h>
@@ -431,8 +431,8 @@ db_pte_print(pt_entry_t pte, int level,
case LX_BLKPAG_ATTR_DEVICE_MEM:
pr(", DEV");
break;
- case LX_BLKPAG_ATTR_DEVICE_MEM_SO:
- pr(", DEV(SO)");
+ case LX_BLKPAG_ATTR_DEVICE_MEM_NP:
+ pr(", DEV(NP)");
break;
default:
pr(", ATTR(%lu)", __SHIFTOUT(pte, LX_BLKPAG_ATTR_INDX));
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.87 src/sys/arch/aarch64/aarch64/locore.S:1.88
--- src/sys/arch/aarch64/aarch64/locore.S:1.87 Tue Aug 23 05:31:12 2022
+++ src/sys/arch/aarch64/aarch64/locore.S Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.87 2022/08/23 05:31:12 ryo Exp $ */
+/* $NetBSD: locore.S,v 1.88 2022/10/15 11:07:38 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -38,14 +38,14 @@
#include <aarch64/hypervisor.h>
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.87 2022/08/23 05:31:12 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.88 2022/10/15 11:07:38 jmcneill Exp $")
-#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
+#ifdef AARCH64_DEVICE_MEM_NONPOSTED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
#else
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRE
#endif
-#define MAIR_DEVICE_MEM_SO MAIR_DEVICE_nGnRnE
+#define MAIR_DEVICE_MEM_NP MAIR_DEVICE_nGnRnE
/*#define DEBUG_LOCORE // debug print */
/*#define DEBUG_LOCORE_PRINT_LOCK // avoid mixing AP's output */
@@ -952,7 +952,7 @@ mair_setting:
__SHIFTIN(MAIR_NORMAL_NC, MAIR_ATTR1) | \
__SHIFTIN(MAIR_NORMAL_WT, MAIR_ATTR2) | \
__SHIFTIN(MAIR_DEVICE_MEM, MAIR_ATTR3) | \
- __SHIFTIN(MAIR_DEVICE_MEM_SO, MAIR_ATTR4))
+ __SHIFTIN(MAIR_DEVICE_MEM_NP, MAIR_ATTR4))
#define VIRT_BIT 48
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.139 src/sys/arch/aarch64/aarch64/pmap.c:1.140
--- src/sys/arch/aarch64/aarch64/pmap.c:1.139 Fri Aug 19 08:17:32 2022
+++ src/sys/arch/aarch64/aarch64/pmap.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.139 2022/08/19 08:17:32 ryo Exp $ */
+/* $NetBSD: pmap.c,v 1.140 2022/10/15 11:07:38 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.139 2022/08/19 08:17:32 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.140 2022/10/15 11:07:38 jmcneill Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -882,7 +882,7 @@ pmap_extract_coherency(struct pmap *pm,
switch (pte & LX_BLKPAG_ATTR_MASK) {
case LX_BLKPAG_ATTR_NORMAL_NC:
case LX_BLKPAG_ATTR_DEVICE_MEM:
- case LX_BLKPAG_ATTR_DEVICE_MEM_SO:
+ case LX_BLKPAG_ATTR_DEVICE_MEM_NP:
coherency = true;
break;
}
@@ -1116,8 +1116,8 @@ _pmap_pte_adjust_cacheflags(pt_entry_t p
pte &= ~LX_BLKPAG_ATTR_MASK;
switch (flags & (PMAP_CACHE_MASK|PMAP_DEV_MASK)) {
- case PMAP_DEV_SO ... PMAP_DEV_SO | PMAP_CACHE_MASK:
- pte |= LX_BLKPAG_ATTR_DEVICE_MEM_SO; /* Device-nGnRnE */
+ case PMAP_DEV_NP ... PMAP_DEV_NP | PMAP_CACHE_MASK:
+ pte |= LX_BLKPAG_ATTR_DEVICE_MEM_NP; /* Device-nGnRnE */
break;
case PMAP_DEV ... PMAP_DEV | PMAP_CACHE_MASK:
pte |= LX_BLKPAG_ATTR_DEVICE_MEM; /* Device-nGnRE */
Index: src/sys/arch/aarch64/conf/files.aarch64
diff -u src/sys/arch/aarch64/conf/files.aarch64:1.38 src/sys/arch/aarch64/conf/files.aarch64:1.39
--- src/sys/arch/aarch64/conf/files.aarch64:1.38 Sat Jun 25 13:24:34 2022
+++ src/sys/arch/aarch64/conf/files.aarch64 Sat Oct 15 11:07:38 2022
@@ -1,10 +1,10 @@
-# $NetBSD: files.aarch64,v 1.38 2022/06/25 13:24:34 jmcneill Exp $
+# $NetBSD: files.aarch64,v 1.39 2022/10/15 11:07:38 jmcneill Exp $
defflag opt_cpuoptions.h AARCH64_ALIGNMENT_CHECK
defflag opt_cpuoptions.h AARCH64_EL0_STACK_ALIGNMENT_CHECK
defflag opt_cpuoptions.h AARCH64_EL1_STACK_ALIGNMENT_CHECK
defflag opt_cpuoptions.h AARCH64_HAVE_L2CTLR
-defflag opt_cpuoptions.h AARCH64_DEVICE_MEM_STRONGLY_ORDERED
+defflag opt_cpuoptions.h AARCH64_DEVICE_MEM_NONPOSTED
defflag opt_cpuoptions.h ARMV81_HAFDBS
defflag opt_cputypes.h CPU_ARMV8
Index: src/sys/arch/aarch64/include/pmap.h
diff -u src/sys/arch/aarch64/include/pmap.h:1.52 src/sys/arch/aarch64/include/pmap.h:1.53
--- src/sys/arch/aarch64/include/pmap.h:1.52 Sat Apr 2 11:16:06 2022
+++ src/sys/arch/aarch64/include/pmap.h Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.52 2022/04/02 11:16:06 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.53 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -188,7 +188,7 @@ struct vm_page_md {
#define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX)
#define LX_BLKPAG_ATTR_NORMAL_WT __SHIFTIN(2, LX_BLKPAG_ATTR_INDX)
#define LX_BLKPAG_ATTR_DEVICE_MEM __SHIFTIN(3, LX_BLKPAG_ATTR_INDX)
-#define LX_BLKPAG_ATTR_DEVICE_MEM_SO __SHIFTIN(4, LX_BLKPAG_ATTR_INDX)
+#define LX_BLKPAG_ATTR_DEVICE_MEM_NP __SHIFTIN(4, LX_BLKPAG_ATTR_INDX)
#define LX_BLKPAG_ATTR_MASK LX_BLKPAG_ATTR_INDX
#define lxpde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA))
@@ -341,8 +341,8 @@ paddr_t pmap_devmap_vtophys(paddr_t);
#define PMAP_PTE 0x10000000 /* kenter_pa */
#define PMAP_DEV 0x20000000 /* kenter_pa */
-#define PMAP_DEV_SO 0x40000000 /* kenter_pa */
-#define PMAP_DEV_MASK (PMAP_DEV | PMAP_DEV_SO)
+#define PMAP_DEV_NP 0x40000000 /* kenter_pa */
+#define PMAP_DEV_MASK (PMAP_DEV | PMAP_DEV_NP)
static inline u_int
aarch64_mmap_flags(paddr_t mdpgno)
Index: src/sys/arch/arm/acpi/acpi_machdep.c
diff -u src/sys/arch/arm/acpi/acpi_machdep.c:1.25 src/sys/arch/arm/acpi/acpi_machdep.c:1.26
--- src/sys/arch/arm/acpi/acpi_machdep.c:1.25 Sun Aug 8 10:28:26 2021
+++ src/sys/arch/arm/acpi/acpi_machdep.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_machdep.c,v 1.25 2021/08/08 10:28:26 jmcneill Exp $ */
+/* $NetBSD: acpi_machdep.c,v 1.26 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#include "pci.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.25 2021/08/08 10:28:26 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.26 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -463,7 +463,7 @@ acpi_md_mcfg_bs_map(void *t, bus_addr_t
bus_space_handle_t *bshp)
{
return arm_generic_bs_tag.bs_map(t, bpa, size,
- flag | _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, bshp);
+ flag | BUS_SPACE_MAP_NONPOSTED, bshp);
}
#endif
Index: src/sys/arch/arm/acpi/acpi_pci_graviton.c
diff -u src/sys/arch/arm/acpi/acpi_pci_graviton.c:1.4 src/sys/arch/arm/acpi/acpi_pci_graviton.c:1.5
--- src/sys/arch/arm/acpi/acpi_pci_graviton.c:1.4 Sat Oct 24 07:08:22 2020
+++ src/sys/arch/arm/acpi/acpi_pci_graviton.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_graviton.c,v 1.4 2020/10/24 07:08:22 skrll Exp $ */
+/* $NetBSD: acpi_pci_graviton.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2018, 2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_graviton.c,v 1.4 2020/10/24 07:08:22 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_graviton.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -121,7 +121,7 @@ acpi_pci_graviton_map(ACPI_HANDLE handle
}
error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length,
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &ap->ap_conf_bsh);
+ BUS_SPACE_MAP_NONPOSTED, &ap->ap_conf_bsh);
if (error != 0)
return AE_NO_MEMORY;
Index: src/sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c
diff -u src/sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c:1.4 src/sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c:1.5
--- src/sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c:1.4 Wed Jun 17 06:45:09 2020
+++ src/sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_layerscape_gen4.c,v 1.4 2020/06/17 06:45:09 thorpej Exp $ */
+/* $NetBSD: acpi_pci_layerscape_gen4.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_layerscape_gen4.c,v 1.4 2020/06/17 06:45:09 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_layerscape_gen4.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -272,7 +272,7 @@ acpi_pci_layerscape_gen4_map(ACPI_HANDLE
}
error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length,
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &bsh);
+ BUS_SPACE_MAP_NONPOSTED, &bsh);
if (error != 0)
return AE_NO_MEMORY;
@@ -282,7 +282,7 @@ acpi_pci_layerscape_gen4_map(ACPI_HANDLE
mutex_init(&pcie->lock, MUTEX_DEFAULT, IPL_HIGH);
error = bus_space_map(ap->ap_bst, win_base, PCI_EXTCONF_SIZE,
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &pcie->win_bsh);
+ BUS_SPACE_MAP_NONPOSTED, &pcie->win_bsh);
if (error != 0)
return AE_NO_MEMORY;
Index: src/sys/arch/arm/acpi/acpi_pci_n1sdp.c
diff -u src/sys/arch/arm/acpi/acpi_pci_n1sdp.c:1.6 src/sys/arch/arm/acpi/acpi_pci_n1sdp.c:1.7
--- src/sys/arch/arm/acpi/acpi_pci_n1sdp.c:1.6 Sat Oct 24 07:08:22 2020
+++ src/sys/arch/arm/acpi/acpi_pci_n1sdp.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_n1sdp.c,v 1.6 2020/10/24 07:08:22 skrll Exp $ */
+/* $NetBSD: acpi_pci_n1sdp.c,v 1.7 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_n1sdp.c,v 1.6 2020/10/24 07:08:22 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_n1sdp.c,v 1.7 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -166,7 +166,7 @@ acpi_pci_n1sdp_init(struct acpi_pci_cont
panic("acpi_pci_n1sdp_init: couldn't get PCIe discovery table VA");
error = bus_space_map(bst, n1sdp_data[ap->ap_seg]->rc_base_addr, PCI_EXTCONF_SIZE,
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &ap->ap_conf_bsh);
+ BUS_SPACE_MAP_NONPOSTED, &ap->ap_conf_bsh);
if (error != 0)
panic("acpi_pci_n1sdp_init: couldn't map segment %d", ap->ap_seg);
Index: src/sys/arch/arm/acpi/acpipchb.c
diff -u src/sys/arch/arm/acpi/acpipchb.c:1.31 src/sys/arch/arm/acpi/acpipchb.c:1.32
--- src/sys/arch/arm/acpi/acpipchb.c:1.31 Fri Oct 14 22:10:15 2022
+++ src/sys/arch/arm/acpi/acpipchb.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: acpipchb.c,v 1.31 2022/10/14 22:10:15 jmcneill Exp $ */
+/* $NetBSD: acpipchb.c,v 1.32 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.31 2022/10/14 22:10:15 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.32 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -225,7 +225,7 @@ acpipchb_bus_space_map(void *t, bus_addr
if ((abs->flags & PCI_FLAGS_IO_OKAY) != 0) {
/* Force strongly ordered mapping for all I/O space */
- flag = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
+ flag = BUS_SPACE_MAP_NONPOSTED;
}
for (i = 0; i < abs->nrange; i++) {
Index: src/sys/arch/arm/apple/apple_platform.c
diff -u src/sys/arch/arm/apple/apple_platform.c:1.4 src/sys/arch/arm/apple/apple_platform.c:1.5
--- src/sys/arch/arm/apple/apple_platform.c:1.4 Mon Sep 13 23:30:52 2021
+++ src/sys/arch/arm/apple/apple_platform.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: apple_platform.c,v 1.4 2021/09/13 23:30:52 jmcneill Exp $ */
+/* $NetBSD: apple_platform.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2021 Jared McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: apple_platform.c,v 1.4 2021/09/13 23:30:52 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: apple_platform.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -77,7 +77,7 @@ apple_nonposted_bs_map(void *t, bus_addr
bus_space_handle_t *bshp)
{
if (flag == 0) {
- flag |= _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
+ flag |= BUS_SPACE_MAP_NONPOSTED;
}
return bus_space_map(&arm_generic_bs_tag, bpa, size, flag, bshp);
@@ -126,7 +126,7 @@ apple_platform_devmap(void)
devmap[devmap_index].pd_va = DEVMAP_ALIGN(devmap_va);
devmap[devmap_index].pd_size = DEVMAP_SIZE(L3_SIZE);
devmap[devmap_index].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
- devmap[devmap_index].pd_flags = PMAP_DEV_SO;
+ devmap[devmap_index].pd_flags = PMAP_DEV_NP;
devmap_va = DEVMAP_SIZE(devmap[devmap_index].pd_va +
devmap[devmap_index].pd_size);
devmap_index++;
Index: src/sys/arch/arm/broadcom/bcm2838_pcie.c
diff -u src/sys/arch/arm/broadcom/bcm2838_pcie.c:1.5 src/sys/arch/arm/broadcom/bcm2838_pcie.c:1.6
--- src/sys/arch/arm/broadcom/bcm2838_pcie.c:1.5 Sat Aug 7 16:18:43 2021
+++ src/sys/arch/arm/broadcom/bcm2838_pcie.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2838_pcie.c,v 1.5 2021/08/07 16:18:43 thorpej Exp $ */
+/* $NetBSD: bcm2838_pcie.c,v 1.6 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2838_pcie.c,v 1.5 2021/08/07 16:18:43 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2838_pcie.c,v 1.6 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -855,7 +855,7 @@ bcmstb_bus_space_map(void *t, bus_addr_t
// if ((bs->flags & PCI_FLAGS_IO_OKAY) != 0) {
/* Force strongly ordered mapping for all I/O space */
- flag = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
+ flag = BUS_SPACE_MAP_NONPOSTED;
// }
for (size_t i = 0; i < bs->nranges; i++) {
Index: src/sys/arch/arm/fdt/pcihost_fdt.c
diff -u src/sys/arch/arm/fdt/pcihost_fdt.c:1.31 src/sys/arch/arm/fdt/pcihost_fdt.c:1.32
--- src/sys/arch/arm/fdt/pcihost_fdt.c:1.31 Tue Sep 6 11:55:07 2022
+++ src/sys/arch/arm/fdt/pcihost_fdt.c Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pcihost_fdt.c,v 1.31 2022/09/06 11:55:07 skrll Exp $ */
+/* $NetBSD: pcihost_fdt.c,v 1.32 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pcihost_fdt.c,v 1.31 2022/09/06 11:55:07 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pcihost_fdt.c,v 1.32 2022/10/15 11:07:38 jmcneill Exp $");
#include <sys/param.h>
@@ -135,7 +135,7 @@ pcihost_attach(device_t parent, device_t
sc->sc_pci_bst = faa->faa_bst;
sc->sc_phandle = faa->faa_phandle;
error = bus_space_map(sc->sc_bst, cs_addr, cs_size,
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &sc->sc_bsh);
+ BUS_SPACE_MAP_NONPOSTED, &sc->sc_bsh);
if (error) {
aprint_error(": couldn't map registers: %d\n", error);
return;
@@ -668,7 +668,7 @@ pcihost_bus_space_map(void *t, bus_addr_
if ((pbs->flags & PCI_FLAGS_IO_OKAY) != 0) {
/* Force strongly ordered mapping for all I/O space */
- flag = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
+ flag = BUS_SPACE_MAP_NONPOSTED;
}
for (size_t i = 0; i < pbs->nranges; i++) {
Index: src/sys/arch/arm/include/bus_defs.h
diff -u src/sys/arch/arm/include/bus_defs.h:1.18 src/sys/arch/arm/include/bus_defs.h:1.19
--- src/sys/arch/arm/include/bus_defs.h:1.18 Sat Jan 22 15:10:30 2022
+++ src/sys/arch/arm/include/bus_defs.h Sat Oct 15 11:07:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_defs.h,v 1.18 2022/01/22 15:10:30 skrll Exp $ */
+/* $NetBSD: bus_defs.h,v 1.19 2022/10/15 11:07:38 jmcneill Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -103,7 +103,7 @@ typedef u_long bus_space_handle_t;
#define BUS_SPACE_MAP_BUS3 0x0400
#define BUS_SPACE_MAP_BUS4 0x0800
-#define _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED BUS_SPACE_MAP_BUS1
+#define BUS_SPACE_MAP_NONPOSTED BUS_SPACE_MAP_BUS1
struct bus_space {
/* cookie */
Index: src/sys/arch/arm/nvidia/tegra_pcie.c
diff -u src/sys/arch/arm/nvidia/tegra_pcie.c:1.39 src/sys/arch/arm/nvidia/tegra_pcie.c:1.40
--- src/sys/arch/arm/nvidia/tegra_pcie.c:1.39 Sat Aug 7 16:18:44 2021
+++ src/sys/arch/arm/nvidia/tegra_pcie.c Sat Oct 15 11:07:39 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_pcie.c,v 1.39 2021/08/07 16:18:44 thorpej Exp $ */
+/* $NetBSD: tegra_pcie.c,v 1.40 2022/10/15 11:07:39 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_pcie.c,v 1.39 2021/08/07 16:18:44 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_pcie.c,v 1.40 2022/10/15 11:07:39 jmcneill Exp $");
#include <sys/param.h>
@@ -198,7 +198,7 @@ tegra_pcie_attach(device_t parent, devic
return;
}
error = bus_space_map(sc->sc_bst, cs_addr, cs_size,
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &sc->sc_bsh_rpconf);
+ BUS_SPACE_MAP_NONPOSTED, &sc->sc_bsh_rpconf);
if (error) {
aprint_error(": couldn't map cs registers: %d\n", error);
return;
@@ -577,7 +577,7 @@ tegra_pcie_conf_frag_map(struct tegra_pc
a = TEGRA_PCIE_EXTC_BASE + (bus << 16) + (frg << 24);
if (bus_space_map(sc->sc_bst, a, 1 << 16,
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED,
+ BUS_SPACE_MAP_NONPOSTED,
&sc->sc_bsh_extc[bus-1][frg]) != 0)
device_printf(sc->sc_dev, "couldn't map PCIE "
"configuration for bus %u fragment %#x", bus, frg);
Index: src/sys/arch/arm/rockchip/rk3399_pcie.c
diff -u src/sys/arch/arm/rockchip/rk3399_pcie.c:1.18 src/sys/arch/arm/rockchip/rk3399_pcie.c:1.19
--- src/sys/arch/arm/rockchip/rk3399_pcie.c:1.18 Sat Oct 2 20:41:47 2021
+++ src/sys/arch/arm/rockchip/rk3399_pcie.c Sat Oct 15 11:07:39 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_pcie.c,v 1.18 2021/10/02 20:41:47 mrg Exp $ */
+/* $NetBSD: rk3399_pcie.c,v 1.19 2022/10/15 11:07:39 jmcneill Exp $ */
/*
* Copyright (c) 2018 Mark Kettenis <kette...@openbsd.org>
*
@@ -17,7 +17,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.18 2021/10/02 20:41:47 mrg Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.19 2022/10/15 11:07:39 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -231,7 +231,7 @@ rkpcie_attach(device_t parent, device_t
return;
}
- const int mapflags = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
+ const int mapflags = BUS_SPACE_MAP_NONPOSTED;
if (bus_space_map(sc->sc_iot, sc->sc_apb_addr, sc->sc_apb_size, mapflags, &sc->sc_ioh) != 0 ||
bus_space_map(sc->sc_iot, sc->sc_axi_addr, sc->sc_axi_size, mapflags, &sc->sc_axi_ioh) != 0) {
printf(": can't map registers\n");
Index: src/sys/arch/evbarm/fdt/fdt_bus_machdep.c
diff -u src/sys/arch/evbarm/fdt/fdt_bus_machdep.c:1.1 src/sys/arch/evbarm/fdt/fdt_bus_machdep.c:1.2
--- src/sys/arch/evbarm/fdt/fdt_bus_machdep.c:1.1 Mon Sep 6 14:03:18 2021
+++ src/sys/arch/evbarm/fdt/fdt_bus_machdep.c Sat Oct 15 11:07:39 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: fdt_bus_machdep.c,v 1.1 2021/09/06 14:03:18 jmcneill Exp $ */
+/* $NetBSD: fdt_bus_machdep.c,v 1.2 2022/10/15 11:07:39 jmcneill Exp $ */
/*-
* Copyright (c) 2021 Jared McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fdt_bus_machdep.c,v 1.1 2021/09/06 14:03:18 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fdt_bus_machdep.c,v 1.2 2022/10/15 11:07:39 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -43,7 +43,7 @@ nonposted_mmio_bs_map(void *t, bus_addr_
bus_space_handle_t *bshp)
{
if (flag == 0) {
- flag |= _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
+ flag |= BUS_SPACE_MAP_NONPOSTED;
}
return bus_space_map(&arm_generic_bs_tag, bpa, size, flag, bshp);
