Module Name: src Committed By: simonb Date: Sat Oct 15 06:48:31 UTC 2022
Modified Files:
src/sys/arch/riscv/include: sysreg.h
Log Message:
Add SATP modes for bare, SV57 and SV64.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/riscv/include/sysreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
