Module Name: src
Committed By: bouyer
Date: Sun Oct 2 10:37:13 UTC 2022
Modified Files:
src/sys/arch/arm/sunxi [bouyer-sunxi-drm]: files.sunxi sun4i_a10_ccu.c
sunxi_debe.c sunxi_drm.c sunxi_drm.h sunxi_hdmi.c sunxi_lcdc.c
Log Message:
Patch from Robert Swindells: start converting the A20 console driver to
drm2.
It builds but panics at boot because of missing helper functions for
debe.
To generate a diff of this commit:
cvs rdiff -u -r1.72 -r1.72.2.1 src/sys/arch/arm/sunxi/files.sunxi
cvs rdiff -u -r1.16 -r1.16.16.1 src/sys/arch/arm/sunxi/sun4i_a10_ccu.c
cvs rdiff -u -r1.16 -r1.16.2.1 src/sys/arch/arm/sunxi/sunxi_debe.c
cvs rdiff -u -r1.26 -r1.26.2.1 src/sys/arch/arm/sunxi/sunxi_drm.c
cvs rdiff -u -r1.3 -r1.3.2.1 src/sys/arch/arm/sunxi/sunxi_drm.h
cvs rdiff -u -r1.14 -r1.14.16.1 src/sys/arch/arm/sunxi/sunxi_hdmi.c
cvs rdiff -u -r1.15 -r1.15.2.1 src/sys/arch/arm/sunxi/sunxi_lcdc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/files.sunxi
diff -u src/sys/arch/arm/sunxi/files.sunxi:1.72 src/sys/arch/arm/sunxi/files.sunxi:1.72.2.1
--- src/sys/arch/arm/sunxi/files.sunxi:1.72 Wed Jul 20 10:01:11 2022
+++ src/sys/arch/arm/sunxi/files.sunxi Sun Oct 2 10:37:12 2022
@@ -1,4 +1,4 @@
-# $NetBSD: files.sunxi,v 1.72 2022/07/20 10:01:11 riastradh Exp $
+# $NetBSD: files.sunxi,v 1.72.2.1 2022/10/02 10:37:12 bouyer Exp $
#
# Configuration info for Allwinner sunxi family SoCs
#
@@ -256,26 +256,27 @@ attach sunxii2s at fdt with sunxi_i2s
file arch/arm/sunxi/sunxi_i2s.c sunxi_i2s
# A10/A20 LCD/TV timing controller (TCON)
-device sunxitcon
+device sunxitcon: drmkms
attach sunxitcon at fdt with sunxi_tcon
file arch/arm/sunxi/sunxi_tcon.c sunxi_tcon needs-flag
+makeoptions sunxi_tcon "CPPFLAGS.sunxi_tcon"+="${CPPFLAGS.drmkms}"
# A10/A20 Display engine backend (DE-BE)
-device sunxidebe { }
+device sunxidebe: drmkms
attach sunxidebe at fdt with sunxi_debe
file arch/arm/sunxi/sunxi_debe.c sunxi_debe needs-flag
-
-attach genfb at sunxidebe with sunxi_befb
+makeoptions sunxi_debe "CPPFLAGS.sunxi_debe"+="${CPPFLAGS.drmkms}"
# A10/A20 HDMI
-device sunxihdmi: edid, videomode
+device sunxihdmi: edid, videomode, drmkms, drmkms_i2c, ddc_read_edid
attach sunxihdmi at fdt with sunxi_hdmi
file arch/arm/sunxi/sunxi_hdmi.c sunxi_hdmi needs-flag
+makeoptions sunxi_hdmi "CPPFLAGS.sunxi_hdmi"+="${CPPFLAGS.drmkms}"
# A10/A20 display engine pipeline
-device sunxidep
-attach sunxidep at fdt with sunxi_dep
-file arch/arm/sunxi/sunxi_dep.c sunxi_dep
+#device sunxidep
+#attach sunxidep at fdt with sunxi_dep
+#file arch/arm/sunxi/sunxi_dep.c sunxi_dep
# Touch Screen controller
device sunxits: wsmousedev, tpcalib, sysmon_envsys
Index: src/sys/arch/arm/sunxi/sun4i_a10_ccu.c
diff -u src/sys/arch/arm/sunxi/sun4i_a10_ccu.c:1.16 src/sys/arch/arm/sunxi/sun4i_a10_ccu.c:1.16.16.1
--- src/sys/arch/arm/sunxi/sun4i_a10_ccu.c:1.16 Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/sunxi/sun4i_a10_ccu.c Sun Oct 2 10:37:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sun4i_a10_ccu.c,v 1.16 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: sun4i_a10_ccu.c,v 1.16.16.1 2022/10/02 10:37:12 bouyer Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun4i_a10_ccu.c,v 1.16 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun4i_a10_ccu.c,v 1.16.16.1 2022/10/02 10:37:12 bouyer Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -47,6 +47,7 @@ __KERNEL_RCSID(1, "$NetBSD: sun4i_a10_cc
#define PLL5_CFG_REG 0x020
#define PLL6_CFG_REG 0x028
#define PLL7_CFG_REG 0x030
+#define PLL8_CFG_REG 0x040
#define OSC24M_CFG_REG 0x050
#define CPU_AHB_APB0_CFG_REG 0x054
#define APB1_CLK_DIV_REG 0x058
@@ -80,7 +81,7 @@ __KERNEL_RCSID(1, "$NetBSD: sun4i_a10_cc
#define AUDIO_CODEC_SCLK_CFG_REG 0x140
#define LVDS_CFG_REG 0x14c
#define HDMI_CLOCK_CFG_REG 0x150
-#define MALI_CLOCK_CFG_REG 0x154
+#define MALI_CFG_REG 0x154
#define IEP_SCLK_CFG_REG 0x160
#define CLK_OUTA_REG 0x1f0
#define CLK_OUTB_REG 0x1f4
@@ -114,6 +115,7 @@ static struct sunxi_ccu_reset sun4i_a10_
SUNXI_CCU_RESET(A10_RST_TCON0, LCD0CH0_CFG_REG, 30),
SUNXI_CCU_RESET(A10_RST_TCON1, LCD1CH0_CFG_REG, 30),
SUNXI_CCU_RESET(A10_RST_LVDS, LVDS_CFG_REG, 0),
+ SUNXI_CCU_RESET(A10_RST_GPU, MALI_CFG_REG, 30),
};
static const char *cpu_parents[] = { "losc", "osc24m", "pll_core", "pll_periph" };
@@ -126,6 +128,7 @@ static const char *sata_parents[] = { "p
static const char *de_parents[] = { "pll_video0", "pll_video1", "pll_ddr_other" };
static const char *lcd_parents[] = { "pll_video0", "pll_video1", "pll_video0x2", "pll_video1x2" };
static const char *out_parents[] = { "losc" /* really OSC24MHz/750 */, "losc", "osc24m" };
+static const char *gpu_parents[] = { "pll_gpu" };
static const struct sunxi_ccu_nkmp_tbl sun4i_a10_pll1_table[] = {
{ 1008000000, 21, 1, 0, 0 },
@@ -384,6 +387,14 @@ static struct sunxi_ccu_clk sun4i_a10_cc
SUNXI_CCU_FIXED_FACTOR(A10_CLK_PLL_VIDEO1_2X,
"pll_video1x2", "pll_video1",
1, 2),
+ SUNXI_CCU_NKMP(A10_CLK_PLL_GPU, "pll_gpu", "osc24m",
+ PLL8_CFG_REG, /* reg */
+ __BITS(12, 8), /* n */
+ __BITS(5,4), /* k */
+ 0, /* m */
+ 0, /* p */
+ __BIT(31), /* enable */
+ SUNXI_CCU_NKMP_FACTOR_N_EXACT),
SUNXI_CCU_DIV_GATE(A10_CLK_DE_BE0, "debe0-mod", de_parents,
BE0_CFG_REG, /* reg */
@@ -486,6 +497,13 @@ static struct sunxi_ccu_clk sun4i_a10_cc
__BIT(31), /* enable */
0 /* flags */
),
+ SUNXI_CCU_DIV_GATE(A10_CLK_GPU, "gpu", gpu_parents,
+ MALI_CFG_REG, /* reg */
+ __BITS(3,0), /* div */
+ __BITS(25,24), /* sel */
+ __BIT(31), /* enable */
+ 0 /* flags */
+ ),
/* A20 specific */
SUNXI_CCU_NM(A20_CLK_OUT_A, "outa", out_parents,
Index: src/sys/arch/arm/sunxi/sunxi_debe.c
diff -u src/sys/arch/arm/sunxi/sunxi_debe.c:1.16 src/sys/arch/arm/sunxi/sunxi_debe.c:1.16.2.1
--- src/sys/arch/arm/sunxi/sunxi_debe.c:1.16 Sat Jan 1 13:47:19 2022
+++ src/sys/arch/arm/sunxi/sunxi_debe.c Sun Oct 2 10:37:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_debe.c,v 1.16 2022/01/01 13:47:19 andvar Exp $ */
+/* $NetBSD: sunxi_debe.c,v 1.16.2.1 2022/10/02 10:37:12 bouyer Exp $ */
/*-
* Copyright (c) 2018 Manuel Bouyer <bou...@antioche.eu.org>
@@ -38,7 +38,7 @@
#define SUNXI_DEBE_CURMAX 64
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_debe.c,v 1.16 2022/01/01 13:47:19 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_debe.c,v 1.16.2.1 2022/10/02 10:37:12 bouyer Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -52,6 +52,11 @@ __KERNEL_RCSID(0, "$NetBSD: sunxi_debe.c
#include <dev/fdt/fdtvar.h>
#include <dev/fdt/fdt_port.h>
+#include <arm/sunxi/sunxi_drm.h>
+
+#include <drm/drm_crtc.h>
+#include <drm/drm_crtc_helper.h>
+
#include <dev/videomode/videomode.h>
#include <dev/wscons/wsconsio.h>
#include <dev/wsfb/genfbvar.h>
@@ -65,6 +70,22 @@ enum sunxi_debe_type {
DEBE_A10 = 1,
};
+enum {
+ DEBE_PORT_OUTPUT = 1,
+};
+
+struct sunxi_debi_softc;
+
+struct sunxi_debe_crtc {
+ struct drm_crtc base;
+ struct sunxi_debe_softc *sc;
+};
+
+struct sunxi_debe_plane {
+ struct drm_plane base;
+ struct sunxi_debe_softc *sc;
+};
+
struct sunxi_debe_softc {
device_t sc_dev;
device_t sc_fbdev;
@@ -79,20 +100,11 @@ struct sunxi_debe_softc {
struct fdtbus_reset *sc_rst;
- bus_dma_segment_t sc_dmasegs[1];
- bus_size_t sc_dmasize;
- bus_dmamap_t sc_dmamap;
- void *sc_dmap;
-
- bool sc_cursor_enable;
- int sc_cursor_x, sc_cursor_y;
- int sc_hot_x, sc_hot_y;
- uint8_t sc_cursor_bitmap[8 * SUNXI_DEBE_CURMAX];
- uint8_t sc_cursor_mask[8 * SUNXI_DEBE_CURMAX];
-
int sc_phandle;
+
+ struct sunxi_debe_crtc sc_crtc;
+ struct sunxi_debe_plane sc_overlay;
struct fdt_device_ports sc_ports;
- struct fdt_endpoint *sc_out_ep;
int sc_unit; /* debe0 or debe1 */
};
@@ -101,39 +113,30 @@ struct sunxi_debe_softc {
#define DEBE_WRITE(sc, reg, val) \
bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
+#define to_sunxi_debe_crtc(x) container_of(x, struct sunxi_debe_crtc, base)
+#define to_sunxi_debe_plane(x) container_of(x, struct sunxi_debe_plane, base)
+
static const struct device_compatible_entry compat_data[] = {
{ .compat = "allwinner,sun4i-a10-display-backend", .value = DEBE_A10 },
{ .compat = "allwinner,sun7i-a20-display-backend", .value = DEBE_A10 },
DEVICE_COMPAT_EOL
};
-struct sunxifb_attach_args {
- void *afb_fb;
- uint32_t afb_width;
- uint32_t afb_height;
- bus_dma_tag_t afb_dmat;
- bus_dma_segment_t *afb_dmasegs;
- int afb_ndmasegs;
-};
-
-static void sunxi_debe_ep_connect(device_t, struct fdt_endpoint *, bool);
-static int sunxi_debe_ep_enable(device_t, struct fdt_endpoint *, bool);
+static int sunxi_debe_ep_activate(device_t, struct fdt_endpoint *, bool);
+static void * sunxi_debe_ep_get_data(device_t, struct fdt_endpoint *);
static int sunxi_debe_match(device_t, cfdata_t, void *);
static void sunxi_debe_attach(device_t, device_t, void *);
-static int sunxi_debe_alloc_videomem(struct sunxi_debe_softc *);
-static void sunxi_debe_setup_fbdev(struct sunxi_debe_softc *,
- const struct videomode *);
-
-static int sunxi_debe_set_curpos(struct sunxi_debe_softc *, int, int);
-static int sunxi_debe_set_cursor(struct sunxi_debe_softc *,
- struct wsdisplay_cursor *);
+#if 0
static int sunxi_debe_ioctl(device_t, u_long, void *);
static void sunxi_befb_set_videomode(device_t, u_int, u_int);
+#endif
void sunxi_debe_dump_regs(int);
+#if 0
static struct sunxi_debe_softc *debe_console_sc;
static int sunxi_simplefb_phandle = -1;
+#endif
CFATTACH_DECL_NEW(sunxi_debe, sizeof(struct sunxi_debe_softc),
sunxi_debe_match, sunxi_debe_attach, NULL, NULL);
@@ -150,11 +153,11 @@ static void
sunxi_debe_attach(device_t parent, device_t self, void *aux)
{
struct sunxi_debe_softc *sc = device_private(self);
+ struct fdt_endpoint *out_ep;
struct fdt_attach_args * const faa = aux;
const int phandle = faa->faa_phandle;
bus_addr_t addr;
bus_size_t size;
- int error;
sc->sc_dev = self;
sc->sc_phandle = phandle;
@@ -196,21 +199,22 @@ sunxi_debe_attach(device_t parent, devic
fdtbus_get_string(phandle, "name"));
- sc->sc_dmasize = SUNXI_DEBE_VIDEOMEM;
-
- error = sunxi_debe_alloc_videomem(sc);
- if (error) {
- aprint_error_dev(sc->sc_dev,
- "couldn't allocate video memory, error = %d\n", error);
- return;
+ sc->sc_unit = -1;
+ sc->sc_ports.dp_ep_activate = sunxi_debe_ep_activate;
+ sc->sc_ports.dp_ep_get_data = sunxi_debe_ep_get_data;
+ fdt_ports_register(&sc->sc_ports, self, phandle, EP_DRM_CRTC);
+
+ out_ep = fdt_endpoint_get_from_index(&sc->sc_ports,
+ DEBE_PORT_OUTPUT, 0);
+ if (out_ep == NULL) {
+ aprint_error(": couldn't get endpoint\n");
}
- sc->sc_unit = -1;
- sc->sc_ports.dp_ep_connect = sunxi_debe_ep_connect;
- sc->sc_ports.dp_ep_enable = sunxi_debe_ep_enable;
- fdt_ports_register(&sc->sc_ports, self, phandle, EP_OTHER);
+ if (out_ep != NULL)
+ sunxi_drm_register_endpoint(phandle, out_ep);
}
+#if 0
static void
sunxi_debe_doreset(void)
{
@@ -266,183 +270,29 @@ sunxi_debe_doreset(void)
}
}
}
+#endif
static void
-sunxi_debe_ep_connect(device_t self, struct fdt_endpoint *ep, bool connect)
-{
- struct sunxi_debe_softc *sc = device_private(self);
- struct fdt_endpoint *rep = fdt_endpoint_remote(ep);
- int rep_idx = fdt_endpoint_index(rep);
-
- KASSERT(device_is_a(self, "sunxidebe"));
- if (!connect) {
- aprint_error_dev(self, "endpoint disconnect not supported\n");
- return;
- }
-
- if (fdt_endpoint_port_index(ep) == 1) {
- bool do_print = (sc->sc_unit == -1);
- /*
- * one of our output endpoints has been connected.
- * the remote id is our unit number
- */
- if (sc->sc_unit != -1 && rep_idx != -1 &&
- sc->sc_unit != rep_idx) {
- aprint_error_dev(self, ": remote id %d doesn't match"
- " discovered unit number %d\n",
- rep_idx, sc->sc_unit);
- return;
- }
- if (!device_is_a(fdt_endpoint_device(rep), "sunxitcon")) {
- aprint_error_dev(self,
- ": output %d connected to unknown device\n",
- fdt_endpoint_index(ep));
- return;
- }
- if (rep_idx != -1)
- sc->sc_unit = rep_idx;
- else {
- /* assume only one debe */
- sc->sc_unit = 0;
- }
- if (do_print)
- aprint_verbose_dev(self, "debe unit %d\n", sc->sc_unit);
- }
-}
-
-static int
-sunxi_debe_alloc_videomem(struct sunxi_debe_softc *sc)
-{
- int error, nsegs;
-
- error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dmasize, 0x1000, 0,
- sc->sc_dmasegs, 1, &nsegs, BUS_DMA_WAITOK);
- if (error)
- return error;
- error = bus_dmamem_map(sc->sc_dmat, sc->sc_dmasegs, nsegs,
- sc->sc_dmasize, &sc->sc_dmap, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
- if (error)
- goto free;
- error = bus_dmamap_create(sc->sc_dmat, sc->sc_dmasize, 1,
- sc->sc_dmasize, 0, BUS_DMA_WAITOK, &sc->sc_dmamap);
- if (error)
- goto unmap;
- error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_dmap,
- sc->sc_dmasize, NULL, BUS_DMA_WAITOK);
- if (error)
- goto destroy;
-
- memset(sc->sc_dmap, 0, sc->sc_dmasize);
-
- return 0;
-
-destroy:
- bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap);
-unmap:
- bus_dmamem_unmap(sc->sc_dmat, sc->sc_dmap, sc->sc_dmasize);
-free:
- bus_dmamem_free(sc->sc_dmat, sc->sc_dmasegs, nsegs);
-
- sc->sc_dmasize = 0;
- sc->sc_dmap = NULL;
-
- return error;
-}
-
-static void
-sunxi_debe_setup_fbdev(struct sunxi_debe_softc *sc, const struct videomode *mode)
+sunxi_debe_destroy(struct drm_crtc *crtc)
{
- if (mode == NULL)
- return;
-
- const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
- const u_int fb_width = mode->hdisplay;
- const u_int fb_height = (mode->vdisplay << interlace_p);
-
- if (mode && sc->sc_fbdev == NULL) {
- /* see if we are the console */
- if (sunxi_simplefb_phandle >= 0) {
- const char *cons_pipeline =
- fdtbus_get_string(sunxi_simplefb_phandle,
- "allwinner,pipeline");
- struct fdt_endpoint *ep = fdt_endpoint_get_from_index(
- &sc->sc_ports, SUNXI_PORT_OUTPUT, sc->sc_unit);
- struct fdt_endpoint *rep = fdt_endpoint_remote(ep);
- if (sunxi_tcon_is_console(
- fdt_endpoint_device(rep), cons_pipeline))
- debe_console_sc = sc;
- } else if (debe_console_sc == NULL) {
- if (match_bootconf_option(boot_args,
- "console", "fb0")) {
- if (sc->sc_unit == 0)
- debe_console_sc = sc;
- } else if (match_bootconf_option(boot_args,
- "console", "fb1")) {
- if (sc->sc_unit == 1)
- debe_console_sc = sc;
- } else if (match_bootconf_option(boot_args,
- "console", "fb")) {
- /* match first activated */
- debe_console_sc = sc;
- }
- }
- struct sunxifb_attach_args afb = {
- .afb_fb = sc->sc_dmap,
- .afb_width = fb_width,
- .afb_height = fb_height,
- .afb_dmat = sc->sc_dmat,
- .afb_dmasegs = sc->sc_dmasegs,
- .afb_ndmasegs = 1
- };
- sc->sc_fbdev = config_found(sc->sc_dev, &afb, NULL, CFARGS_NONE);
- } else if (sc->sc_fbdev != NULL) {
- sunxi_befb_set_videomode(sc->sc_fbdev, fb_width, fb_height);
- }
-}
-
-static int
-sunxi_debe_set_curpos(struct sunxi_debe_softc *sc, int x, int y)
-{
- int xx, yy;
- u_int yoff, xoff;
-
- xoff = yoff = 0;
- xx = x - sc->sc_hot_x;
- yy = y - sc->sc_hot_y;
- if (xx < 0) {
- xoff -= xx;
- xx = 0;
- }
- if (yy < 0) {
- yoff -= yy;
- yy = 0;
- }
-
- DEBE_WRITE(sc, SUNXI_DEBE_HWCCTL_REG,
- __SHIFTIN(yy, SUNXI_DEBE_HWCCTL_YCOOR) |
- __SHIFTIN(xx, SUNXI_DEBE_HWCCTL_XCOOR));
- DEBE_WRITE(sc, SUNXI_DEBE_HWCFBCTL_REG,
-#if SUNXI_DEBE_CURMAX == 32
- __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_32, SUNXI_DEBE_HWCFBCTL_YSIZE) |
- __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_32, SUNXI_DEBE_HWCFBCTL_XSIZE) |
-#else
- __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_64, SUNXI_DEBE_HWCFBCTL_YSIZE) |
- __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_64, SUNXI_DEBE_HWCFBCTL_XSIZE) |
-#endif
- __SHIFTIN(SUNXI_DEBE_HWCFBCTL_FBFMT_2BPP, SUNXI_DEBE_HWCFBCTL_FBFMT) |
- __SHIFTIN(yoff, SUNXI_DEBE_HWCFBCTL_YCOOROFF) |
- __SHIFTIN(xoff, SUNXI_DEBE_HWCFBCTL_XCOOROFF));
-
- return 0;
+ drm_crtc_cleanup(crtc);
}
+#if 0
static int
-sunxi_debe_set_cursor(struct sunxi_debe_softc *sc, struct wsdisplay_cursor *cur)
+sunxi_debe_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
+ uint32_t handle, uint32_t width, uint32_t height)
{
+ struct sunxi_debe_crtc *debe_crtc = to_sunxi_debe_crtc(crtc);
+ struct sunxi_debe_softc * const sc = debe_crtc->sc;
+ struct drm_gem_object *gem_obj = NULL;
+ struct drm_gem_cma_object *obj;
uint32_t val;
+ int error;
+
uint8_t r[4], g[4], b[4];
u_int index, count, shift, off, pcnt;
- int i, j, idx, error;
+ int i, j, idx;
uint8_t mask;
if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
@@ -520,46 +370,102 @@ sunxi_debe_set_cursor(struct sunxi_debe_
}
static int
-sunxi_debe_ep_enable(device_t dev, struct fdt_endpoint *ep, bool enable)
+sunxi_debe_cursor_move(struct drm_crtc *crtc, int x, int y)
{
- struct sunxi_debe_softc *sc;
+ struct sunxi_debe_crtc *debe_crtc = to_sunxi_debe_crtc(crtc);
+ struct sunxi_debe_softc * const sc = debe_crtc->sc;
+
+ crtc->cursor_x = x & 0xffff;
+ crtc->cursor_y = y & 0xffff;
+
+ DEBE_WRITE(sc, SUNXI_DEBE_HWCCTL_REG,
+ __SHIFTIN(crtc->cursor_y, SUNXI_DEBE_HWCCTL_YCOOR) |
+ __SHIFTIN(crtc->cursor_x, SUNXI_DEBE_HWCCTL_XCOOR));
+ DEBE_WRITE(sc, SUNXI_DEBE_HWCFBCTL_REG,
+#if SUNXI_DEBE_CURMAX == 32
+ __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_32, SUNXI_DEBE_HWCFBCTL_YSIZE) |
+ __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_32, SUNXI_DEBE_HWCFBCTL_XSIZE) |
+#else
+ __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_64, SUNXI_DEBE_HWCFBCTL_YSIZE) |
+ __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_64, SUNXI_DEBE_HWCFBCTL_XSIZE) |
+#endif
+ __SHIFTIN(SUNXI_DEBE_HWCFBCTL_FBFMT_2BPP, SUNXI_DEBE_HWCFBCTL_FBFMT) |
+ __SHIFTIN(crtc->cursor_y, SUNXI_DEBE_HWCFBCTL_YCOOROFF) |
+ __SHIFTIN(crtc->cursor_x, SUNXI_DEBE_HWCFBCTL_XCOOROFF));
+
+ return 0;
+}
+#endif
+
+static const struct drm_crtc_funcs sunxi_debe_crtc_funcs = {
+ .set_config = drm_crtc_helper_set_config,
+ .destroy = sunxi_debe_destroy,
+#if 0
+ .cursor_set = sunxi_debe_cursor_set,
+ .cursor_move = sunxi_debe_cursor_move,
+#endif
+};
+
+static int
+sunxi_debe_ep_activate(device_t dev, struct fdt_endpoint *ep, bool activate)
+{
+ struct sunxi_debe_softc * const sc = device_private(dev);
+ struct drm_device *ddev;
uint32_t val;
- KASSERT(device_is_a(dev, "sunxidebe"));
- sc = device_private(dev);
+ if (!activate)
+ return EINVAL;
- if (enable) {
- if (clk_enable(sc->sc_clk_ram) != 0) {
- device_printf(dev,
- ": warning: failed to enable ram clock\n");
- }
- val = DEBE_READ(sc, SUNXI_DEBE_REGBUFFCTL_REG);
- val |= SUNXI_DEBE_REGBUFFCTL_REGLOADCTL;
- DEBE_WRITE(sc, SUNXI_DEBE_REGBUFFCTL_REG, val);
+ ddev = sunxi_drm_endpoint_device(ep);
+ if (ddev == NULL) {
+ DRM_ERROR("couldn't find DRM device\n");
+ return ENXIO;
+ }
- val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
- val |= SUNXI_DEBE_MODCTL_START_CTL;
- DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
+ sc->sc_crtc.sc = sc;
+ sc->sc_overlay.sc = sc;
+
+ if (clk_enable(sc->sc_clk_ram) != 0) {
+ device_printf(dev, ": warning: failed to enable ram clock\n");
+ }
+ val = DEBE_READ(sc, SUNXI_DEBE_REGBUFFCTL_REG);
+ val |= SUNXI_DEBE_REGBUFFCTL_REGLOADCTL;
+ DEBE_WRITE(sc, SUNXI_DEBE_REGBUFFCTL_REG, val);
+
+ val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
+ val |= SUNXI_DEBE_MODCTL_START_CTL;
+ DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
#ifdef SUNXI_DEBE_DEBUG
- sunxi_debe_dump_regs(sc->sc_unit);
+ sunxi_debe_dump_regs(sc->sc_unit);
#endif
- } else {
- val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
- val &= ~SUNXI_DEBE_MODCTL_START_CTL;
- DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
- if (clk_disable(sc->sc_clk_ram) != 0) {
- device_printf(dev,
+#if 0
+ /* disable */
+ val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
+ val &= ~SUNXI_DEBE_MODCTL_START_CTL;
+ DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
+ if (clk_disable(sc->sc_clk_ram) != 0) {
+ device_printf(dev,
": warning: failed to disable ram clock\n");
- }
}
+#endif
+
+ drm_crtc_init(ddev, &sc->sc_crtc.base, &sunxi_debe_crtc_funcs);
#if 0
- for (int i = 0; i < 0x1000; i += 4) {
- printf("DEBE 0x%04x: 0x%08x\n", i, DEBE_READ(sc, i));
- }
+ drm_crtc_helper_add(&sc->sc_crtc_base, &sunxi_debe_crtc_helper_funcs);
#endif
- return 0;
+
+ return fdt_endpoint_activate(ep, activate);
}
+static void *
+sunxi_debe_ep_get_data(device_t dev, struct fdt_endpoint *ep)
+{
+ struct sunxi_debe_softc * const sc = device_private(dev);
+
+ return &sc->sc_crtc;
+}
+
+#if 0
/*
* FIXME 2020/10/19
* This function is not called actually at the moment.
@@ -655,7 +561,9 @@ sunxi_debe_set_videomode(device_t dev, c
sunxi_debe_setup_fbdev(sc, mode);
}
}
+#endif
+#if 0
static int
sunxi_debe_ioctl(device_t self, u_long cmd, void *data)
{
@@ -703,9 +611,11 @@ sunxi_debe_ioctl(device_t self, u_long c
return EPASSTHROUGH;
}
+#endif
/* genfb attachement */
+#if 0
struct sunxi_befb_softc {
struct genfb_softc sc_gen;
device_t sc_debedev;
@@ -944,6 +854,7 @@ static const struct fdt_console sunxideb
};
FDT_CONSOLE(sunxidebe, &sunxidebe_fdt_console);
+#endif
#if defined(SUNXI_DEBE_DEBUG)
void
Index: src/sys/arch/arm/sunxi/sunxi_drm.c
diff -u src/sys/arch/arm/sunxi/sunxi_drm.c:1.26 src/sys/arch/arm/sunxi/sunxi_drm.c:1.26.2.1
--- src/sys/arch/arm/sunxi/sunxi_drm.c:1.26 Sun Sep 25 07:50:23 2022
+++ src/sys/arch/arm/sunxi/sunxi_drm.c Sun Oct 2 10:37:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_drm.c,v 1.26 2022/09/25 07:50:23 riastradh Exp $ */
+/* $NetBSD: sunxi_drm.c,v 1.26.2.1 2022/10/02 10:37:12 bouyer Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_drm.c,v 1.26 2022/09/25 07:50:23 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_drm.c,v 1.26.2.1 2022/10/02 10:37:12 bouyer Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -71,6 +71,8 @@ static const struct device_compatible_en
{ .compat = "allwinner,sun8i-h3-display-engine" },
{ .compat = "allwinner,sun8i-v3s-display-engine" },
{ .compat = "allwinner,sun50i-a64-display-engine" },
+ { .compat = "allwinner,sun4i-a10-display-engine" },
+ { .compat = "allwinner,sun7i-a20-display-engine" },
DEVICE_COMPAT_EOL
};
Index: src/sys/arch/arm/sunxi/sunxi_drm.h
diff -u src/sys/arch/arm/sunxi/sunxi_drm.h:1.3 src/sys/arch/arm/sunxi/sunxi_drm.h:1.3.2.1
--- src/sys/arch/arm/sunxi/sunxi_drm.h:1.3 Sun Dec 19 12:28:20 2021
+++ src/sys/arch/arm/sunxi/sunxi_drm.h Sun Oct 2 10:37:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_drm.h,v 1.3 2021/12/19 12:28:20 riastradh Exp $ */
+/* $NetBSD: sunxi_drm.h,v 1.3.2.1 2022/10/02 10:37:12 bouyer Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill <jmcne...@invisible.ca>
@@ -37,7 +37,7 @@
#define DRIVER_AUTHOR "Jared McNeill"
-#define DRIVER_NAME "sunxi"
+#define DRIVER_NAME "sun4i_drm"
#define DRIVER_DESC "Allwinner Display Engine"
#define DRIVER_DATE "20190123"
Index: src/sys/arch/arm/sunxi/sunxi_hdmi.c
diff -u src/sys/arch/arm/sunxi/sunxi_hdmi.c:1.14 src/sys/arch/arm/sunxi/sunxi_hdmi.c:1.14.16.1
--- src/sys/arch/arm/sunxi/sunxi_hdmi.c:1.14 Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/sunxi/sunxi_hdmi.c Sun Oct 2 10:37:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_hdmi.c,v 1.14 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: sunxi_hdmi.c,v 1.14.16.1 2022/10/02 10:37:12 bouyer Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <jmcne...@invisible.ca>
@@ -29,7 +29,7 @@
#include "opt_ddb.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_hdmi.c,v 1.14 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_hdmi.c,v 1.14.16.1 2022/10/02 10:37:12 bouyer Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -48,12 +48,15 @@ __KERNEL_RCSID(0, "$NetBSD: sunxi_hdmi.c
#include <dev/i2c/i2cvar.h>
#include <dev/i2c/ddcvar.h>
#include <dev/i2c/ddcreg.h>
-#include <dev/videomode/videomode.h>
-#include <dev/videomode/edidvar.h>
#include <arm/sunxi/sunxi_hdmireg.h>
#include <arm/sunxi/sunxi_display.h>
+#include <drm/drm_bridge.h>
+#include <drm/drm_connector.h>
+#include <drm/drm_drv.h>
+#include <drm/drm_modes.h>
+
enum sunxi_hdmi_type {
HDMI_A10 = 1,
HDMI_A31,
@@ -76,15 +79,7 @@ struct sunxi_hdmi_softc {
kmutex_t sc_exec_lock;
bool sc_display_connected;
- char sc_display_vendor[16];
- char sc_display_product[16];
- u_int sc_display_mode;
- u_int sc_current_display_mode;
-#define DISPLAY_MODE_AUTO 0
-#define DISPLAY_MODE_HDMI 1
-#define DISPLAY_MODE_DVI 2
-
kmutex_t sc_pwr_lock;
int sc_pwr_refcount; /* reference who needs HDMI */
@@ -95,6 +90,7 @@ struct sunxi_hdmi_softc {
struct fdt_endpoint *sc_in_ep;
struct fdt_endpoint *sc_in_rep;
struct fdt_endpoint *sc_out_ep;
+ struct drm_display_mode sc_curmode;
};
#define HDMI_READ(sc, reg) \
@@ -123,18 +119,22 @@ static int sunxi_hdmi_i2c_reset(struct s
static int sunxi_hdmi_ep_activate(device_t, struct fdt_endpoint *, bool);
static int sunxi_hdmi_ep_enable(device_t, struct fdt_endpoint *, bool);
static void sunxi_hdmi_do_enable(struct sunxi_hdmi_softc *);
+#if 0
static void sunxi_hdmi_read_edid(struct sunxi_hdmi_softc *);
static int sunxi_hdmi_read_edid_block(struct sunxi_hdmi_softc *, uint8_t *,
uint8_t);
static u_int sunxi_hdmi_get_display_mode(struct sunxi_hdmi_softc *,
const struct edid_info *);
+#endif
static void sunxi_hdmi_video_enable(struct sunxi_hdmi_softc *, bool);
+#if 0
static void sunxi_hdmi_set_videomode(struct sunxi_hdmi_softc *,
const struct videomode *, u_int);
static void sunxi_hdmi_set_audiomode(struct sunxi_hdmi_softc *,
const struct videomode *, u_int);
static void sunxi_hdmi_hpd(struct sunxi_hdmi_softc *);
static void sunxi_hdmi_thread(void *);
+#endif
static int sunxi_hdmi_poweron(struct sunxi_hdmi_softc *, bool);
#if 0
static int sunxi_hdmi_intr(void *);
@@ -547,23 +547,11 @@ sunxi_hdmi_ep_enable(device_t dev, struc
if (fdt_endpoint_port_index(ep) == SUNXI_PORT_INPUT) {
KASSERT(ep == sc->sc_in_ep);
- if (sc->sc_thread == NULL) {
- if (enable) {
- delay(50000);
- mutex_enter(&sc->sc_pwr_lock);
- sunxi_hdmi_hpd(sc);
- mutex_exit(&sc->sc_pwr_lock);
- kthread_create(PRI_NONE, KTHREAD_MPSAFE, NULL,
- sunxi_hdmi_thread, sc, &sc->sc_thread, "%s",
- device_xname(dev));
- }
- return 0;
- } else {
- mutex_enter(&sc->sc_pwr_lock);
- error = sunxi_hdmi_poweron(sc, enable);
- mutex_exit(&sc->sc_pwr_lock);
- return error;
- }
+
+ mutex_enter(&sc->sc_pwr_lock);
+ error = sunxi_hdmi_poweron(sc, enable);
+ mutex_exit(&sc->sc_pwr_lock);
+ return error;
}
panic("sunxi_hdmi_ep_enable");
}
@@ -628,6 +616,7 @@ sunxi_hdmi_do_enable(struct sunxi_hdmi_s
delay(1000);
}
+#if 0
#define EDID_BLOCK_SIZE 128
static int
@@ -800,6 +789,7 @@ next_block:
kmem_free(edid, EDID_BLOCK_SIZE);
return found_hdmi ? DISPLAY_MODE_HDMI : DISPLAY_MODE_DVI;
}
+#endif
static void
sunxi_hdmi_video_enable(struct sunxi_hdmi_softc *sc, bool enable)
@@ -829,6 +819,7 @@ sunxi_hdmi_video_enable(struct sunxi_hdm
#endif
}
+#if 0
static void
sunxi_hdmi_set_videomode(struct sunxi_hdmi_softc *sc,
const struct videomode *mode, u_int display_mode)
@@ -1072,7 +1063,9 @@ sunxi_hdmi_set_audiomode(struct sunxi_hd
sunxi_hdmi_dump_regs();
#endif
}
+#endif
+#if 0
static void
sunxi_hdmi_hpd(struct sunxi_hdmi_softc *sc)
{
@@ -1111,6 +1104,7 @@ sunxi_hdmi_thread(void *priv)
kpause("hdmihotplug", false, mstohz(1000), NULL);
}
}
+#endif
static int
sunxi_hdmi_poweron(struct sunxi_hdmi_softc *sc, bool enable)
Index: src/sys/arch/arm/sunxi/sunxi_lcdc.c
diff -u src/sys/arch/arm/sunxi/sunxi_lcdc.c:1.15 src/sys/arch/arm/sunxi/sunxi_lcdc.c:1.15.2.1
--- src/sys/arch/arm/sunxi/sunxi_lcdc.c:1.15 Tue Jun 28 05:19:03 2022
+++ src/sys/arch/arm/sunxi/sunxi_lcdc.c Sun Oct 2 10:37:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_lcdc.c,v 1.15 2022/06/28 05:19:03 skrll Exp $ */
+/* $NetBSD: sunxi_lcdc.c,v 1.15.2.1 2022/10/02 10:37:12 bouyer Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_lcdc.c,v 1.15 2022/06/28 05:19:03 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_lcdc.c,v 1.15.2.1 2022/10/02 10:37:12 bouyer Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -112,6 +112,8 @@ static const struct device_compatible_en
{ .compat = "allwinner,sun8i-v3s-tcon", .value = TYPE_TCON0 },
{ .compat = "allwinner,sun50i-a64-tcon-lcd", .value = TYPE_TCON0 },
{ .compat = "allwinner,sun50i-a64-tcon-tv", .value = TYPE_TCON1 },
+ { .compat = "allwinner,sun7i-a20-tcon0", .value = TYPE_TCON0 },
+ { .compat = "allwinner,sun7i-a20-tcon1", .value = TYPE_TCON1 },
DEVICE_COMPAT_EOL
};
