Module Name: src
Committed By: skrll
Date: Sun Sep 11 15:31:12 UTC 2022
Modified Files:
src/sys/arch/riscv/conf: GENERIC files.riscv
src/sys/arch/riscv/include: types.h
src/sys/arch/riscv/riscv: genassym.cf mainbus.c
Added Files:
src/sys/arch/riscv/fdt: fdt_dma_machdep.c
src/sys/arch/riscv/include: bus_defs.h bus_funcs.h
src/sys/arch/riscv/riscv: bus_space.c bus_space_generic.S
bus_space_notimpl.S
Removed Files:
src/sys/arch/riscv/htif: htif.c htif_cons.c htif_disk.c htif_var.h
src/sys/arch/riscv/include: bus.h
Log Message:
Add some bus_space(9), bus_dma(9) and FDT infrastructure. Baby steps.
Remove the RISC-V Host Target Interface (HTIF) Emulation code.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/riscv/conf/GENERIC
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/riscv/conf/files.riscv
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/fdt/fdt_dma_machdep.c
cvs rdiff -u -r1.4 -r0 src/sys/arch/riscv/htif/htif.c
cvs rdiff -u -r1.2 -r0 src/sys/arch/riscv/htif/htif_cons.c \
src/sys/arch/riscv/htif/htif_disk.c src/sys/arch/riscv/htif/htif_var.h
cvs rdiff -u -r1.2 -r0 src/sys/arch/riscv/include/bus.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/include/bus_defs.h \
src/sys/arch/riscv/include/bus_funcs.h
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/riscv/include/types.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/riscv/bus_space.c \
src/sys/arch/riscv/riscv/bus_space_generic.S \
src/sys/arch/riscv/riscv/bus_space_notimpl.S
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/riscv/riscv/genassym.cf
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/mainbus.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/conf/GENERIC
diff -u src/sys/arch/riscv/conf/GENERIC:1.13 src/sys/arch/riscv/conf/GENERIC:1.14
--- src/sys/arch/riscv/conf/GENERIC:1.13 Sun Aug 7 02:52:29 2022
+++ src/sys/arch/riscv/conf/GENERIC Sun Sep 11 15:31:11 2022
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC,v 1.13 2022/08/07 02:52:29 simonb Exp $
+# $NetBSD: GENERIC,v 1.14 2022/09/11 15:31:11 skrll Exp $
#
# GENERIC machine description file
#
@@ -22,10 +22,16 @@ include "arch/riscv/conf/std.riscv64"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "GENERIC-$Revision: 1.13 $"
+#ident "GENERIC-$Revision: 1.14 $"
maxusers 64 # estimated number of users
+options FDT
+
+#options EARLYCONS=com, CONSADDR=0x10000000
+#options EARLYCONS=com, CONSADDR=0x12440000
+options VERBOSE_INIT_RISCV
+
# Standard system options
#options FPE # Floating-point extension support
options NTP # NTP phase/frequency locked loop
@@ -51,8 +57,18 @@ options BUFQ_PRIOCSCAN
# Diagnostic/debugging support options
options DIAGNOSTIC # inexpensive kernel consistency checks
# XXX to be commented out on release branch
-#options DEBUG # expensive debugging checks/support
-#options LOCKDEBUG # expensive locking checks/support
+#options DEBUG # expensive debugging checks/support
+#options LOCKDEBUG # expensive locking checks/support
+#options KERNHIST
+#options KERNHIST_PRINT
+#options UVMHIST
+#options UVMHIST_PRINT
+#options PMAPHIST
+#options PMAPHIST_PRINT
+#options SYSCTL_DEBUG
+#options SYSCTL_DEBUG_SETUP
+#options SYSCTL_DEBUG_CREATE
+
#
# Because gcc omits the frame pointer for any -O level, the line below
@@ -62,7 +78,7 @@ options DIAGNOSTIC # inexpensive kernel
makeoptions COPY_SYMTAB=1
options DDB # in-kernel debugger
#options DDB_COMMANDONENTER="bt" # execute command when ddb is entered
-#options DDB_ONPANIC=1 # see also sysctl(7): `ddb.onpanic'
+options DDB_ONPANIC=1 # see also sysctl(7): `ddb.onpanic'
options DDB_HISTORY_SIZE=512 # enable history editing in DDB
#options KGDB # remote debugger
#options KGDB_DEVNAME="\"com\"",KGDB_DEVADDR=0x3f8,KGDB_DEVRATE=9600
@@ -135,13 +151,11 @@ config netbsd root on ? type ?
#
# Device configuration
#
-mainbus0 at root
-cpu0 at mainbus0
-htif0 at mainbus0
-htifcons0 at htif0
-htifdisk0 at htif0
-ld0 at htifdisk0
+mainbus0 at root
+simplebus* at fdt? pass 0
+# UART
+com* at fdt? # UART
# Pseudo-Devices
Index: src/sys/arch/riscv/conf/files.riscv
diff -u src/sys/arch/riscv/conf/files.riscv:1.7 src/sys/arch/riscv/conf/files.riscv:1.8
--- src/sys/arch/riscv/conf/files.riscv:1.7 Wed Nov 4 06:56:56 2020
+++ src/sys/arch/riscv/conf/files.riscv Sun Sep 11 15:31:11 2022
@@ -1,14 +1,25 @@
-# $NetBSD: files.riscv,v 1.7 2020/11/04 06:56:56 skrll Exp $
+# $NetBSD: files.riscv,v 1.8 2022/09/11 15:31:11 skrll Exp $
#
maxpartitions 16
maxusers 8 32 64
+# Console options
+defparam opt_console.h CONSADDR
+
+# RISC-V specific debug options
+defflag opt_riscv_debug.h VERBOSE_INIT_RISCV
+
defflag opt_ddb.h DDB_TRACE
-#file arch/riscv/riscv/locore.S
+file arch/riscv/fdt/fdt_dma_machdep.c
+
file arch/riscv/riscv/spl.S
+file arch/riscv/riscv/bus_space.c
+file arch/riscv/riscv/bus_space_generic.S
+file arch/riscv/riscv/bus_space_notimpl.S
+
file arch/riscv/riscv/autoconf.c
file arch/riscv/riscv/cpu_subr.c
file arch/riscv/riscv/db_disasm.c ddb
@@ -50,25 +61,24 @@ file arch/riscv/riscv/netbsd32_machdep.c
file arch/riscv/riscv/sig32_machdep.c compat_netbsd32
include "compat/netbsd32/files.netbsd32"
-device mainbus { [instance=-1] }
+device mainbus {}: fdt
attach mainbus at root
+
file arch/riscv/riscv/mainbus.c mainbus
-device cpu
-attach cpu at mainbus with cpu_mainbus
-file arch/riscv/riscv/cpu_mainbus.c cpu_mainbus
-
-device htif { }
-attach htif at mainbus with htif_mainbus
-file arch/riscv/htif/htif.c htif_mainbus
-
-device htifcons { } : tty
-attach htifcons at htif with htif_cons
-file arch/riscv/htif/htif_cons.c htif_cons
-
-device htifdisk { } : disk
-attach htifdisk at htif with htif_disk
-attach ld at htifdisk with ld_htifdisk
-file arch/riscv/htif/htif_disk.c htif_disk
+# Machine-independent I2O drivers.
+include "dev/i2o/files.i2o"
+
+# Machine-independent SCSI drivers
+include "dev/scsipi/files.scsipi"
+
+# Machine-independent ATA drivers
+include "dev/ata/files.ata"
+
+# Machine-independent USB device support
+include "dev/usb/files.usb"
+
+# Machine-independent PCI device support
+#include "dev/pci/files.pci"
include "arch/riscv/conf/majors.riscv"
Index: src/sys/arch/riscv/include/types.h
diff -u src/sys/arch/riscv/include/types.h:1.12 src/sys/arch/riscv/include/types.h:1.13
--- src/sys/arch/riscv/include/types.h:1.12 Mon May 3 20:07:57 2021
+++ src/sys/arch/riscv/include/types.h Sun Sep 11 15:31:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.12 2021/05/03 20:07:57 skrll Exp $ */
+/* $NetBSD: types.h,v 1.13 2022/09/11 15:31:12 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -89,8 +89,7 @@ typedef __int32_t __register_t;
#define __HAVE_CPU_DATA_FIRST
#define __HAVE_FAST_SOFTINTS
#define __HAVE_MM_MD_DIRECT_MAPPED_PHYS
-//#define __HAVE_NEW_STYLE_BUS_H
-#define __HAVE_NO_BUS_DMA
+#define __HAVE_NEW_STYLE_BUS_H
#define __HAVE_SYSCALL_INTERN
#define __HAVE_TLS_VARIANT_I
/* XXX temporary */
Index: src/sys/arch/riscv/riscv/genassym.cf
diff -u src/sys/arch/riscv/riscv/genassym.cf:1.10 src/sys/arch/riscv/riscv/genassym.cf:1.11
--- src/sys/arch/riscv/riscv/genassym.cf:1.10 Wed Nov 4 20:05:47 2020
+++ src/sys/arch/riscv/riscv/genassym.cf Sun Sep 11 15:31:12 2022
@@ -1,4 +1,5 @@
-# $NetBSD: genassym.cf,v 1.10 2020/11/04 20:05:47 skrll Exp $
+# $NetBSD: genassym.cf,v 1.11 2022/09/11 15:31:12 skrll Exp $
+
#-
# Copyright (c) 2014 The NetBSD Foundation, Inc.
# All rights reserved.
@@ -35,6 +36,7 @@ quote #define __PMAP_PRIVATE
include <sys/param.h>
include <sys/bitops.h>
+include <sys/bus.h>
include <sys/cpu.h>
include <sys/intr.h>
include <sys/lwp.h>
@@ -205,3 +207,6 @@ define PTE_V PTE_V
define PM_MD_PDETAB offsetof(struct pmap, pm_md.md_pdetab)
define PM_MD_PTBR offsetof(struct pmap, pm_md.md_ptbr)
+
+# for bus_space_asm
+define BS_STRIDE offsetof(struct bus_space, bs_stride)
Index: src/sys/arch/riscv/riscv/mainbus.c
diff -u src/sys/arch/riscv/riscv/mainbus.c:1.4 src/sys/arch/riscv/riscv/mainbus.c:1.5
--- src/sys/arch/riscv/riscv/mainbus.c:1.4 Sat Aug 7 16:19:03 2021
+++ src/sys/arch/riscv/riscv/mainbus.c Sun Sep 11 15:31:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: mainbus.c,v 1.4 2021/08/07 16:19:03 thorpej Exp $ */
+/* $NetBSD: mainbus.c,v 1.5 2022/09/11 15:31:12 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,47 +30,56 @@
*/
#include "locators.h"
+#include "opt_console.h"
#include <sys/cdefs.h>
-__RCSID("$NetBSD: mainbus.c,v 1.4 2021/08/07 16:19:03 thorpej Exp $");
+__RCSID("$NetBSD: mainbus.c,v 1.5 2022/09/11 15:31:12 skrll Exp $");
#include <sys/param.h>
-#include <sys/systm.h>
+#include <sys/bus.h>
#include <sys/device.h>
+#include <sys/systm.h>
-#include <riscv/locore.h>
+#include <dev/fdt/fdtvar.h>
static int mainbus_match(device_t, cfdata_t, void *);
static void mainbus_attach(device_t, device_t, void *);
+extern struct bus_space riscv_generic_bs_tag;
+
CFATTACH_DECL_NEW(mainbus, 0,
mainbus_match, mainbus_attach, NULL, NULL);
-static int
-mainbus_print(void *aux, const char *name)
-{
- struct mainbus_attach_args * const maa = aux;
-
- if (maa->maa_instance != MAINBUSCF_INSTANCE_DEFAULT)
- printf(" instance %d", maa->maa_instance);
-
- return QUIET;
-}
-
int
mainbus_match(device_t parent, cfdata_t cf, void *aux)
{
+ static int once = 0;
+
+ if (once != 0)
+ return 0;
+ once = 1;
+
return 1;
}
void
mainbus_attach(device_t parent, device_t self, void *aux)
{
- struct mainbus_attach_args maa;
+ const struct fdt_console *cons = fdtbus_get_console();
+ struct fdt_attach_args faa;
- maa.maa_name = "cpu";
- maa.maa_instance = 0;
+ if (cons != NULL) {
+ faa.faa_phandle = fdtbus_get_stdout_phandle();
+ }
- config_found(self, &maa, mainbus_print, CFARGS_NONE);
+ faa.faa_phandle = OF_peer(0);
+ config_found(self, &faa, NULL, CFARGS_NONE);
+}
+
+
+bus_space_tag_t
+fdtbus_bus_tag_create(int phandle, uint32_t flags)
+{
+ return &riscv_generic_bs_tag;
}
Added files:
Index: src/sys/arch/riscv/fdt/fdt_dma_machdep.c
diff -u /dev/null src/sys/arch/riscv/fdt/fdt_dma_machdep.c:1.1
--- /dev/null Sun Sep 11 15:31:12 2022
+++ src/sys/arch/riscv/fdt/fdt_dma_machdep.c Sun Sep 11 15:31:12 2022
@@ -0,0 +1,46 @@
+/* $NetBSD: fdt_dma_machdep.c,v 1.1 2022/09/11 15:31:12 skrll Exp $ */
+
+/*-
+ * Copyright (c) 2022 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Nick Hudson
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: fdt_dma_machdep.c,v 1.1 2022/09/11 15:31:12 skrll Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/kmem.h>
+
+#include <dev/fdt/fdtvar.h>
+
+bus_dma_tag_t
+fdtbus_dma_tag_create(int phandle, const struct fdt_dma_range *ranges,
+ u_int nranges)
+{
+ return NULL;
+}
Index: src/sys/arch/riscv/include/bus_defs.h
diff -u /dev/null src/sys/arch/riscv/include/bus_defs.h:1.1
--- /dev/null Sun Sep 11 15:31:12 2022
+++ src/sys/arch/riscv/include/bus_defs.h Sun Sep 11 15:31:12 2022
@@ -0,0 +1,493 @@
+/* $NetBSD: bus_defs.h,v 1.1 2022/09/11 15:31:12 skrll Exp $ */
+
+/*-
+ * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RISCV_BUS_DEFS_H_
+#define _RISCV_BUS_DEFS_H_
+
+/*
+ * Addresses (in bus space).
+ */
+typedef paddr_t bus_addr_t;
+typedef psize_t bus_size_t;
+
+#define PRIxBUSADDR PRIxPADDR
+#define PRIxBUSSIZE PRIxPSIZE
+#define PRIuBUSSIZE PRIuPSIZE
+
+typedef struct bus_space *bus_space_tag_t;
+typedef uintptr_t bus_space_handle_t;
+
+#define PRIxBSH PRIxPTR
+
+/*
+ * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
+ * bus_size_t size, int flags, bus_space_handle_t *bshp);
+ *
+ * Map a region of bus space.
+ */
+#define BUS_SPACE_MAP_BUS1 __BIT(8)
+#define BUS_SPACE_MAP_BUS2 __BIT(9)
+#define BUS_SPACE_MAP_BUS3 __BIT(10)
+#define BUS_SPACE_MAP_BUS4 __BIT(11)
+
+struct bus_space {
+ int bs_stride; /* offset <<= bs_stride (if needed) */
+
+ /* mapping/unmapping */
+ int (*bs_map)(void *, bus_addr_t, bus_size_t,
+ int, bus_space_handle_t *);
+ void (*bs_unmap)(void *, bus_space_handle_t,
+ bus_size_t);
+ int (*bs_subregion)(void *, bus_space_handle_t,
+ bus_size_t, bus_size_t, bus_space_handle_t *);
+
+ /* allocation/deallocation */
+ int (*bs_alloc)(void *, bus_addr_t, bus_addr_t,
+ bus_size_t, bus_size_t, bus_size_t, int,
+ bus_addr_t *, bus_space_handle_t *);
+ void (*bs_free)(void *, bus_space_handle_t,
+ bus_size_t);
+
+ /* get kernel virtual address */
+ void * (*bs_vaddr)(void *, bus_space_handle_t);
+
+ /* mmap bus space for user */
+ paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int);
+
+ /* barrier */
+ void (*bs_barrier)(void *, bus_space_handle_t,
+ bus_size_t, bus_size_t, int);
+
+ /* read (single) */
+ uint8_t (*bs_r_1)(void *, bus_space_handle_t,
+ bus_size_t);
+ uint16_t (*bs_r_2)(void *, bus_space_handle_t,
+ bus_size_t);
+ uint32_t (*bs_r_4)(void *, bus_space_handle_t,
+ bus_size_t);
+ uint64_t (*bs_r_8)(void *, bus_space_handle_t,
+ bus_size_t);
+
+ /* read multiple */
+ void (*bs_rm_1)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t *, bus_size_t);
+ void (*bs_rm_2)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t *, bus_size_t);
+ void (*bs_rm_4)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t *, bus_size_t);
+ void (*bs_rm_8)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t *, bus_size_t);
+
+ /* read region */
+ void (*bs_rr_1)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t *, bus_size_t);
+ void (*bs_rr_2)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t *, bus_size_t);
+ void (*bs_rr_4)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t *, bus_size_t);
+ void (*bs_rr_8)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t *, bus_size_t);
+
+ /* write (single) */
+ void (*bs_w_1)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t);
+ void (*bs_w_2)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t);
+ void (*bs_w_4)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t);
+ void (*bs_w_8)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t);
+
+ /* write multiple */
+ void (*bs_wm_1)(void *, bus_space_handle_t,
+ bus_size_t, const uint8_t *, bus_size_t);
+ void (*bs_wm_2)(void *, bus_space_handle_t,
+ bus_size_t, const uint16_t *, bus_size_t);
+ void (*bs_wm_4)(void *, bus_space_handle_t,
+ bus_size_t, const uint32_t *, bus_size_t);
+ void (*bs_wm_8)(void *, bus_space_handle_t,
+ bus_size_t, const uint64_t *, bus_size_t);
+
+ /* write region */
+ void (*bs_wr_1)(void *, bus_space_handle_t,
+ bus_size_t, const uint8_t *, bus_size_t);
+ void (*bs_wr_2)(void *, bus_space_handle_t,
+ bus_size_t, const uint16_t *, bus_size_t);
+ void (*bs_wr_4)(void *, bus_space_handle_t,
+ bus_size_t, const uint32_t *, bus_size_t);
+ void (*bs_wr_8)(void *, bus_space_handle_t,
+ bus_size_t, const uint64_t *, bus_size_t);
+
+ /* set multiple */
+ void (*bs_sm_1)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t, bus_size_t);
+ void (*bs_sm_2)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t, bus_size_t);
+ void (*bs_sm_4)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t, bus_size_t);
+ void (*bs_sm_8)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t, bus_size_t);
+
+ /* set region */
+ void (*bs_sr_1)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t, bus_size_t);
+ void (*bs_sr_2)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t, bus_size_t);
+ void (*bs_sr_4)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t, bus_size_t);
+ void (*bs_sr_8)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t, bus_size_t);
+
+ /* copy */
+ void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+ /* read stream (single) */
+ uint8_t (*bs_r_1_s)(void *, bus_space_handle_t,
+ bus_size_t);
+ uint16_t (*bs_r_2_s)(void *, bus_space_handle_t,
+ bus_size_t);
+ uint32_t (*bs_r_4_s)(void *, bus_space_handle_t,
+ bus_size_t);
+ uint64_t (*bs_r_8_s)(void *, bus_space_handle_t,
+ bus_size_t);
+
+ /* read multiple stream */
+ void (*bs_rm_1_s)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t *, bus_size_t);
+ void (*bs_rm_2_s)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t *, bus_size_t);
+ void (*bs_rm_4_s)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t *, bus_size_t);
+ void (*bs_rm_8_s)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t *, bus_size_t);
+
+ /* read region stream */
+ void (*bs_rr_1_s)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t *, bus_size_t);
+ void (*bs_rr_2_s)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t *, bus_size_t);
+ void (*bs_rr_4_s)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t *, bus_size_t);
+ void (*bs_rr_8_s)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t *, bus_size_t);
+
+ /* write stream (single) */
+ void (*bs_w_1_s)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t);
+ void (*bs_w_2_s)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t);
+ void (*bs_w_4_s)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t);
+ void (*bs_w_8_s)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t);
+
+ /* write multiple stream */
+ void (*bs_wm_1_s)(void *, bus_space_handle_t,
+ bus_size_t, const uint8_t *, bus_size_t);
+ void (*bs_wm_2_s)(void *, bus_space_handle_t,
+ bus_size_t, const uint16_t *, bus_size_t);
+ void (*bs_wm_4_s)(void *, bus_space_handle_t,
+ bus_size_t, const uint32_t *, bus_size_t);
+ void (*bs_wm_8_s)(void *, bus_space_handle_t,
+ bus_size_t, const uint64_t *, bus_size_t);
+
+ /* write region stream */
+ void (*bs_wr_1_s)(void *, bus_space_handle_t,
+ bus_size_t, const uint8_t *, bus_size_t);
+ void (*bs_wr_2_s)(void *, bus_space_handle_t,
+ bus_size_t, const uint16_t *, bus_size_t);
+ void (*bs_wr_4_s)(void *, bus_space_handle_t,
+ bus_size_t, const uint32_t *, bus_size_t);
+ void (*bs_wr_8_s)(void *, bus_space_handle_t,
+ bus_size_t, const uint64_t *, bus_size_t);
+#endif /* __BUS_SPACE_HAS_STREAM_METHODS */
+
+#ifdef __BUS_SPACE_HAS_PROBING_METHODS
+ /* peek */
+ int (*bs_pe_1)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t *);
+ int (*bs_pe_2)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t *);
+ int (*bs_pe_4)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t *);
+ int (*bs_pe_8)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t *);
+
+ /* poke */
+ int (*bs_po_1)(void *, bus_space_handle_t,
+ bus_size_t, uint8_t);
+ int (*bs_po_2)(void *, bus_space_handle_t,
+ bus_size_t, uint16_t);
+ int (*bs_po_4)(void *, bus_space_handle_t,
+ bus_size_t, uint32_t);
+ int (*bs_po_8)(void *, bus_space_handle_t,
+ bus_size_t, uint64_t);
+#endif /* __BUS_SPACE_HAS_PROBING_METHODS */
+};
+
+#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
+
+/* Bus Space DMA macros */
+
+/*
+ * Private flags stored in the DMA map.
+ */
+#define _BUS_DMAMAP_COHERENT __BIT(16) /* no cache flush necessary on sync */
+#define _BUS_DMAMAP_IS_BOUNCING __BIT(17) /* is bouncing current xfer */
+#define _BUS_DMAMAP_NOALLOC __BIT(18) /* don't alloc memory from this range */
+
+/* Forwards needed by prototypes below. */
+struct mbuf;
+struct uio;
+
+typedef struct riscv_bus_dma_tag *bus_dma_tag_t;
+typedef struct riscv_bus_dmamap *bus_dmamap_t;
+
+#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
+
+/*
+ * bus_dma_segment_t
+ *
+ * Describes a single contiguous DMA transaction. Values
+ * are suitable for programming into DMA registers.
+ */
+struct riscv_bus_dma_segment {
+ /*
+ * PUBLIC MEMBERS: these are used by machine-independent code.
+ */
+ bus_addr_t ds_addr; /* DMA address */
+ bus_size_t ds_len; /* length of transfer */
+
+ /*
+ * PRIVATE MEMBERS:
+ */
+ uint32_t _ds_flags; /* _BUS_DMAMAP_COHERENT */
+};
+typedef struct riscv_bus_dma_segment bus_dma_segment_t;
+
+/*
+ * riscv_dma_range
+ *
+ * This structure describes a valid DMA range.
+ */
+struct riscv_dma_range {
+ bus_addr_t dr_sysbase; /* system base address */
+ bus_addr_t dr_busbase; /* appears here on bus */
+ bus_size_t dr_len; /* length of range */
+ uint32_t dr_flags; /* flags for range */
+};
+
+/*
+ * bus_dma_tag_t
+ *
+ * A machine-dependent opaque type describing the implementation of
+ * DMA for a given bus.
+ */
+
+struct riscv_bus_dma_tag {
+ /*
+ * DMA range for this tag. If the page doesn't fall within
+ * one of these ranges, an error is returned. The caller
+ * may then decide what to do with the transfer. If the
+ * range pointer is NULL, it is ignored.
+ */
+ struct riscv_dma_range *_ranges;
+ int _nranges;
+
+ /*
+ * Opaque cookie for use by back-end.
+ */
+ void *_cookie;
+
+ /*
+ * DMA mapping methods.
+ */
+ int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
+ bus_size_t, bus_size_t, int, bus_dmamap_t *);
+ void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
+ int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
+ bus_size_t, struct proc *, int);
+ int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
+ struct mbuf *, int);
+ int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
+ struct uio *, int);
+ int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
+ bus_dma_segment_t *, int, bus_size_t, int);
+ void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
+ void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
+ bus_addr_t, bus_size_t, int);
+
+ /*
+ * DMA memory utility functions.
+ */
+ int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
+ bus_size_t, bus_dma_segment_t *, int, int *, int);
+ void (*_dmamem_free)(bus_dma_tag_t,
+ bus_dma_segment_t *, int);
+ int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
+ int, size_t, void **, int);
+ void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
+ paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
+ int, off_t, int, int);
+
+ /*
+ * DMA tag utility functions
+ */
+ int (*_dmatag_subregion)(bus_dma_tag_t, bus_addr_t, bus_addr_t,
+ bus_dma_tag_t *, int);
+ void (*_dmatag_destroy)(bus_dma_tag_t);
+
+ /*
+ * State for bounce buffers
+ */
+ int _tag_needs_free;
+ int (*_may_bounce)(bus_dma_tag_t, bus_dmamap_t, int, int *);
+};
+
+/*
+ * bus_dmamap_t
+ *
+ * Describes a DMA mapping.
+ */
+struct riscv_bus_dmamap {
+ /*
+ * PRIVATE MEMBERS: not for use by machine-independent code.
+ */
+ bus_size_t _dm_size; /* largest DMA transfer mappable */
+ int _dm_segcnt; /* number of segs this map can map */
+ bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
+ bus_size_t _dm_boundary; /* don't cross this */
+ int _dm_flags; /* misc. flags */
+
+ void *_dm_origbuf; /* pointer to original buffer */
+ int _dm_buftype; /* type of buffer */
+ struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */
+
+ void *_dm_cookie; /* cookie for bus-specific functions */
+
+ /*
+ * PUBLIC MEMBERS: these are used by machine-independent code.
+ */
+
+ bus_size_t dm_maxsegsz; /* largest possible segment */
+ bus_size_t dm_mapsize; /* size of the mapping */
+ int dm_nsegs; /* # valid segments in mapping */
+ bus_dma_segment_t dm_segs[1]; /* segments; variable length */
+};
+
+/* _dm_buftype */
+#define _BUS_DMA_BUFTYPE_INVALID 0
+#define _BUS_DMA_BUFTYPE_LINEAR 1
+#define _BUS_DMA_BUFTYPE_MBUF 2
+#define _BUS_DMA_BUFTYPE_UIO 3
+#define _BUS_DMA_BUFTYPE_RAW 4
+
+#ifdef _RISCV_BUS_DMA_PRIVATE
+/*
+ * Cookie used for bounce buffers. A pointer to one of these it stashed in
+ * the DMA map.
+ */
+struct riscv_bus_dma_cookie {
+ int id_flags; /* flags; see below */
+
+ /*
+ * Information about the original buffer used during
+ * DMA map syncs. Note that origibuflen is only used
+ * for ID_BUFTYPE_LINEAR.
+ */
+ union {
+ void *un_origbuf; /* pointer to orig buffer if
+ bouncing */
+ char *un_linearbuf;
+ struct mbuf *un_mbuf;
+ struct uio *un_uio;
+ } id_origbuf_un;
+#define id_origbuf id_origbuf_un.un_origbuf
+#define id_origlinearbuf id_origbuf_un.un_linearbuf
+#define id_origmbuf id_origbuf_un.un_mbuf
+#define id_origuio id_origbuf_un.un_uio
+ bus_size_t id_origbuflen; /* ...and size */
+
+ void *id_bouncebuf; /* pointer to the bounce buffer */
+ bus_size_t id_bouncebuflen; /* ...and size */
+ int id_nbouncesegs; /* number of valid bounce segs */
+ bus_dma_segment_t
+ id_bouncesegs[0];/* array of bounce buffer */
+ /* ... physical memory segments */
+};
+
+/* id_flags */
+#define _BUS_DMA_IS_BOUNCING __BIT(2) /* is bouncing current xfer */
+#define _BUS_DMA_HAS_BOUNCE __BIT(1) /* has bounce buffers */
+#endif /* _RISCV_BUS_DMA_PRIVATE */
+#define _BUS_DMA_MIGHT_NEED_BOUNCE __BIT(0) /* may need bounce buffers */
+
+#endif /* _RISCV_BUS_DEFS_H_ */
Index: src/sys/arch/riscv/include/bus_funcs.h
diff -u /dev/null src/sys/arch/riscv/include/bus_funcs.h:1.1
--- /dev/null Sun Sep 11 15:31:12 2022
+++ src/sys/arch/riscv/include/bus_funcs.h Sun Sep 11 15:31:12 2022
@@ -0,0 +1,735 @@
+/* $NetBSD: bus_funcs.h,v 1.1 2022/09/11 15:31:12 skrll Exp $ */
+
+/*-
+ * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RISCV_BUS_FUNCS_H_
+#define _RISCV_BUS_FUNCS_H_
+
+/*
+ * Utility macros; INTERNAL USE ONLY.
+ */
+#define __bs_c(a,b) __CONCAT(a,b)
+#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
+
+#define __bs_rs(sz, t, h, o) \
+ (*(t)->__bs_opname(r,sz))(t, h, o)
+#define __bs_ws(sz, t, h, o, v) \
+ (*(t)->__bs_opname(w,sz))(t, h, o, v)
+#define __bs_nonsingle(type, sz, t, h, o, a, c) \
+ (*(t)->__bs_opname(type,sz))(t, h, o, a, c)
+#define __bs_set(type, sz, t, h, o, v, c) \
+ (*(t)->__bs_opname(type,sz))(t, h, o, v, c)
+#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \
+ (*(t)->__bs_opname(c,sz))(t, h1, o1, h2, o2, cnt)
+
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+#define __bs_opname_s(op,size) __bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
+#define __bs_rs_s(sz, t, h, o) \
+ (*(t)->__bs_opname_s(r,sz))(t, h, o)
+#define __bs_ws_s(sz, t, h, o, v) \
+ (*(t)->__bs_opname_s(w,sz))(t, h, o, v)
+#define __bs_nonsingle_s(type, sz, t, h, o, a, c) \
+ (*(t)->__bs_opname_s(type,sz))(t, h, o, a, c)
+#define __bs_set_s(type, sz, t, h, o, v, c) \
+ (*(t)->__bs_opname_s(type,sz))(t, h, o, v, c)
+#define __bs_copy_s(sz, t, h1, o1, h2, o2, cnt) \
+ (*(t)->__bs_opname_s(c,sz))(t, h1, o1, h2, o2, cnt)
+#endif
+
+#ifdef __BUS_SPACE_HAS_PROBING_METHODS
+#define __bs_pe(sz, t, h, o, v) \
+ (*(t)->__bs_opname(pe,sz))(t, h, o, v)
+#define __bs_po(sz, t, h, o, v) \
+ (*(t)->__bs_opname(po,sz))(t, h, o, v)
+#endif
+
+/*
+ * Mapping and unmapping operations.
+ */
+#define bus_space_map(t, a, s, c, hp) \
+ (*(t)->bs_map)((t), (a), (s), (c), (hp))
+#define bus_space_unmap(t, h, s) \
+ (*(t)->bs_unmap)((t), (h), (s))
+#define bus_space_subregion(t, h, o, s, hp) \
+ (*(t)->bs_subregion)((t), (h), (o), (s), (hp))
+
+
+/*
+ * Allocation and deallocation operations.
+ */
+#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \
+ (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), \
+ (c), (ap), (hp))
+#define bus_space_free(t, h, s) \
+ (*(t)->bs_free)((t), (h), (s))
+
+/*
+ * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
+ */
+#define bus_space_vaddr(t, h) \
+ (*(t)->bs_vaddr)((t), (h))
+
+/*
+ * MMap bus space for a user application.
+ */
+#define bus_space_mmap(t, a, o, p, f) \
+ (*(t)->bs_mmap)((t), (a), (o), (p), (f))
+
+/*
+ * Bus barrier operations.
+ */
+#define bus_space_barrier(t, h, o, l, f) \
+ (*(t)->bs_barrier)((t), (h), (o), (l), (f))
+
+/*
+ * Bus read (single) operations.
+ */
+#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o))
+#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o))
+#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o))
+#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o))
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+#define bus_space_read_stream_1(t, h, o) __bs_rs_s(1,(t),(h),(o))
+#define bus_space_read_stream_2(t, h, o) __bs_rs_s(2,(t),(h),(o))
+#define bus_space_read_stream_4(t, h, o) __bs_rs_s(4,(t),(h),(o))
+#define bus_space_read_stream_8(t, h, o) __bs_rs_s(8,(t),(h),(o))
+#endif
+
+
+/*
+ * Bus read multiple operations.
+ */
+#define bus_space_read_multi_1(t, h, o, a, c) \
+ __bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_2(t, h, o, a, c) \
+ __bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_4(t, h, o, a, c) \
+ __bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_8(t, h, o, a, c) \
+ __bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+#define bus_space_read_multi_stream_1(t, h, o, a, c) \
+ __bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_2(t, h, o, a, c) \
+ __bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_4(t, h, o, a, c) \
+ __bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_8(t, h, o, a, c) \
+ __bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c))
+#endif
+
+
+/*
+ * Bus read region operations.
+ */
+#define bus_space_read_region_1(t, h, o, a, c) \
+ __bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_2(t, h, o, a, c) \
+ __bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_4(t, h, o, a, c) \
+ __bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_8(t, h, o, a, c) \
+ __bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+#define bus_space_read_region_stream_1(t, h, o, a, c) \
+ __bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_2(t, h, o, a, c) \
+ __bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_4(t, h, o, a, c) \
+ __bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_8(t, h, o, a, c) \
+ __bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c))
+#endif
+
+
+/*
+ * Bus write (single) operations.
+ */
+#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
+#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
+#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
+#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+#define bus_space_write_stream_1(t, h, o, v) __bs_ws_s(1,(t),(h),(o),(v))
+#define bus_space_write_stream_2(t, h, o, v) __bs_ws_s(2,(t),(h),(o),(v))
+#define bus_space_write_stream_4(t, h, o, v) __bs_ws_s(4,(t),(h),(o),(v))
+#define bus_space_write_stream_8(t, h, o, v) __bs_ws_s(8,(t),(h),(o),(v))
+#endif
+
+
+/*
+ * Bus write multiple operations.
+ */
+#define bus_space_write_multi_1(t, h, o, a, c) \
+ __bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_2(t, h, o, a, c) \
+ __bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_4(t, h, o, a, c) \
+ __bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_8(t, h, o, a, c) \
+ __bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+#define bus_space_write_multi_stream_1(t, h, o, a, c) \
+ __bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_2(t, h, o, a, c) \
+ __bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_4(t, h, o, a, c) \
+ __bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_8(t, h, o, a, c) \
+ __bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c))
+#endif
+
+
+/*
+ * Bus write region operations.
+ */
+#define bus_space_write_region_1(t, h, o, a, c) \
+ __bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_2(t, h, o, a, c) \
+ __bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_4(t, h, o, a, c) \
+ __bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_8(t, h, o, a, c) \
+ __bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+#define bus_space_write_region_stream_1(t, h, o, a, c) \
+ __bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_2(t, h, o, a, c) \
+ __bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_4(t, h, o, a, c) \
+ __bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_8(t, h, o, a, c) \
+ __bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c))
+#endif
+
+
+/*
+ * Set multiple operations.
+ */
+#define bus_space_set_multi_1(t, h, o, v, c) \
+ __bs_set(sm,1,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_2(t, h, o, v, c) \
+ __bs_set(sm,2,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_4(t, h, o, v, c) \
+ __bs_set(sm,4,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_8(t, h, o, v, c) \
+ __bs_set(sm,8,(t),(h),(o),(v),(c))
+
+/*
+ * Set region operations.
+ */
+#define bus_space_set_region_1(t, h, o, v, c) \
+ __bs_set(sr,1,(t),(h),(o),(v),(c))
+#define bus_space_set_region_2(t, h, o, v, c) \
+ __bs_set(sr,2,(t),(h),(o),(v),(c))
+#define bus_space_set_region_4(t, h, o, v, c) \
+ __bs_set(sr,4,(t),(h),(o),(v),(c))
+#define bus_space_set_region_8(t, h, o, v, c) \
+ __bs_set(sr,8,(t),(h),(o),(v),(c))
+
+/*
+ * Copy operations.
+ */
+#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
+ __bs_copy(1, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
+ __bs_copy(2, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
+ __bs_copy(4, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
+ __bs_copy(8, t, h1, o1, h2, o2, c)
+
+/*
+ * Probing operations.
+ */
+#ifdef __BUS_SPACE_HAS_PROBING_METHODS
+#define bus_space_peek_1(t, h, o, p) __bs_pe(1,(t),(h),(o),(p))
+#define bus_space_peek_2(t, h, o, p) __bs_pe(2,(t),(h),(o),(p))
+#define bus_space_peek_4(t, h, o, p) __bs_pe(4,(t),(h),(o),(p))
+#define bus_space_peek_8(t, h, o, p) __bs_pe(8,(t),(h),(o),(p))
+
+#define bus_space_poke_1(t, h, o, v) __bs_po(1,(t),(h),(o),(v))
+#define bus_space_poke_2(t, h, o, v) __bs_po(2,(t),(h),(o),(v))
+#define bus_space_poke_4(t, h, o, v) __bs_po(4,(t),(h),(o),(v))
+#define bus_space_poke_8(t, h, o, v) __bs_po(8,(t),(h),(o),(v))
+#endif
+
+/*
+ * Macros to provide prototypes for all the functions used in the
+ * bus_space structure
+ */
+
+#define bs_map_proto(f) \
+int __bs_c(f,_bs_map)(void *t, bus_addr_t addr, \
+ bus_size_t size, int cacheable, bus_space_handle_t *bshp);
+
+#define bs_unmap_proto(f) \
+void __bs_c(f,_bs_unmap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t size);
+
+#define bs_subregion_proto(f) \
+int __bs_c(f,_bs_subregion)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, bus_size_t size, \
+ bus_space_handle_t *nbshp);
+
+#define bs_alloc_proto(f) \
+int __bs_c(f,_bs_alloc)(void *t, bus_addr_t rstart, \
+ bus_addr_t rend, bus_size_t size, bus_size_t align, \
+ bus_size_t boundary, int cacheable, bus_addr_t *addrp, \
+ bus_space_handle_t *bshp);
+
+#define bs_free_proto(f) \
+void __bs_c(f,_bs_free)(void *t, bus_space_handle_t bsh, \
+ bus_size_t size);
+
+#define bs_vaddr_proto(f) \
+void * __bs_c(f,_bs_vaddr)(void *t, bus_space_handle_t bsh);
+
+#define bs_mmap_proto(f) \
+paddr_t __bs_c(f,_bs_mmap)(void *, bus_addr_t, off_t, int, int);
+
+#define bs_barrier_proto(f) \
+void __bs_c(f,_bs_barrier)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, bus_size_t len, int flags);
+
+#define bs_r_1_proto(f) \
+uint8_t __bs_c(f,_bs_r_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_2_proto(f) \
+uint16_t __bs_c(f,_bs_r_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset); \
+uint16_t __bs_c(f,_bs_r_2_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_4_proto(f) \
+uint32_t __bs_c(f,_bs_r_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset); \
+uint32_t __bs_c(f,_bs_r_4_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_8_proto(f) \
+uint64_t __bs_c(f,_bs_r_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset); \
+uint64_t __bs_c(f,_bs_r_8_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_w_1_proto(f) \
+void __bs_c(f,_bs_w_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t value);
+
+#define bs_w_2_proto(f) \
+void __bs_c(f,_bs_w_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value); \
+void __bs_c(f,_bs_w_2_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value);
+
+#define bs_w_4_proto(f) \
+void __bs_c(f,_bs_w_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value); \
+void __bs_c(f,_bs_w_4_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value);
+
+#define bs_w_8_proto(f) \
+void __bs_c(f,_bs_w_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value); \
+void __bs_c(f,_bs_w_8_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value);
+
+#define bs_rm_1_proto(f) \
+void __bs_c(f,_bs_rm_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+
+#define bs_rm_2_proto(f) \
+void __bs_c(f,_bs_rm_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t *addr, bus_size_t count); \
+void __bs_c(f,_bs_rm_2_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t *addr, bus_size_t count);
+
+#define bs_rm_4_proto(f) \
+void __bs_c(f,_bs_rm_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t *addr, bus_size_t count); \
+void __bs_c(f,_bs_rm_4_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t *addr, bus_size_t count);
+
+#define bs_rm_8_proto(f) \
+void __bs_c(f,_bs_rm_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t *addr, bus_size_t count); \
+void __bs_c(f,_bs_rm_8_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t *addr, bus_size_t count);
+
+#define bs_wm_1_proto(f) \
+void __bs_c(f,_bs_wm_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint8_t *addr, bus_size_t count); \
+
+#define bs_wm_2_proto(f) \
+void __bs_c(f,_bs_wm_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint16_t *addr, bus_size_t count); \
+void __bs_c(f,_bs_wm_2_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint16_t *addr, bus_size_t count);
+
+#define bs_wm_4_proto(f) \
+void __bs_c(f,_bs_wm_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint32_t *addr, bus_size_t count); \
+void __bs_c(f,_bs_wm_4_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint32_t *addr, bus_size_t count);
+
+#define bs_wm_8_proto(f) \
+void __bs_c(f,_bs_wm_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint64_t *addr, bus_size_t count); \
+void __bs_c(f,_bs_wm_8_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint64_t *addr, bus_size_t count);
+
+#define bs_rr_1_proto(f) \
+void __bs_c(f, _bs_rr_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+
+#define bs_rr_2_proto(f) \
+void __bs_c(f, _bs_rr_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t *addr, bus_size_t count); \
+void __bs_c(f, _bs_rr_2_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t *addr, bus_size_t count);
+
+#define bs_rr_4_proto(f) \
+void __bs_c(f, _bs_rr_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t *addr, bus_size_t count); \
+void __bs_c(f, _bs_rr_4_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t *addr, bus_size_t count);
+
+#define bs_rr_8_proto(f) \
+void __bs_c(f, _bs_rr_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t *addr, bus_size_t count); \
+void __bs_c(f, _bs_rr_8_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t *addr, bus_size_t count);
+
+#define bs_wr_1_proto(f) \
+void __bs_c(f, _bs_wr_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+
+#define bs_wr_2_proto(f) \
+void __bs_c(f, _bs_wr_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint16_t *addr, bus_size_t count); \
+void __bs_c(f, _bs_wr_2_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint16_t *addr, bus_size_t count);
+
+#define bs_wr_4_proto(f) \
+void __bs_c(f, _bs_wr_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint32_t *addr, bus_size_t count); \
+void __bs_c(f, _bs_wr_4_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint32_t *addr, bus_size_t count);
+
+#define bs_wr_8_proto(f) \
+void __bs_c(f, _bs_wr_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint64_t *addr, bus_size_t count); \
+void __bs_c(f, _bs_wr_8_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint64_t *addr, bus_size_t count);
+
+#define bs_sm_1_proto(f) \
+void __bs_c(f,_bs_sm_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t value, bus_size_t count);
+
+#define bs_sm_2_proto(f) \
+void __bs_c(f,_bs_sm_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value, bus_size_t count); \
+void __bs_c(f,_bs_sm_2_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value, bus_size_t count);
+
+#define bs_sm_4_proto(f) \
+void __bs_c(f,_bs_sm_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value, bus_size_t count); \
+void __bs_c(f,_bs_sm_4_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value, bus_size_t count);
+
+#define bs_sm_8_proto(f) \
+void __bs_c(f,_bs_sm_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value, bus_size_t count); \
+void __bs_c(f,_bs_sm_8_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value, bus_size_t count);
+
+#define bs_sr_1_proto(f) \
+void __bs_c(f,_bs_sr_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t value, bus_size_t count);
+
+#define bs_sr_2_proto(f) \
+void __bs_c(f,_bs_sr_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value, bus_size_t count); \
+void __bs_c(f,_bs_sr_2_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value, bus_size_t count);
+
+#define bs_sr_4_proto(f) \
+void __bs_c(f,_bs_sr_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value, bus_size_t count); \
+void __bs_c(f,_bs_sr_4_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value, bus_size_t count);
+
+#define bs_sr_8_proto(f) \
+void __bs_c(f,_bs_sr_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value, bus_size_t count); \
+void __bs_c(f,_bs_sr_8_swap)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value, bus_size_t count);
+
+#define bs_c_1_proto(f) \
+void __bs_c(f,_bs_c_1)(void *t, bus_space_handle_t bsh1, \
+ bus_size_t offset1, bus_space_handle_t bsh2, \
+ bus_size_t offset2, bus_size_t count);
+
+#define bs_c_2_proto(f) \
+void __bs_c(f,_bs_c_2)(void *t, bus_space_handle_t bsh1, \
+ bus_size_t offset1, bus_space_handle_t bsh2, \
+ bus_size_t offset2, bus_size_t count);
+
+#define bs_c_4_proto(f) \
+void __bs_c(f,_bs_c_4)(void *t, bus_space_handle_t bsh1, \
+ bus_size_t offset1, bus_space_handle_t bsh2, \
+ bus_size_t offset2, bus_size_t count);
+
+#define bs_c_8_proto(f) \
+void __bs_c(f,_bs_c_8)(void *t, bus_space_handle_t bsh1, \
+ bus_size_t offset1, bus_space_handle_t bsh2, \
+ bus_size_t offset2, bus_size_t count);
+
+#define bs_pe_1_proto(f) \
+int __bs_c(f,_bs_pe_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t *datap);
+
+#define bs_pe_2_proto(f) \
+int __bs_c(f,_bs_pe_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t *datap); \
+
+#define bs_pe_4_proto(f) \
+int __bs_c(f,_bs_pe_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t *datap); \
+
+#define bs_pe_8_proto(f) \
+int __bs_c(f,_bs_pe_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t *datap); \
+
+#define bs_po_1_proto(f) \
+int __bs_c(f,_bs_po_1)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t value);
+
+#define bs_po_2_proto(f) \
+int __bs_c(f,_bs_po_2)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value); \
+
+#define bs_po_4_proto(f) \
+int __bs_c(f,_bs_po_4)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value); \
+
+#define bs_po_8_proto(f) \
+int __bs_c(f,_bs_po_8)(void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value); \
+
+
+#define bs_protos(f) \
+bs_map_proto(f); \
+bs_unmap_proto(f); \
+bs_subregion_proto(f); \
+bs_alloc_proto(f); \
+bs_free_proto(f); \
+bs_vaddr_proto(f); \
+bs_mmap_proto(f); \
+bs_barrier_proto(f); \
+bs_r_1_proto(f); \
+bs_r_2_proto(f); \
+bs_r_4_proto(f); \
+bs_r_8_proto(f); \
+bs_w_1_proto(f); \
+bs_w_2_proto(f); \
+bs_w_4_proto(f); \
+bs_w_8_proto(f); \
+bs_rm_1_proto(f); \
+bs_rm_2_proto(f); \
+bs_rm_4_proto(f); \
+bs_rm_8_proto(f); \
+bs_wm_1_proto(f); \
+bs_wm_2_proto(f); \
+bs_wm_4_proto(f); \
+bs_wm_8_proto(f); \
+bs_rr_1_proto(f); \
+bs_rr_2_proto(f); \
+bs_rr_4_proto(f); \
+bs_rr_8_proto(f); \
+bs_wr_1_proto(f); \
+bs_wr_2_proto(f); \
+bs_wr_4_proto(f); \
+bs_wr_8_proto(f); \
+bs_sm_1_proto(f); \
+bs_sm_2_proto(f); \
+bs_sm_4_proto(f); \
+bs_sm_8_proto(f); \
+bs_sr_1_proto(f); \
+bs_sr_2_proto(f); \
+bs_sr_4_proto(f); \
+bs_sr_8_proto(f); \
+bs_c_1_proto(f); \
+bs_c_2_proto(f); \
+bs_c_4_proto(f); \
+bs_c_8_proto(f); \
+bs_pe_1_proto(f); \
+bs_pe_2_proto(f); \
+bs_pe_4_proto(f); \
+bs_pe_8_proto(f); \
+bs_po_1_proto(f); \
+bs_po_2_proto(f); \
+bs_po_4_proto(f); \
+bs_po_8_proto(f);
+
+/* Bus Space DMA macros */
+
+/* Forwards needed by prototypes below. */
+struct mbuf;
+struct uio;
+
+int bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, bus_size_t,
+ int, bus_dmamap_t *);
+void bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
+int bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t,
+ struct proc *, int);
+int bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
+int bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
+int bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *,
+ int, bus_size_t, int);
+void bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
+void bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, bus_size_t, int);
+
+#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
+ (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
+#define bus_dmamem_free(t, sg, n) \
+ (*(t)->_dmamem_free)((t), (sg), (n))
+#define bus_dmamem_map(t, sg, n, s, k, f) \
+ (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
+#define bus_dmamem_unmap(t, k, s) \
+ (*(t)->_dmamem_unmap)((t), (k), (s))
+#define bus_dmamem_mmap(t, sg, n, o, p, f) \
+ (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
+
+#define bus_dmatag_subregion(t, mna, mxa, nt, f) \
+ (*(t)->_dmatag_subregion)((t), (mna), (mxa), (nt), (f))
+#define bus_dmatag_destroy(t) \
+ (*(t)->_dmatag_destroy)(t)
+
+#ifdef _RISCV_BUS_DMA_PRIVATE
+
+int riscv_dma_range_intersect(struct riscv_dma_range *, int,
+ paddr_t pa, psize_t size, paddr_t *pap, psize_t *sizep);
+
+int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
+ bus_size_t, int, bus_dmamap_t *);
+void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
+int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
+ bus_size_t, struct proc *, int);
+int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
+ struct mbuf *, int);
+int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
+ struct uio *, int);
+int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
+ bus_dma_segment_t *, int, bus_size_t, int);
+void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
+void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
+ bus_size_t, int);
+
+#define _BUS_DMAMAP_FUNCS \
+ ._dmamap_create = _bus_dmamap_create, \
+ ._dmamap_destroy = _bus_dmamap_destroy, \
+ ._dmamap_load = _bus_dmamap_load, \
+ ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, \
+ ._dmamap_load_raw = _bus_dmamap_load_raw, \
+ ._dmamap_load_uio = _bus_dmamap_load_uio, \
+ ._dmamap_unload = _bus_dmamap_unload, \
+ ._dmamap_sync = _bus_dmamap_sync
+
+int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
+ bus_size_t alignment, bus_size_t boundary,
+ bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
+void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
+ int nsegs);
+int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
+ int nsegs, size_t size, void **kvap, int flags);
+void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
+ size_t size);
+paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
+ int nsegs, off_t off, int prot, int flags);
+
+#define _BUS_DMAMEM_FUNCS \
+ ._dmamem_alloc = _bus_dmamem_alloc, \
+ ._dmamem_free = _bus_dmamem_free, \
+ ._dmamem_map = _bus_dmamem_map, \
+ ._dmamem_unmap = _bus_dmamem_unmap, \
+ ._dmamem_mmap = _bus_dmamem_mmap
+
+int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
+ bus_size_t alignment, bus_size_t boundary,
+ bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
+ vaddr_t low, vaddr_t high);
+
+int _bus_dmatag_subregion(bus_dma_tag_t, bus_addr_t, bus_addr_t,
+ bus_dma_tag_t *, int);
+void _bus_dmatag_destroy(bus_dma_tag_t);
+
+#define _BUS_DMATAG_FUNCS \
+ ._dmatag_subregion = _bus_dmatag_subregion, \
+ ._dmatag_destroy = _bus_dmatag_destroy
+
+#endif /* _RISCV_BUS_DMA_PRIVATE */
+
+#endif /* _RISCV_BUS_FUNCS_H_ */
Index: src/sys/arch/riscv/riscv/bus_space.c
diff -u /dev/null src/sys/arch/riscv/riscv/bus_space.c:1.1
--- /dev/null Sun Sep 11 15:31:12 2022
+++ src/sys/arch/riscv/riscv/bus_space.c Sun Sep 11 15:31:12 2022
@@ -0,0 +1,256 @@
+/* $NetBSD: bus_space.c,v 1.1 2022/09/11 15:31:12 skrll Exp $ */
+
+/*-
+ * Copyright (c) 2022 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Nick Hudson
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.1 2022/09/11 15:31:12 skrll Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <riscv/bus_funcs.h>
+
+/* Prototypes for all the bus_space structure functions */
+bs_protos(generic);
+bs_protos(bs_notimpl);
+
+#ifdef _LP64
+
+#define GENERIC_BS_R_8 generic_bs_r_8
+#define GENERIC_BS_RM_8 generic_bs_rm_8
+#define GENERIC_BS_W_8 generic_bs_w_8
+#define GENERIC_BS_WM_8 generic_bs_wm_8
+
+#else
+
+#define GENERIC_BS_R_8 bs_notimpl_bs_r_8
+#define GENERIC_BS_RM_8 bs_notimpl_bs_rm_8
+#define GENERIC_BS_W_8 bs_notimpl_bs_w_8
+#define GENERIC_BS_WM_8 bs_notimpl_bs_wm_8
+
+#endif
+
+struct bus_space riscv_generic_bs_tag = {
+ .bs_stride = 0,
+
+ .bs_map = generic_bs_map,
+ .bs_unmap = generic_bs_unmap,
+ .bs_subregion = generic_bs_subregion,
+ .bs_alloc = generic_bs_alloc,
+ .bs_free = generic_bs_free,
+ .bs_vaddr = generic_bs_vaddr,
+ .bs_mmap = generic_bs_mmap,
+ .bs_barrier = generic_bs_barrier,
+
+ /* read */
+ .bs_r_1 = generic_bs_r_1,
+ .bs_r_2 = generic_bs_r_2,
+ .bs_r_4 = generic_bs_r_4,
+ .bs_r_8 = GENERIC_BS_R_8,
+
+ /* write */
+ .bs_w_1 = generic_bs_w_1,
+ .bs_w_2 = generic_bs_w_2,
+ .bs_w_4 = generic_bs_w_4,
+ .bs_w_8 = GENERIC_BS_W_8,
+
+ /* read region */
+ .bs_rr_1 = generic_bs_rr_1,
+ .bs_rr_2 = bs_notimpl_bs_rr_2,
+ .bs_rr_4 = bs_notimpl_bs_rr_4,
+ .bs_rr_8 = bs_notimpl_bs_rr_8,
+
+ /* write region */
+ .bs_wr_1 = bs_notimpl_bs_wr_1,
+ .bs_wr_2 = bs_notimpl_bs_wr_2,
+ .bs_wr_4 = bs_notimpl_bs_wr_4,
+ .bs_wr_8 = bs_notimpl_bs_wr_8,
+
+ /* copy region */
+ .bs_c_1 = bs_notimpl_bs_c_1,
+ .bs_c_2 = bs_notimpl_bs_c_2,
+ .bs_c_4 = bs_notimpl_bs_c_4,
+ .bs_c_8 = bs_notimpl_bs_c_8,
+
+ /* set region */
+ .bs_sr_1 = bs_notimpl_bs_sr_1,
+ .bs_sr_2 = bs_notimpl_bs_sr_2,
+ .bs_sr_4 = bs_notimpl_bs_sr_4,
+ .bs_sr_8 = bs_notimpl_bs_sr_8,
+
+ /* read multi */
+ .bs_rm_1 = generic_bs_rm_1,
+ .bs_rm_2 = generic_bs_rm_2,
+ .bs_rm_4 = generic_bs_rm_4,
+ .bs_rm_8 = GENERIC_BS_RM_8,
+
+ /* write multi */
+ .bs_wm_1 = generic_bs_wm_1,
+ .bs_wm_2 = generic_bs_wm_2,
+ .bs_wm_4 = generic_bs_wm_4,
+ .bs_wm_8 = GENERIC_BS_WM_8,
+
+ /* set multi */
+ .bs_sm_1 = bs_notimpl_bs_sm_1,
+ .bs_sm_2 = bs_notimpl_bs_sm_2,
+ .bs_sm_4 = bs_notimpl_bs_sm_4,
+ .bs_sm_8 = bs_notimpl_bs_sm_8,
+
+#ifdef __BUS_SPACE_HAS_STREAM_METHODS
+ /* read stream */
+ .bs_r_1_s = generic_bs_r_1,
+ .bs_r_2_s = generic_bs_r_2,
+ .bs_r_4_s = generic_bs_r_4,
+ .bs_r_8_s = GENERIC_BS_R_8,
+
+ /* write stream */
+ .bs_w_1_s = generic_bs_w_1,
+ .bs_w_2_s = generic_bs_w_2,
+ .bs_w_4_s = generic_bs_w_4,
+ .bs_w_8_s = GENERIC_BS_W_8,
+
+ /* read region stream */
+ .bs_rr_1_s = generic_bs_rr_1,
+ .bs_rr_2_s = generic_bs_rr_2,
+ .bs_rr_4_s = bs_notimpl_bs_rr_4,
+ .bs_rr_8_s = bs_notimpl_bs_rr_8,
+
+ /* write region stream */
+ .bs_wr_1_s = bs_notimpl_bs_wr_1,
+ .bs_wr_2_s = bs_notimpl_bs_wr_2,
+ .bs_wr_4_s = bs_notimpl_bs_wr_4,
+ .bs_wr_8_s = bs_notimpl_bs_wr_8,
+
+ /* read multi stream */
+ .bs_rm_1_s = generic_bs_rm_1,
+ .bs_rm_2_s = generic_bs_rm_2,
+ .bs_rm_4_s = generic_bs_rm_4,
+ .bs_rm_8_s = GENERIC_BS_RM_8,
+
+ /* write multi stream */
+ .bs_wm_1_s = generic_bs_wm_1,
+ .bs_wm_2_s = generic_bs_wm_2,
+ .bs_wm_4_s = generic_bs_wm_4,
+ .bs_wm_8_s = GENERIC_BS_WM_8,
+#endif
+
+};
+
+int
+generic_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
+ bus_space_handle_t *bshp)
+{
+ paddr_t startpa, endpa, pa;
+ vaddr_t va;
+ int pmapflags;
+
+ startpa = trunc_page(bpa);
+ endpa = round_page(bpa + size);
+
+ /* XXX use extent manager to check duplicate mapping */
+
+ va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
+ UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
+ if (va == 0)
+ return ENOMEM;
+
+ *bshp = (bus_space_handle_t)(va + (bpa - startpa));
+
+ pmapflags = 0;
+
+ for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
+ pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
+ }
+ pmap_update(pmap_kernel());
+
+ return 0;
+}
+
+void
+generic_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
+{
+ vaddr_t va;
+ vsize_t sz;
+
+ va = trunc_page(bsh);
+ sz = round_page(bsh + size) - va;
+
+ pmap_kremove(va, sz);
+ pmap_update(pmap_kernel());
+ uvm_km_free(kernel_map, va, sz, UVM_KMF_VAONLY);
+}
+
+
+int
+generic_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
+ bus_size_t size, bus_space_handle_t *nbshp)
+{
+ *nbshp = bsh + (offset << ((struct bus_space *)t)->bs_stride);
+ return 0;
+}
+
+void
+generic_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
+ bus_size_t len, int flags)
+{
+}
+
+void *
+generic_bs_vaddr(void *t, bus_space_handle_t bsh)
+{
+ return (void *)bsh;
+}
+
+paddr_t
+generic_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
+{
+ paddr_t bus_flags = 0;
+
+ return (atop(bpa + (offset << ((struct bus_space *)t)->bs_stride)) |
+ bus_flags);
+}
+
+int
+generic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
+ bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
+ bus_addr_t *bpap, bus_space_handle_t *bshp)
+{
+ panic("%s(): not implemented\n", __func__);
+}
+
+void
+generic_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
+{
+ panic("%s(): not implemented\n", __func__);
+}
+
Index: src/sys/arch/riscv/riscv/bus_space_generic.S
diff -u /dev/null src/sys/arch/riscv/riscv/bus_space_generic.S:1.1
--- /dev/null Sun Sep 11 15:31:12 2022
+++ src/sys/arch/riscv/riscv/bus_space_generic.S Sun Sep 11 15:31:12 2022
@@ -0,0 +1,381 @@
+/* $NetBSD: bus_space_generic.S,v 1.1 2022/09/11 15:31:12 skrll Exp $ */
+
+/*-
+ * Copyright (c) 2022 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Nick Hudson
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include <riscv/asm.h>
+#include "assym.h"
+
+RCSID("$NetBSD: bus_space_generic.S,v 1.1 2022/09/11 15:31:12 skrll Exp $")
+
+
+/* void bs_c_1(a0: tag, a1: src, srcoffset, dst, dstoffset, count); */
+/* void bs_c_2(a0: tag, a1: src, srcoffset, dst, dstoffset, count); */
+/* void bs_c_4(a0: tag, a1: src, srcoffset, dst, dstoffset, count); */
+/* void bs_c_8(a0: tag, a1: src, srcoffset, dst, dstoffset, count); */
+
+/* void bs_sr_1(a0: tag, a1: addr, a2: offset, a3: value, a4: count); */
+/* void bs_sr_2(a0: tag, a1: addr, a2: offset, a3: value, a4: count); */
+/* void bs_sr_4(a0: tag, a1: addr, a2: offset, a3: value, a4: count); */
+/* void bs_sr_8(a0: tag, a1: addr, a2: offset, a3: value, a4: count); */
+
+
+/* uint8_t bs_r_1(a0: tag, a1: addr, a2: offset); */
+ENTRY_NP(generic_bs_r_1)
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+ lbu a0, 0(a2) /* load 8-bit */
+ ret
+END(generic_bs_r_1)
+
+
+/* uint16_t bs_r_2(a0: tag, a1: addr, a2: offset); */
+ENTRY_NP(generic_bs_r_2)
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+ lhu a0, 0(a2) /* load 16-bit */
+ ret
+END(generic_bs_r_2)
+
+
+/* uint32_t bs_r_4(a0: tag, a1: addr, a2: offset); */
+ENTRY_NP(generic_bs_r_4)
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+ lw a0, 0(a2) /* load 32-bit */
+ ret
+END(generic_bs_r_4)
+
+
+#ifdef _LP64
+/* uint64_t bs_r_8(a0: tag, a1: addr, a2: offset); */
+ENTRY_NP(generic_bs_r_8)
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+ ld a0, 0(a2) /* load 64-bit */
+ ret
+END(generic_bs_r_4)
+#endif
+
+
+/* void bs_rm_1(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_rm_1)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ lbu a0, 0(a2) /* load 8-bit */
+ sb a0, 0(a3)
+ add a3, a3, 1
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_rm_1: count == 0"
+END(generic_bs_rm_1)
+
+
+/* void bs_rm_2(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_rm_2)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ lhu a0, 0(a2) /* load 16-bit */
+ sh a0, 0(a3) /* store 16-bit */
+ add a3, a3, 2
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_rm_2: count == 0"
+END(generic_bs_rm_2)
+
+
+/* void bs_rm_4(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_rm_4)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ lw a0, 0(a2) /* load 32-bit */
+ sw a0, 0(a3) /* store 32-bit */
+ add a3, a3, 4
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_rm_4: count == 0"
+END(generic_bs_rm_4)
+
+
+#ifdef _LP64
+/* void bs_rm_8(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_rm_8)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ ld a0, 0(a2) /* load 64-bit */
+ sd a0, 0(a3) /* store 64-bit */
+ add a3, a3, 8
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_rm_8: count == 0"
+END(generic_bs_rm_8)
+#endif
+
+
+/* void bs_rr_1(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_rr_1)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ li t0, 1
+ srl t0, t0, a5 /* delta = 1 << stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ lbu a0, 0(a2) /* load 8-bit */
+ sb a0, 0(a3) /* *dst = value */
+ add a2, a2, t0 /* src += delta */
+ add a3, a3, 1 /* dst++ */
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_rr_1: count == 0"
+END(generic_bs_rr_1)
+
+
+/* void bs_rr_2(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_rr_2)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ li t0, 1
+ srl t0, t0, a5 /* delta = 1 << stride */
+
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ lhu a0, 0(a2) /* load 16-bit */
+ sh a0, 0(a3) /* *dst = value */
+ add a2, a2, t0 /* src += delta */
+ add a3, a3, 2 /* dst++ */
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_rr_2: count == 0"
+END(generic_bs_rr_2)
+
+
+/* void bs_rr_4(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+/* void bs_rr_8(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+
+
+/* void bs_w_1(a0: tag, a1: addr, a2: offset, a3: value); */
+ENTRY_NP(generic_bs_w_1)
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+ sb a0, 0(a2) /* store 8-bit */
+ ret
+END(generic_bs_w_1)
+
+
+/* void bs_w_2(a0: tag, a1: addr, a2: offset, a3: value); */
+ENTRY_NP(generic_bs_w_2)
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+ sh a0 ,0(a2) /* store 16-bit */
+ ret
+END(generic_bs_w_2)
+
+
+/* void bs_w_4(a0: tag, a1: addr, a2: offset, a3: value); */
+ENTRY_NP(generic_bs_w_4)
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+ sw a0, 0(a2) /* store 32-bit */
+ ret
+END(generic_bs_w_4)
+
+
+#ifdef _LP64
+/* void bs_w_8(a0: tag, a1: addr, a2: offset, a3: value); */
+ENTRY_NP(generic_bs_w_8)
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+ sd a0, 0(a2) /* store 64-bit */
+ ret
+END(generic_bs_w_8)
+#endif
+
+
+/* void bs_wm_1(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_wm_1)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ lbu a0, 0(a3) /* load 8-bit */
+ sb a0, 0(a2)
+ add a3, a3, 1
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_wm_1: count == 0"
+END(generic_bs_wm_1)
+
+
+/* void bs_wm_2(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_wm_2)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ lhu a0, 0(a3) /* load 16-bit */
+ sh a0, 0(a2) /* store 16-bit */
+ add a3, a3, 2
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_wm_2: count == 0"
+END(generic_bs_wm_2)
+
+
+/* void bs_wm_4(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_wm_4)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ lw a0, 0(a3) /* load 32-bit */
+ sw a0, 0(a2) /* store 32-bit */
+ add a3, a3, 4
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_wm_4: count == 0"
+END(generic_bs_wm_4)
+
+
+#ifdef _LP64
+/* void bs_wm_8(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+ENTRY_NP(generic_bs_wm_8)
+#ifdef DIAGNOSTIC
+ beqz a4, 2f
+#endif
+ PTR_L a5, BS_STRIDE(a0) /* stride */
+ PTR_SLL a2, a2, a5 /* offset <<= stride */
+ PTR_ADD a2, a2, a1 /* add to address */
+1:
+ ld a0, 0(a3) /* load 64-bit */
+ sd a0, 0(a2) /* store 64-bit */
+ add a3, a3, 8
+ add a4, a4, -1 /* count-- */
+ bnez a4, 1b
+ ret
+2:
+ la x0, 3f
+ tail _C_LABEL(panic)
+3:
+ .asciz "_bs_wm_8: count == 0"
+END(generic_bs_wm_8)
+#endif
+
+/* void bs_wr_1(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+/* void bs_wr_2(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+/* void bs_wr_4(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
+/* void bs_wr_8(a0: tag, a1: addr, a2: offset, a3: datap, a4: count); */
Index: src/sys/arch/riscv/riscv/bus_space_notimpl.S
diff -u /dev/null src/sys/arch/riscv/riscv/bus_space_notimpl.S:1.1
--- /dev/null Sun Sep 11 15:31:12 2022
+++ src/sys/arch/riscv/riscv/bus_space_notimpl.S Sun Sep 11 15:31:12 2022
@@ -0,0 +1,187 @@
+/* $NetBSD: bus_space_notimpl.S,v 1.1 2022/09/11 15:31:12 skrll Exp $ */
+
+/*
+ * Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*-
+ * Copyright (c) 2022 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Nick Hudson
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include <machine/asm.h>
+
+ .option norelax
+
+#define NOT_IMPL(func, methodstr) \
+ .global _C_LABEL(func) ; \
+_C_LABEL(func): ; \
+ mv a2, a0 ; \
+ la a1, 1f ; \
+ la a0, .Lnotimpl_msg ; \
+ tail _C_LABEL(panic) ; \
+1: .asciz methodstr ; \
+ .align 2
+
+.Lnotimpl_msg:
+ .asciz "bus_space_%s() is not implemented on this tag: %p"; \
+
+
+/* misc */
+NOT_IMPL(bs_notimpl_bs_map, "map")
+NOT_IMPL(bs_notimpl_bs_unmap, "unmap")
+NOT_IMPL(bs_notimpl_bs_subregion, "subregion")
+NOT_IMPL(bs_notimpl_bs_alloc, "alloc")
+NOT_IMPL(bs_notimpl_bs_free, "free")
+NOT_IMPL(bs_notimpl_bs_vaddr, "vaddr")
+NOT_IMPL(bs_notimpl_bs_mmap, "mmap")
+NOT_IMPL(bs_notimpl_bs_barrier, "barrier")
+
+/* read */
+NOT_IMPL(bs_notimpl_bs_r_1, "read_1")
+NOT_IMPL(bs_notimpl_bs_r_2, "read_2")
+NOT_IMPL(bs_notimpl_bs_r_4, "read_4")
+NOT_IMPL(bs_notimpl_bs_r_8, "read_8")
+
+/* read_multi */
+NOT_IMPL(bs_notimpl_bs_rm_1, "read_multi_1")
+NOT_IMPL(bs_notimpl_bs_rm_2, "read_multi_2")
+NOT_IMPL(bs_notimpl_bs_rm_4, "read_multi_4")
+NOT_IMPL(bs_notimpl_bs_rm_8, "read_multi_8")
+
+/* read_region */
+NOT_IMPL(bs_notimpl_bs_rr_1, "read_region_1")
+NOT_IMPL(bs_notimpl_bs_rr_2, "read_region_2")
+NOT_IMPL(bs_notimpl_bs_rr_4, "read_region_4")
+NOT_IMPL(bs_notimpl_bs_rr_8, "read_region_8")
+
+/* set_multi */
+NOT_IMPL(bs_notimpl_bs_sm_1, "set_multi_1")
+NOT_IMPL(bs_notimpl_bs_sm_2, "set_multi_2")
+NOT_IMPL(bs_notimpl_bs_sm_4, "set_multi_4")
+NOT_IMPL(bs_notimpl_bs_sm_8, "set_multi_8")
+
+/* set_region */
+NOT_IMPL(bs_notimpl_bs_sr_1, "set_region_1")
+NOT_IMPL(bs_notimpl_bs_sr_2, "set_region_2")
+NOT_IMPL(bs_notimpl_bs_sr_4, "set_region_4")
+NOT_IMPL(bs_notimpl_bs_sr_8, "set_region_8")
+
+/* write */
+NOT_IMPL(bs_notimpl_bs_w_1, "write_1")
+NOT_IMPL(bs_notimpl_bs_w_2, "write_2")
+NOT_IMPL(bs_notimpl_bs_w_4, "write_4")
+NOT_IMPL(bs_notimpl_bs_w_8, "write_8")
+
+/* write_multi */
+NOT_IMPL(bs_notimpl_bs_wm_1, "write_multi_1")
+NOT_IMPL(bs_notimpl_bs_wm_2, "write_multi_2")
+NOT_IMPL(bs_notimpl_bs_wm_4, "write_multi_4")
+NOT_IMPL(bs_notimpl_bs_wm_8, "write_multi_8")
+
+/* write_region */
+NOT_IMPL(bs_notimpl_bs_wr_1, "write_region_1")
+NOT_IMPL(bs_notimpl_bs_wr_2, "write_region_2")
+NOT_IMPL(bs_notimpl_bs_wr_4, "write_region_4")
+NOT_IMPL(bs_notimpl_bs_wr_8, "write_region_8")
+
+/* copy_region */
+NOT_IMPL(bs_notimpl_bs_c_1, "copy_region_1")
+NOT_IMPL(bs_notimpl_bs_c_2, "copy_region_2")
+NOT_IMPL(bs_notimpl_bs_c_4, "copy_region_4")
+NOT_IMPL(bs_notimpl_bs_c_8, "copy_region_8")
+
+/* peek */
+NOT_IMPL(bs_notimpl_bs_pe_1, "peek_1")
+NOT_IMPL(bs_notimpl_bs_pe_2, "peek_2")
+NOT_IMPL(bs_notimpl_bs_pe_4, "peek_4")
+NOT_IMPL(bs_notimpl_bs_pe_8, "peek_8")
+
+/* poke */
+NOT_IMPL(bs_notimpl_bs_po_1, "poke_1")
+NOT_IMPL(bs_notimpl_bs_po_2, "poke_2")
+NOT_IMPL(bs_notimpl_bs_po_4, "poke_4")
+NOT_IMPL(bs_notimpl_bs_po_8, "poke_8")
+
+/* read_stream */
+NOT_IMPL(bs_notimpl_bs_r_1_s, "read_stream_1")
+NOT_IMPL(bs_notimpl_bs_r_2_s, "read_stream_2")
+NOT_IMPL(bs_notimpl_bs_r_4_s, "read_stream_4")
+NOT_IMPL(bs_notimpl_bs_r_8_s, "read_stream_8")
+
+/* write_stream */
+NOT_IMPL(bs_notimpl_bs_w_1_s, "write_stream_1")
+NOT_IMPL(bs_notimpl_bs_w_2_s, "write_stream_2")
+NOT_IMPL(bs_notimpl_bs_w_4_s, "write_stream_4")
+NOT_IMPL(bs_notimpl_bs_w_8_s, "write_stream_8")
+
+/* read_region_stream */
+NOT_IMPL(bs_notimpl_bs_rr_1_s, "read_region_stream_1")
+NOT_IMPL(bs_notimpl_bs_rr_2_s, "read_region_stream_2")
+NOT_IMPL(bs_notimpl_bs_rr_4_s, "read_region_stream_4")
+NOT_IMPL(bs_notimpl_bs_rr_8_s, "read_region_stream_8")
+
+/* write_region_stream */
+NOT_IMPL(bs_notimpl_bs_wr_1_s, "write_region_stream_1")
+NOT_IMPL(bs_notimpl_bs_wr_2_s, "write_region_stream_2")
+NOT_IMPL(bs_notimpl_bs_wr_4_s, "write_region_stream_4")
+NOT_IMPL(bs_notimpl_bs_wr_8_s, "write_region_stream_8")
+
+/* read_multi_stream */
+NOT_IMPL(bs_notimpl_bs_rm_1_s, "read_multi_stream_1")
+NOT_IMPL(bs_notimpl_bs_rm_2_s, "read_multi_stream_2")
+NOT_IMPL(bs_notimpl_bs_rm_4_s, "read_multi_stream_4")
+NOT_IMPL(bs_notimpl_bs_rm_8_s, "read_multi_stream_8")
+
+/* write_multi_stream */
+NOT_IMPL(bs_notimpl_bs_wm_1_s, "write_multi_stream_1")
+NOT_IMPL(bs_notimpl_bs_wm_2_s, "write_multi_stream_2")
+NOT_IMPL(bs_notimpl_bs_wm_4_s, "write_multi_stream_4")
+NOT_IMPL(bs_notimpl_bs_wm_8_s, "write_multi_stream_8")
