Module Name: src
Committed By: ryo
Date: Wed Jan 5 19:53:32 UTC 2022
Modified Files:
src/sys/arch/aarch64/include: armreg.h
src/usr.sbin/cpuctl/arch: aarch64.c
Log Message:
fix ID_AA64ISAR0_EL1.ATOMIC field definition
To generate a diff of this commit:
cvs rdiff -u -r1.59 -r1.60 src/sys/arch/aarch64/include/armreg.h
cvs rdiff -u -r1.15 -r1.16 src/usr.sbin/cpuctl/arch/aarch64.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/armreg.h
diff -u src/sys/arch/aarch64/include/armreg.h:1.59 src/sys/arch/aarch64/include/armreg.h:1.60
--- src/sys/arch/aarch64/include/armreg.h:1.59 Tue Oct 26 16:58:46 2021
+++ src/sys/arch/aarch64/include/armreg.h Wed Jan 5 19:53:32 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.59 2021/10/26 16:58:46 ryo Exp $ */
+/* $NetBSD: armreg.h,v 1.60 2022/01/05 19:53:32 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -290,7 +290,7 @@ AARCH64REG_READ_INLINE(id_aa64isar0_el1)
#define ID_AA64ISAR0_EL1_RDM_SQRDML 1
#define ID_AA64ISAR0_EL1_ATOMIC __BITS(23,20)
#define ID_AA64ISAR0_EL1_ATOMIC_NONE 0
-#define ID_AA64ISAR0_EL1_ATOMIC_SWP 1
+#define ID_AA64ISAR0_EL1_ATOMIC_SWP 2
#define ID_AA64ISAR0_EL1_CRC32 __BITS(19,16)
#define ID_AA64ISAR0_EL1_CRC32_NONE 0
#define ID_AA64ISAR0_EL1_CRC32_CRC32X 1
Index: src/usr.sbin/cpuctl/arch/aarch64.c
diff -u src/usr.sbin/cpuctl/arch/aarch64.c:1.15 src/usr.sbin/cpuctl/arch/aarch64.c:1.16
--- src/usr.sbin/cpuctl/arch/aarch64.c:1.15 Mon May 17 18:43:18 2021
+++ src/usr.sbin/cpuctl/arch/aarch64.c Wed Jan 5 19:53:32 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64.c,v 1.15 2021/05/17 18:43:18 riastradh Exp $ */
+/* $NetBSD: aarch64.c,v 1.16 2022/01/05 19:53:32 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu <r...@nerv.org>
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: aarch64.c,v 1.15 2021/05/17 18:43:18 riastradh Exp $");
+__RCSID("$NetBSD: aarch64.c,v 1.16 2022/01/05 19:53:32 ryo Exp $");
#endif /* no lint */
#include <sys/types.h>
@@ -303,7 +303,7 @@ struct fieldinfo id_aa64isar0_fieldinfo[
.bitpos = 20, .bitwidth = 4, .name = "Atomic",
.info = (const char *[16]) { /* 16=4bit */
[0] = "No Atomic",
- [1] = "LDADD/LDCLR/LDEOR/LDSET/LDSMAX/LDSMIN"
+ [2] = "LDADD/LDCLR/LDEOR/LDSET/LDSMAX/LDSMIN"
"/LDUMAX/LDUMIN/CAS/CASP/SWP",
}
},
