Module Name: src
Committed By: martin
Date: Sat Nov 16 16:30:10 UTC 2019
Modified Files:
src/sys/arch/arm/nvidia [netbsd-8]: tegra_xusb.c
src/sys/dev/pci [netbsd-8]: xhci_pci.c
src/sys/dev/usb [netbsd-8]: usb.c usbdivar.h xhci.c xhcireg.h
Log Message:
Pull up the following revisions, requested by msaitoh in ticket #1443:
sys/arch/arm/nvidia/tegra_xusb.c 1.13-1.14 via patch
sys/dev/pci/xhci_pci.c 1.13
sys/dev/usb/usb.c 1.169
sys/dev/usb/usbdivar.h 1.116
sys/dev/usb/xhci.c 1.93, 1.95, 1.97
sys/dev/usb/xhcireg.h 1.11-1.12
Detect USB 3.1
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/nvidia/tegra_xusb.c
cvs rdiff -u -r1.8.6.2 -r1.8.6.3 src/sys/dev/pci/xhci_pci.c
cvs rdiff -u -r1.165.6.4 -r1.165.6.5 src/sys/dev/usb/usb.c
cvs rdiff -u -r1.114.6.1 -r1.114.6.2 src/sys/dev/usb/usbdivar.h
cvs rdiff -u -r1.72.2.11 -r1.72.2.12 src/sys/dev/usb/xhci.c
cvs rdiff -u -r1.9.6.1 -r1.9.6.2 src/sys/dev/usb/xhcireg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/nvidia/tegra_xusb.c
diff -u src/sys/arch/arm/nvidia/tegra_xusb.c:1.6 src/sys/arch/arm/nvidia/tegra_xusb.c:1.6.2.1
--- src/sys/arch/arm/nvidia/tegra_xusb.c:1.6 Fri Apr 28 09:46:49 2017
+++ src/sys/arch/arm/nvidia/tegra_xusb.c Sat Nov 16 16:30:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_xusb.c,v 1.6 2017/04/28 09:46:49 jmcneill Exp $ */
+/* $NetBSD: tegra_xusb.c,v 1.6.2.1 2019/11/16 16:30:09 martin Exp $ */
/*
* Copyright (c) 2016 Jonathan A. Kollasch
@@ -30,7 +30,7 @@
#include "opt_tegra.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_xusb.c,v 1.6 2017/04/28 09:46:49 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_xusb.c,v 1.6.2.1 2019/11/16 16:30:09 martin Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -355,6 +355,29 @@ tegra_xusb_mountroot(device_t self)
DPRINTF(sc->sc_dev, "XUSB_FALC_CPUCTL 0x%x\n", val);
+ val = bus_space_read_4(bst, psc->sc_bsh_fpci, PCI_USBREV)
+ & PCI_USBREV_MASK;
+ switch (val) {
+ case PCI_USBREV_3_0:
+ sc->sc_bus.ub_revision = USBREV_3_0;
+ break;
+ case PCI_USBREV_3_1:
+ sc->sc_bus.ub_revision = USBREV_3_1;
+ break;
+ default:
+ if (val < PCI_USBREV_3_0) {
+ aprint_error_dev(self, "Unknown revision (%02x)\n",
+ val);
+ sc->sc_bus.ub_revision = USBREV_UNKNOWN;
+ } else {
+ /* Default to the latest revision */
+ aprint_normal_dev(self,
+ "Unknown revision (%02x). Set to 3.1.\n", val);
+ sc->sc_bus.ub_revision = USBREV_3_1;
+ }
+ break;
+ }
+
error = xhci_init(sc);
if (error) {
aprint_error_dev(self, "init failed, error=%d\n", error);
Index: src/sys/dev/pci/xhci_pci.c
diff -u src/sys/dev/pci/xhci_pci.c:1.8.6.2 src/sys/dev/pci/xhci_pci.c:1.8.6.3
--- src/sys/dev/pci/xhci_pci.c:1.8.6.2 Sun Jan 27 18:35:19 2019
+++ src/sys/dev/pci/xhci_pci.c Sat Nov 16 16:30:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: xhci_pci.c,v 1.8.6.2 2019/01/27 18:35:19 martin Exp $ */
+/* $NetBSD: xhci_pci.c,v 1.8.6.3 2019/11/16 16:30:09 martin Exp $ */
/* OpenBSD: xhci_pci.c,v 1.4 2014/07/12 17:38:51 yuo Exp */
/*
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: xhci_pci.c,v 1.8.6.2 2019/01/27 18:35:19 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xhci_pci.c,v 1.8.6.3 2019/11/16 16:30:09 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -120,7 +120,7 @@ xhci_pci_attach(device_t parent, device_
const pci_chipset_tag_t pc = pa->pa_pc;
const pcitag_t tag = pa->pa_tag;
char const *intrstr;
- pcireg_t csr, memtype;
+ pcireg_t csr, memtype, usbrev;
int err;
uint32_t hccparams;
char intrbuf[PCI_INTRSTR_LEN];
@@ -200,6 +200,28 @@ xhci_pci_attach(device_t parent, device_
pci_findvendor(sc->sc_vendor, sizeof(sc->sc_vendor),
sc->sc_id_vendor);
+ usbrev = pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK;
+ switch (usbrev) {
+ case PCI_USBREV_3_0:
+ sc->sc_bus.ub_revision = USBREV_3_0;
+ break;
+ case PCI_USBREV_3_1:
+ sc->sc_bus.ub_revision = USBREV_3_1;
+ break;
+ default:
+ if (usbrev < PCI_USBREV_3_0) {
+ aprint_error_dev(self, "Unknown revision (%02x)\n",
+ usbrev);
+ sc->sc_bus.ub_revision = USBREV_UNKNOWN;
+ } else {
+ /* Default to the latest revision */
+ aprint_normal_dev(self,
+ "Unknown revision (%02x). Set to 3.1.\n", usbrev);
+ sc->sc_bus.ub_revision = USBREV_3_1;
+ }
+ break;
+ }
+
/* Intel chipset requires SuperSpeed enable and USB2 port routing */
switch (PCI_VENDOR(pa->pa_id)) {
case PCI_VENDOR_INTEL:
Index: src/sys/dev/usb/usb.c
diff -u src/sys/dev/usb/usb.c:1.165.6.4 src/sys/dev/usb/usb.c:1.165.6.5
--- src/sys/dev/usb/usb.c:1.165.6.4 Thu Sep 27 14:52:26 2018
+++ src/sys/dev/usb/usb.c Sat Nov 16 16:30:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: usb.c,v 1.165.6.4 2018/09/27 14:52:26 martin Exp $ */
+/* $NetBSD: usb.c,v 1.165.6.5 2019/11/16 16:30:09 martin Exp $ */
/*
* Copyright (c) 1998, 2002, 2008, 2012 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: usb.c,v 1.165.6.4 2018/09/27 14:52:26 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: usb.c,v 1.165.6.5 2019/11/16 16:30:09 martin Exp $");
#ifdef _KERNEL_OPT
#include "opt_usb.h"
@@ -251,6 +251,7 @@ usb_attach(device_t parent, device_t sel
case USBREV_1_1:
case USBREV_2_0:
case USBREV_3_0:
+ case USBREV_3_1:
break;
default:
aprint_error(", not supported\n");
@@ -344,6 +345,9 @@ usb_doattach(device_t self)
case USBREV_3_0:
speed = USB_SPEED_SUPER;
break;
+ case USBREV_3_1:
+ speed = USB_SPEED_SUPER_PLUS;
+ break;
default:
panic("usb_doattach");
}
Index: src/sys/dev/usb/usbdivar.h
diff -u src/sys/dev/usb/usbdivar.h:1.114.6.1 src/sys/dev/usb/usbdivar.h:1.114.6.2
--- src/sys/dev/usb/usbdivar.h:1.114.6.1 Sat Aug 25 11:29:52 2018
+++ src/sys/dev/usb/usbdivar.h Sat Nov 16 16:30:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: usbdivar.h,v 1.114.6.1 2018/08/25 11:29:52 martin Exp $ */
+/* $NetBSD: usbdivar.h,v 1.114.6.2 2019/11/16 16:30:09 martin Exp $ */
/*
* Copyright (c) 1998, 2012 The NetBSD Foundation, Inc.
@@ -153,7 +153,8 @@ struct usbd_bus {
#define USBREV_1_1 3
#define USBREV_2_0 4
#define USBREV_3_0 5
-#define USBREV_STR { "unknown", "pre 1.0", "1.0", "1.1", "2.0", "3.0" }
+#define USBREV_3_1 6
+#define USBREV_STR { "unknown", "pre 1.0", "1.0", "1.1", "2.0", "3.0", "3.1" }
const struct usbd_bus_methods
*ub_methods;
Index: src/sys/dev/usb/xhci.c
diff -u src/sys/dev/usb/xhci.c:1.72.2.11 src/sys/dev/usb/xhci.c:1.72.2.12
--- src/sys/dev/usb/xhci.c:1.72.2.11 Tue Sep 17 18:53:52 2019
+++ src/sys/dev/usb/xhci.c Sat Nov 16 16:30:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: xhci.c,v 1.72.2.11 2019/09/17 18:53:52 martin Exp $ */
+/* $NetBSD: xhci.c,v 1.72.2.12 2019/11/16 16:30:09 martin Exp $ */
/*
* Copyright (c) 2013 Jonathan A. Kollasch
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: xhci.c,v 1.72.2.11 2019/09/17 18:53:52 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xhci.c,v 1.72.2.12 2019/11/16 16:30:09 martin Exp $");
#ifdef _KERNEL_OPT
#include "opt_usb.h"
@@ -900,11 +900,23 @@ xhci_ecp(struct xhci_softc *sc, uint32_t
"b\0AC64\0" \
"\0"
+#define XHCI_HCC2_BITS \
+ "\177\020" /* New bitmask */ \
+ "b\7ETC_TSC\0" \
+ "b\6ETC\0" \
+ "b\5CIC\0" \
+ "b\4LEC\0" \
+ "b\3CTC\0" \
+ "b\2FSC\0" \
+ "b\1CMC\0" \
+ "b\0U3C\0" \
+ "\0"
+
int
xhci_init(struct xhci_softc *sc)
{
bus_size_t bsz;
- uint32_t cap, hcs1, hcs2, hcs3, hcc, dboff, rtsoff;
+ uint32_t cap, hcs1, hcs2, hcs3, hcc, dboff, rtsoff, hcc2;
uint32_t pagesize, config;
int i = 0;
uint16_t hciversion;
@@ -915,7 +927,6 @@ xhci_init(struct xhci_softc *sc)
/* Set up the bus struct for the usb 3 and usb 2 buses */
sc->sc_bus.ub_methods = &xhci_bus_methods;
sc->sc_bus.ub_pipesize = sizeof(struct xhci_pipe);
- sc->sc_bus.ub_revision = USBREV_3_0;
sc->sc_bus.ub_usedma = true;
sc->sc_bus.ub_hcpriv = sc;
@@ -931,7 +942,7 @@ xhci_init(struct xhci_softc *sc)
hciversion = XHCI_CAP_HCIVERSION(cap);
if (hciversion < XHCI_HCIVERSION_0_96 ||
- hciversion > XHCI_HCIVERSION_1_0) {
+ hciversion >= 0x0200) {
aprint_normal_dev(sc->sc_dev,
"xHCI version %x.%x not known to be supported\n",
(hciversion >> 8) & 0xff, (hciversion >> 0) & 0xff);
@@ -966,6 +977,11 @@ xhci_init(struct xhci_softc *sc)
snprintb(sbuf, sizeof(sbuf), XHCI_HCCV1_x_BITS, hcc);
aprint_debug_dev(sc->sc_dev, "hcc=%s\n", sbuf);
aprint_debug_dev(sc->sc_dev, "xECP %x\n", XHCI_HCC_XECP(hcc) * 4);
+ if (hciversion >= XHCI_HCIVERSION_1_1) {
+ hcc2 = xhci_cap_read_4(sc, XHCI_HCCPARAMS2);
+ snprintb(sbuf, sizeof(sbuf), XHCI_HCC2_BITS, hcc2);
+ aprint_debug_dev(sc->sc_dev, "hcc2=%s\n", sbuf);
+ }
/* default all ports to bus 0, i.e. usb 3 */
sc->sc_ctlrportbus = kmem_zalloc(
Index: src/sys/dev/usb/xhcireg.h
diff -u src/sys/dev/usb/xhcireg.h:1.9.6.1 src/sys/dev/usb/xhcireg.h:1.9.6.2
--- src/sys/dev/usb/xhcireg.h:1.9.6.1 Sat May 5 15:05:39 2018
+++ src/sys/dev/usb/xhcireg.h Sat Nov 16 16:30:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: xhcireg.h,v 1.9.6.1 2018/05/05 15:05:39 martin Exp $ */
+/* $NetBSD: xhcireg.h,v 1.9.6.2 2019/11/16 16:30:09 martin Exp $ */
/*-
* Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
@@ -35,6 +35,7 @@
#define PCI_USBREV 0x60 /* RO USB protocol revision */
#define PCI_USBREV_MASK 0xFF
#define PCI_USBREV_3_0 0x30 /* USB 3.0 */
+#define PCI_USBREV_3_1 0x31 /* USB 3.1 */
#define PCI_XHCI_FLADJ 0x61 /* RW frame length adjust */
@@ -50,6 +51,7 @@
#define XHCI_HCIVERSION_0_9 0x0090 /* xHCI version 0.9 */
#define XHCI_HCIVERSION_0_96 0x0096 /* xHCI version 0.96 */
#define XHCI_HCIVERSION_1_0 0x0100 /* xHCI version 1.0 */
+#define XHCI_HCIVERSION_1_1 0x0110 /* xHCI version 1.1 */
#define XHCI_HCSPARAMS1 0x04 /* RO structual parameters 1 */
#define XHCI_HCS1_MAXSLOTS(x) ((x) & 0xFF)
@@ -88,6 +90,15 @@
#define XHCI_DBOFF 0x14 /* RO doorbell offset */
#define XHCI_RTSOFF 0x18 /* RO runtime register space offset */
+#define XHCI_HCCPARAMS2 0x1c /* RO capability parameters 2 */
+#define XHCI_HCC2_U3C(x) (((x) >> 0) & 0x1) /* U3 Entry capable */
+#define XHCI_HCC2_CMC(x) (((x) >> 1) & 0x1) /* CEC MaxExLatTooLg */
+#define XHCI_HCC2_FSC(x) (((x) >> 2) & 0x1) /* Foce Save Context */
+#define XHCI_HCC2_CTC(x) (((x) >> 3) & 0x1) /* Compliance Transc */
+#define XHCI_HCC2_LEC(x) (((x) >> 4) & 0x1) /* Large ESIT Paylod */
+#define XHCI_HCC2_CIC(x) (((x) >> 5) & 0x1) /* Configuration Inf */
+#define XHCI_HCC2_ETC(x) (((x) >> 6) & 0x1) /* Extended TBC */
+#define XHCI_HCC2_ETC_TSC(x) (((x) >> 7) & 0x1) /* ExtTBC TRB Status */
/* XHCI operational registers. Offset given by XHCI_CAPLENGTH register */
#define XHCI_USBCMD 0x00 /* XHCI command */
