Module Name:    src
Committed By:   nakayama
Date:           Wed Nov 13 10:06:39 UTC 2019

Modified Files:
        src/sys/arch/sparc64/include: ctlreg.h psl.h

Log Message:
Revert workarounds for clang.
In-tree clang can now handle the "r" asm constraint for 64-bit values properly.


To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/arch/sparc64/include/ctlreg.h
cvs rdiff -u -r1.60 -r1.61 src/sys/arch/sparc64/include/psl.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc64/include/ctlreg.h
diff -u src/sys/arch/sparc64/include/ctlreg.h:1.66 src/sys/arch/sparc64/include/ctlreg.h:1.67
--- src/sys/arch/sparc64/include/ctlreg.h:1.66	Fri Apr  5 23:09:18 2019
+++ src/sys/arch/sparc64/include/ctlreg.h	Wed Nov 13 10:06:38 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: ctlreg.h,v 1.66 2019/04/05 23:09:18 nakayama Exp $ */
+/*	$NetBSD: ctlreg.h,v 1.67 2019/11/13 10:06:38 nakayama Exp $ */
 
 /*
  * Copyright (c) 1996-2002 Eduardo Horvath
@@ -485,13 +485,12 @@
 #ifdef __arch64__
 
 /* 64-bit kernel, non-constant */
-#define SPARC64_LD_NONCONST(ld, type)	\
+#define SPARC64_LD_NONCONST(ld)	\
 	__asm volatile(							\
 		"wr %2,%%g0,%%asi;	"				\
 		#ld " [%1]%%asi,%0	"				\
 		: "=r" (_v)						\
-		: "r" ((__uintptr_t)(loc)), "r" (asi),			\
-		  "m" (*(type *)(__uintptr_t)(loc)))
+		: "r" ((__uintptr_t)(loc)), "r" (asi))
 
 #if defined(__GNUC__) && defined(__OPTIMIZE__)
 #define SPARC64_LD_DEF(ld, type, vtype)	\
@@ -502,10 +501,9 @@ static __inline type ld(paddr_t loc, int
 		__asm volatile(						\
 			#ld " [%1]%2,%0		"			\
 			: "=r" (_v)					\
-			: "r" ((__uintptr_t)(loc)), "n" (asi),		\
-			  "m" (*(type *)(__uintptr_t)(loc)));		\
+			: "r" ((__uintptr_t)(loc)), "n" (asi));		\
 	else								\
-		SPARC64_LD_NONCONST(ld, type);				\
+		SPARC64_LD_NONCONST(ld);				\
 	return _v;							\
 }
 #else
@@ -513,7 +511,7 @@ static __inline type ld(paddr_t loc, int
 static __inline type ld(paddr_t loc, int asi)				\
 {									\
 	vtype _v;							\
-	SPARC64_LD_NONCONST(ld, type);					\
+	SPARC64_LD_NONCONST(ld);					\
 	return _v;							\
 }
 #endif
@@ -679,12 +677,12 @@ SPARC64_LD_DEF64(ldxa, uint64_t)
 #ifdef __arch64__
 
 /* 64-bit kernel, non-constant */
-#define SPARC64_ST_NONCONST(st, type)	\
+#define SPARC64_ST_NONCONST(st)	\
 	__asm volatile(							\
-		"wr %3,%%g0,%%asi;	"				\
-		#st " %1,[%2]%%asi	"				\
-		: "=m" (*(type *)(__uintptr_t)(loc))			\
-		: "r" (value), "r" ((__uintptr_t)(loc)), "r" (asi))
+		"wr %2,%%g0,%%asi;	"				\
+		#st " %0,[%1]%%asi	"				\
+		: : "r" (value), "r" ((__uintptr_t)(loc)),		\
+		    "r" (asi))
 
 #if defined(__GNUC__) && defined(__OPTIMIZE__)
 #define SPARC64_ST_DEF(st, type)	\
@@ -692,18 +690,17 @@ static __inline void st(paddr_t loc, int
 {									\
 	if (__builtin_constant_p(asi))					\
 		__asm volatile(						\
-			#st " %1,[%2]%3		"			\
-			: "=m" (*(type *)(__uintptr_t)(loc))		\
-			: "r" (value), "r" ((__uintptr_t)(loc)),	\
-			  "n" (asi));					\
+			#st " %0,[%1]%2		"			\
+			: : "r" (value), "r" ((__uintptr_t)(loc)),	\
+			    "n" (asi));					\
 	else								\
-		SPARC64_ST_NONCONST(st, type);				\
+		SPARC64_ST_NONCONST(st);				\
 }
 #else
 #define SPARC64_ST_DEF(st, type)	\
 static __inline void st(paddr_t loc, int asi, type value)		\
 {									\
-	SPARC64_ST_NONCONST(st, type);					\
+	SPARC64_ST_NONCONST(st);					\
 }
 #endif
 #define SPARC64_ST_DEF64(st, type)	SPARC64_ST_DEF(st, type)

Index: src/sys/arch/sparc64/include/psl.h
diff -u src/sys/arch/sparc64/include/psl.h:1.60 src/sys/arch/sparc64/include/psl.h:1.61
--- src/sys/arch/sparc64/include/psl.h:1.60	Sat Apr  6 21:40:15 2019
+++ src/sys/arch/sparc64/include/psl.h	Wed Nov 13 10:06:38 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: psl.h,v 1.60 2019/04/06 21:40:15 nakayama Exp $ */
+/*	$NetBSD: psl.h,v 1.61 2019/11/13 10:06:38 nakayama Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -322,13 +322,11 @@ static __inline void set##name(type _val
 	__asm volatile(#wr " %0,0,%" #reg : : "r" (_val) : "memory");	\
 }
 
-/*
- * XXX: clang's "r" constraint cannot handle 64-bit,
- * so use 32-bit kernel code as a workaround.
- */
-#if defined(__arch64__) && !defined(__clang__)
+#ifdef __arch64__
 #define SPARC64_RDCONST64_DEF(rd, name, reg) \
 	SPARC64_RDCONST_DEF(rd, name, reg, uint64_t)
+#define SPARC64_RD64_DEF(rd, name, reg) SPARC64_RD_DEF(rd, name, reg, uint64_t)
+#define SPARC64_WR64_DEF(wr, name, reg) SPARC64_WR_DEF(wr, name, reg, uint64_t)
 #else
 #define SPARC64_RDCONST64_DEF(rd, name, reg)				\
 static __inline __constfunc uint64_t get##name(void)			\
@@ -338,12 +336,6 @@ static __inline __constfunc uint64_t get
 		: "=r" (_hi), "=r" (_lo) : : constasm_clobbers);	\
 	return ((uint64_t)_hi << 32) | _lo;				\
 }
-#endif
-
-#ifdef __arch64__
-#define SPARC64_RD64_DEF(rd, name, reg) SPARC64_RD_DEF(rd, name, reg, uint64_t)
-#define SPARC64_WR64_DEF(wr, name, reg) SPARC64_WR_DEF(wr, name, reg, uint64_t)
-#else
 #define SPARC64_RD64_DEF(rd, name, reg)					\
 static __inline uint64_t get##name(void)				\
 {									\

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