Module Name: src
Committed By: jmcneill
Date: Wed Oct 30 21:40:04 UTC 2019
Modified Files:
src/sys/arch/arm/ti: am3_prcm.c ti_omaptimer.c
Log Message:
Use the hwmod clk to get the timer rate and explicitly enable the
timecounter timer.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/ti/am3_prcm.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/ti/ti_omaptimer.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/ti/am3_prcm.c
diff -u src/sys/arch/arm/ti/am3_prcm.c:1.7 src/sys/arch/arm/ti/am3_prcm.c:1.8
--- src/sys/arch/arm/ti/am3_prcm.c:1.7 Mon Oct 28 23:57:59 2019
+++ src/sys/arch/arm/ti/am3_prcm.c Wed Oct 30 21:40:04 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: am3_prcm.c,v 1.7 2019/10/28 23:57:59 jmcneill Exp $ */
+/* $NetBSD: am3_prcm.c,v 1.8 2019/10/30 21:40:04 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <[email protected]>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.7 2019/10/28 23:57:59 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.8 2019/10/30 21:40:04 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -86,6 +86,7 @@ CFATTACH_DECL_NEW(am3_prcm, sizeof(struc
static struct ti_prcm_clk am3_prcm_clks[] = {
/* XXX until we get a proper clock tree */
TI_PRCM_FIXED("FIXED_32K", 32768),
+ TI_PRCM_FIXED("FIXED_24MHZ", 24000000),
TI_PRCM_FIXED("FIXED_48MHZ", 48000000),
TI_PRCM_FIXED("FIXED_96MHZ", 96000000),
TI_PRCM_FIXED_FACTOR("PERIPH_CLK", 1, 1, "FIXED_48MHZ"),
@@ -107,12 +108,12 @@ static struct ti_prcm_clk am3_prcm_clks[
AM3_PRCM_HWMOD_PER("gpio4", 0xb4, "PERIPH_CLK"),
AM3_PRCM_HWMOD_WKUP("timer0", 0x10, "FIXED_32K"),
- AM3_PRCM_HWMOD_PER("timer2", 0x80, "PERIPH_CLK"),
- AM3_PRCM_HWMOD_PER("timer3", 0x84, "PERIPH_CLK"),
- AM3_PRCM_HWMOD_PER("timer4", 0x88, "PERIPH_CLK"),
- AM3_PRCM_HWMOD_PER("timer5", 0xec, "PERIPH_CLK"),
- AM3_PRCM_HWMOD_PER("timer6", 0xf0, "PERIPH_CLK"),
- AM3_PRCM_HWMOD_PER("timer7", 0x7c, "PERIPH_CLK"),
+ AM3_PRCM_HWMOD_PER("timer2", 0x80, "FIXED_24MHZ"),
+ AM3_PRCM_HWMOD_PER("timer3", 0x84, "FIXED_24MHZ"),
+ AM3_PRCM_HWMOD_PER("timer4", 0x88, "FIXED_24MHZ"),
+ AM3_PRCM_HWMOD_PER("timer5", 0xec, "FIXED_24MHZ"),
+ AM3_PRCM_HWMOD_PER("timer6", 0xf0, "FIXED_24MHZ"),
+ AM3_PRCM_HWMOD_PER("timer7", 0x7c, "FIXED_24MHZ"),
AM3_PRCM_HWMOD_PER("mmc0", 0x3c, "MMC_CLK"),
AM3_PRCM_HWMOD_PER("mmc1", 0xf4, "MMC_CLK"),
Index: src/sys/arch/arm/ti/ti_omaptimer.c
diff -u src/sys/arch/arm/ti/ti_omaptimer.c:1.3 src/sys/arch/arm/ti/ti_omaptimer.c:1.4
--- src/sys/arch/arm/ti/ti_omaptimer.c:1.3 Tue Oct 29 22:19:13 2019
+++ src/sys/arch/arm/ti/ti_omaptimer.c Wed Oct 30 21:40:04 2019
@@ -1,7 +1,7 @@
-/* $NetBSD: ti_omaptimer.c,v 1.3 2019/10/29 22:19:13 jmcneill Exp $ */
+/* $NetBSD: ti_omaptimer.c,v 1.4 2019/10/30 21:40:04 jmcneill Exp $ */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ti_omaptimer.c,v 1.3 2019/10/29 22:19:13 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ti_omaptimer.c,v 1.4 2019/10/30 21:40:04 jmcneill Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -125,6 +125,16 @@ omaptimer_get_timecount(struct timecount
return RD4(sc, TIMER_TCRR);
}
+static void
+omaptimer_enable(struct omaptimer_softc *sc, uint32_t value)
+{
+ /* Configure the timer */
+ WR4(sc, TIMER_TLDR, value);
+ WR4(sc, TIMER_TCRR, value);
+ WR4(sc, TIMER_TIER, 0);
+ WR4(sc, TIMER_TCLR, TCLR_ST | TCLR_AR);
+}
+
static int
omaptimer_match(device_t parent, cfdata_t match, void *aux)
{
@@ -141,8 +151,10 @@ omaptimer_attach(device_t parent, device
const int phandle = faa->faa_phandle;
struct timecounter *tc = &sc->sc_tc;
const char *modname;
+ struct clk *hwmod;
bus_addr_t addr;
bus_size_t size;
+ u_int rate;
if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
aprint_error(": couldn't get registers\n");
@@ -159,7 +171,8 @@ omaptimer_attach(device_t parent, device
return;
}
- if (ti_prcm_enable_hwmod(phandle, 0) != 0) {
+ hwmod = ti_prcm_get_hwmod(phandle, 0);
+ if (hwmod == NULL || clk_enable(hwmod) != 0) {
aprint_error(": couldn't enable module\n");
return;
}
@@ -171,22 +184,23 @@ omaptimer_attach(device_t parent, device
aprint_naive("\n");
aprint_normal(": Timer (%s)\n", modname);
+ rate = clk_get_rate(hwmod);
+
if (strcmp(modname, "timer2") == 0) {
+ omaptimer_enable(sc, 0);
+
/* Install timecounter */
tc->tc_get_timecount = omaptimer_get_timecount;
tc->tc_counter_mask = ~0u;
- tc->tc_frequency = 24000000;
+ tc->tc_frequency = rate;
tc->tc_name = modname;
tc->tc_quality = 200;
tc->tc_priv = sc;
tc_init(tc);
+
} else if (strcmp(modname, "timer3") == 0) {
- /* Configure the timer */
- const uint32_t value = (0xffffffff - ((24000000UL / hz) - 1));
- WR4(sc, TIMER_TLDR, value);
- WR4(sc, TIMER_TCRR, value);
- WR4(sc, TIMER_TIER, 0);
- WR4(sc, TIMER_TCLR, TCLR_ST | TCLR_AR);
+ const uint32_t value = (0xffffffff - ((rate / hz) - 1));
+ omaptimer_enable(sc, value);
/* Use this as the OS timer in UP configurations */
if (!arm_has_mpext_p) {
