Module Name:    src
Committed By:   jmcneill
Date:           Sun Oct 27 16:31:26 UTC 2019

Modified Files:
        src/sys/arch/arm/ti: am3_prcm.c files.ti
Added Files:
        src/sys/arch/arm/ti: ti_motg.c ti_otg.c ti_otgreg.h

Log Message:
Add USB support.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/ti/am3_prcm.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/ti/files.ti
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/ti/ti_motg.c \
    src/sys/arch/arm/ti/ti_otg.c src/sys/arch/arm/ti/ti_otgreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/ti/am3_prcm.c
diff -u src/sys/arch/arm/ti/am3_prcm.c:1.2 src/sys/arch/arm/ti/am3_prcm.c:1.3
--- src/sys/arch/arm/ti/am3_prcm.c:1.2	Sun Oct 27 12:14:51 2019
+++ src/sys/arch/arm/ti/am3_prcm.c	Sun Oct 27 16:31:26 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: am3_prcm.c,v 1.2 2019/10/27 12:14:51 jmcneill Exp $ */
+/* $NetBSD: am3_prcm.c,v 1.3 2019/10/27 16:31:26 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.2 2019/10/27 12:14:51 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.3 2019/10/27 16:31:26 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -113,6 +113,8 @@ static struct ti_prcm_clk am3_prcm_clks[
 	AM3_PRCM_HWMOD_PER("tptc0", 0x24, "PERIPH_CLK"),
 	AM3_PRCM_HWMOD_PER("tptc1", 0xfc, "PERIPH_CLK"),
 	AM3_PRCM_HWMOD_PER("tptc2", 0x100, "PERIPH_CLK"),
+
+	AM3_PRCM_HWMOD_PER("usb_otg_hs", 0x1c, "PERIPH_CLK"),
 };
 
 static int

Index: src/sys/arch/arm/ti/files.ti
diff -u src/sys/arch/arm/ti/files.ti:1.9 src/sys/arch/arm/ti/files.ti:1.10
--- src/sys/arch/arm/ti/files.ti:1.9	Sun Oct 27 15:43:46 2019
+++ src/sys/arch/arm/ti/files.ti	Sun Oct 27 16:31:26 2019
@@ -1,4 +1,4 @@
-#	$NetBSD: files.ti,v 1.9 2019/10/27 15:43:46 jmcneill Exp $
+#	$NetBSD: files.ti,v 1.10 2019/10/27 16:31:26 jmcneill Exp $
 #
 
 file	arch/arm/ti/ti_platform.c	soc_ti
@@ -48,6 +48,14 @@ file	arch/arm/ti/ti_tptc.c		ti_tptc
 attach	sdhc at fdt with ti_sdhc: ti_edma, ti_prcm
 file	arch/arm/ti/ti_sdhc.c		ti_sdhc
 
+# USB
+device	tiotg { } : fdt
+attach	tiotg at fdt with ti_otg
+file	arch/arm/ti/ti_otg.c		ti_otg
+
+attach	motg at fdt with ti_motg
+file	arch/arm/ti/ti_motg.c		ti_motg
+
 # SOC parameters
 defflag	opt_soc.h			SOC_TI
 defflag	opt_soc.h			SOC_TI_AM335X: SOC_TI

Added files:

Index: src/sys/arch/arm/ti/ti_motg.c
diff -u /dev/null src/sys/arch/arm/ti/ti_motg.c:1.1
--- /dev/null	Sun Oct 27 16:31:26 2019
+++ src/sys/arch/arm/ti/ti_motg.c	Sun Oct 27 16:31:26 2019
@@ -0,0 +1,237 @@
+/* $NetBSD: ti_motg.c,v 1.1 2019/10/27 16:31:26 jmcneill Exp $ */
+/*
+ * Copyright (c) 2013 Manuel Bouyer.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *	notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *	notice, this list of conditions and the following disclaimer in the
+ *	documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: ti_motg.c,v 1.1 2019/10/27 16:31:26 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/conf.h>
+#include <sys/bus.h>
+#include <sys/proc.h>
+#include <sys/kernel.h>
+#include <sys/mutex.h>
+#include <sys/condvar.h>
+
+#include <arm/ti/ti_prcm.h>
+#include <arm/ti/ti_otgreg.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usbdivar.h>
+#include <dev/usb/usb_mem.h>
+#include <dev/usb/motgreg.h>
+#include <dev/usb/motgvar.h>
+#include <dev/usb/usbhist.h>
+
+#include <dev/fdt/fdtvar.h>
+
+#ifdef USB_DEBUG
+#ifndef MOTG_DEBUG
+#define motgdebug 0
+#else
+extern int motgdebug;
+#endif /* MOTG_DEBUG */
+#endif /* USB_DEBUG */
+
+#define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOGN(motgdebug,1,FMT,A,B,C,D)
+#define	MOTGHIST_FUNC()		USBHIST_FUNC()
+#define	MOTGHIST_CALLED(name)	USBHIST_CALLED(motgdebug)
+
+static const char * compatible [] = {
+	"ti,musb-am33xx",
+	NULL
+};
+
+/*
+ * motg device attachement and driver,
+ * for the per-port part of the controller: TI-specific part, phy and
+ * MI Mentor OTG.
+ */
+
+struct ti_motg_softc {
+	struct motg_softc	sc_motg;
+	bus_space_tag_t		sc_ctrliot;
+	bus_space_handle_t	sc_ctrlioh;
+	void *			sc_ctrlih;
+	int			sc_ctrlport;
+};
+
+static int	ti_motg_match(device_t, cfdata_t, void *);
+static void	ti_motg_attach(device_t, device_t, void *);
+static int	ti_motg_intr(void *);
+static void	ti_motg_poll(void *);
+
+CFATTACH_DECL_NEW(ti_motg, sizeof(struct ti_motg_softc),
+    ti_motg_match, ti_motg_attach, NULL, NULL);
+
+static int
+ti_motg_match(device_t parent, cfdata_t match, void *aux)
+{
+	struct fdt_attach_args * const faa = aux;
+
+	return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+static void
+ti_motg_attach(device_t parent, device_t self, void *aux)
+{
+	struct ti_motg_softc *sc = device_private(self);
+	struct fdt_attach_args * const faa = aux;
+	const int phandle = faa->faa_phandle;
+	char intrstr[128];
+	bus_addr_t addr[2];
+	bus_size_t size[2];
+	uint32_t val;
+
+	MOTGHIST_FUNC(); MOTGHIST_CALLED();
+
+	if (fdtbus_get_reg_byname(phandle, "mc", &addr[0], &size[0]) != 0 ||
+	    fdtbus_get_reg_byname(phandle, "control", &addr[1], &size[1])) {
+		aprint_error(": couldn't get registers\n");
+		return;
+	}
+
+	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
+		aprint_error(": couldn't decode interrupt\n");
+		return;
+	}
+
+	sc->sc_motg.sc_dev = self;
+	sc->sc_ctrliot = faa->faa_bst;
+	if (bus_space_map(sc->sc_ctrliot, addr[1], size[1], 0, &sc->sc_ctrlioh) != 0) {
+		aprint_error(": couldn't map registers\n");
+		return;
+	}
+	sc->sc_ctrlih = fdtbus_intr_establish(phandle, 0, IPL_USB, 0,
+	    ti_motg_intr, sc);
+	sc->sc_motg.sc_bus.ub_dmatag = faa->faa_dmat;
+
+	val = TIOTG_USBC_READ4(sc, USBCTRL_REV);
+	aprint_normal(": 0x%x version v%d.%d.%d", val,
+	    (val >> 8) & 7, (val >> 6) & 3, val & 63);
+
+	/* XXX configure mode */
+#if 0
+	if (sc->sc_ctrlport == 0)
+		sc->sc_motg.sc_mode = MOTG_MODE_DEVICE;
+	else
+		sc->sc_motg.sc_mode = MOTG_MODE_HOST;
+#else
+	/* XXXXX
+	 * Both ports always the host mode only.
+	 * And motg(4) doesn't supports device and OTG modes.
+	 */
+	sc->sc_motg.sc_mode = MOTG_MODE_HOST;
+#endif
+	if (sc->sc_motg.sc_mode == MOTG_MODE_HOST) {
+		val = TIOTG_USBC_READ4(sc, USBCTRL_MODE);
+		val |= USBCTRL_MODE_IDDIGMUX;
+		val &= ~USBCTRL_MODE_IDDIG;
+		TIOTG_USBC_WRITE4(sc, USBCTRL_MODE, val);
+		TIOTG_USBC_WRITE4(sc, USBCTRL_UTMI, USBCTRL_UTMI_FSDATAEXT);
+	} else {
+		val = TIOTG_USBC_READ4(sc, USBCTRL_MODE);
+		val |= USBCTRL_MODE_IDDIGMUX;
+		val |= USBCTRL_MODE_IDDIG;
+		TIOTG_USBC_WRITE4(sc, USBCTRL_MODE, val);
+	}
+
+	aprint_normal("\n");
+	aprint_naive("\n");
+
+	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
+
+	sc->sc_motg.sc_iot = faa->faa_bst;
+	if (bus_space_map(sc->sc_motg.sc_iot, addr[0], size[0], 0,
+	    &sc->sc_motg.sc_ioh) != 0) {
+		aprint_error_dev(self, "couldn't map mc registers\n");
+		return;
+	}
+	sc->sc_motg.sc_size = size[0];
+	sc->sc_motg.sc_intr_poll = ti_motg_poll;
+	sc->sc_motg.sc_intr_poll_arg = sc;
+	delay(10);
+	motg_init(&sc->sc_motg);
+	/* enable interrupts */
+	TIOTG_USBC_WRITE4(sc, USBCTRL_INTEN_SET0, 0xffffffff);
+	TIOTG_USBC_WRITE4(sc, USBCTRL_INTEN_SET1,
+	    USBCTRL_INTEN_USB_ALL & ~USBCTRL_INTEN_USB_SOF);
+}
+
+static int
+ti_motg_intr(void *v)
+{
+	struct ti_motg_softc *sc = v;
+	uint32_t stat, stat0, stat1;
+	int rv = 0;
+	int i;
+
+	MOTGHIST_FUNC(); MOTGHIST_CALLED();
+
+	mutex_spin_enter(&sc->sc_motg.sc_intr_lock);
+	stat = TIOTG_USBC_READ4(sc, USBCTRL_STAT);
+	stat0 = TIOTG_USBC_READ4(sc, USBCTRL_IRQ_STAT0);
+	stat1 = TIOTG_USBC_READ4(sc, USBCTRL_IRQ_STAT1);
+	DPRINTF("USB %jd 0x%jx 0x%jx stat %jd",
+	    sc->sc_ctrlport, stat0, stat1, stat);
+	/* try to deal with vbus errors */
+	if (stat1 & MUSB2_MASK_IVBUSERR ) {
+		stat1 &= ~MUSB2_MASK_IVBUSERR;
+		for (i = 0; i < 1000; i++) {
+			TIOTG_USBC_WRITE4(sc, USBCTRL_IRQ_STAT1,
+			    MUSB2_MASK_IVBUSERR);
+			motg_intr_vbus(&sc->sc_motg, stat & 0x1);
+			delay(1000);
+			stat = TIOTG_USBC_READ4(sc, USBCTRL_STAT);
+			if (stat & 0x1)
+				break;
+		}
+	}
+	if (stat0) {
+		TIOTG_USBC_WRITE4(sc, USBCTRL_IRQ_STAT0, stat0);
+	}
+	if (stat1) {
+		TIOTG_USBC_WRITE4(sc, USBCTRL_IRQ_STAT1, stat1);
+	}
+	if ((stat & 0x1) == 0) {
+		mutex_spin_exit(&sc->sc_motg.sc_intr_lock);
+		aprint_error_dev(sc->sc_motg.sc_dev, ": vbus error\n");
+		return 1;
+	}
+	if (stat0 != 0 || stat1 != 0) {
+		rv = motg_intr(&sc->sc_motg, ((stat0 >> 16) & 0xffff),
+			    stat0 & 0xffff, stat1 & 0xff);
+	}
+	mutex_spin_exit(&sc->sc_motg.sc_intr_lock);
+	return rv;
+}
+
+static void
+ti_motg_poll(void *v)
+{
+	ti_motg_intr(v);
+}
Index: src/sys/arch/arm/ti/ti_otg.c
diff -u /dev/null src/sys/arch/arm/ti/ti_otg.c:1.1
--- /dev/null	Sun Oct 27 16:31:26 2019
+++ src/sys/arch/arm/ti/ti_otg.c	Sun Oct 27 16:31:26 2019
@@ -0,0 +1,127 @@
+/* $NetBSD: ti_otg.c,v 1.1 2019/10/27 16:31:26 jmcneill Exp $ */
+/*
+ * Copyright (c) 2013 Manuel Bouyer.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *	notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *	notice, this list of conditions and the following disclaimer in the
+ *	documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: ti_otg.c,v 1.1 2019/10/27 16:31:26 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/conf.h>
+#include <sys/bus.h>
+#include <sys/proc.h>
+#include <sys/kernel.h>
+#include <sys/mutex.h>
+#include <sys/condvar.h>
+
+#include <arm/ti/ti_prcm.h>
+#include <arm/ti/ti_otgreg.h>
+
+#include <dev/fdt/fdtvar.h>
+
+static const char * compatible [] = {
+	"ti,am33xx-usb",
+	NULL
+};
+
+struct tiotg_softc {
+	device_t		sc_dev;
+	bus_space_tag_t		sc_iot;
+	bus_space_handle_t	sc_ioh;
+	bus_dma_tag_t		sc_dmat;
+	void *			sc_ih;
+};
+
+static int	tiotg_match(device_t, cfdata_t, void *);
+static void	tiotg_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(ti_otg, sizeof(struct tiotg_softc),
+    tiotg_match, tiotg_attach, NULL, NULL);
+
+static int
+tiotg_match(device_t parent, cfdata_t match, void *aux)
+{
+	struct fdt_attach_args * const faa = aux;
+
+	return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+static void
+tiotg_attach(device_t parent, device_t self, void *aux)
+{
+	struct tiotg_softc *sc = device_private(self);
+	struct fdt_attach_args * const faa = aux;
+	const int phandle = faa->faa_phandle;
+	bus_addr_t addr;
+	bus_size_t size;
+	uint32_t val;
+
+	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
+		aprint_error(": couldn't get registers\n");
+		return;
+	}
+
+	sc->sc_iot = faa->faa_bst;
+	sc->sc_dmat = faa->faa_dmat;
+	sc->sc_dev = self;
+
+	if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh) != 0) {
+		aprint_error(": couldn't map registers\n");
+		return;
+	}
+
+	aprint_normal(": TI dual-port USB controller");
+
+#if 0
+	/* XXX this looks wrong */
+	prcm_write_4(AM335X_PRCM_CM_WKUP, CM_WKUP_CM_CLKDCOLDO_DPLL_PER,
+	    CM_WKUP_CM_CLKDCOLDO_DPLL_PER_CLKDCOLDO_GATE_CTRL|
+	    CM_WKUP_CM_CLKDCOLDO_DPLL_PER_CLKDCOLDO_ST);
+
+	prcm_write_4(AM335X_PRCM_CM_PER, CM_PER_USB0_CLKCTRL, 2);
+	while ((prcm_read_4(AM335X_PRCM_CM_PER, CM_PER_USB0_CLKCTRL) & 0x3) != 2)
+		delay(10);
+
+	while (prcm_read_4(AM335X_PRCM_CM_PER, CM_PER_USB0_CLKCTRL) & (3<<16))
+		delay(10);
+#endif
+
+	/* reset module */
+	TIOTG_USBSS_WRITE4(sc, USBSS_SYSCONFIG, USBSS_SYSCONFIG_SRESET);
+	while (TIOTG_USBSS_READ4(sc, USBSS_SYSCONFIG) & USBSS_SYSCONFIG_SRESET)
+		delay(10);
+	val = TIOTG_USBSS_READ4(sc, USBSS_REVREG);
+	aprint_normal(": version v%d.%d.%d.%d",
+	    (val >> 11) & 15, (val >> 8) & 7, (val >> 6) & 3, val & 63);
+	aprint_normal("\n");
+
+	/* enable clock */
+	if (ti_prcm_enable_hwmod(phandle, 0) != 0) {
+		aprint_error(": couldn't enable module\n");
+		return;
+	}
+
+	fdt_add_bus(self, phandle, faa);
+}
Index: src/sys/arch/arm/ti/ti_otgreg.h
diff -u /dev/null src/sys/arch/arm/ti/ti_otgreg.h:1.1
--- /dev/null	Sun Oct 27 16:31:26 2019
+++ src/sys/arch/arm/ti/ti_otgreg.h	Sun Oct 27 16:31:26 2019
@@ -0,0 +1,74 @@
+/* $NetBSD: ti_otgreg.h,v 1.1 2019/10/27 16:31:26 jmcneill Exp $ */
+/*
+ * Copyright (c) 2013 Manuel Bouyer.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *	notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *	notice, this list of conditions and the following disclaimer in the
+ *	documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define TI_OTG_NPORTS 2
+/* USBSS registers */
+#define TIOTG_USBSS_OFFSET 0
+#define TIOTG_USBSS_READ4(sc, reg) \
+	bus_space_read_4(sc->sc_iot, sc->sc_ioh, (reg) + TIOTG_USBSS_OFFSET)
+#define TIOTG_USBSS_WRITE4(sc, reg, val) \
+	bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg) + TIOTG_USBSS_OFFSET, (val))
+
+#define USBSS_REVREG		0x00  
+#define USBSS_SYSCONFIG		0x10
+#define	USBSS_SYSCONFIG_USB0_OCP_EN_N	0x800
+#define	USBSS_SYSCONFIG_PHY0_UTMI_EN_N	0x400
+#define	USBSS_SYSCONFIG_USB1_OCP_EN_N	0x200
+#define	USBSS_SYSCONFIG_PHY1_UTMI_EN_N	0x100
+#define	USBSS_SYSCONFIG_STBYMODE_SHIFT	4
+#define	USBSS_SYSCONFIG_IDLEMODE_SHIFT	2
+#define	USBSS_SYSCONFIG_FREEEMU		0x002
+#define	USBSS_SYSCONFIG_SRESET		0x001
+
+/* USB control registers */
+#define USB_CTRL_OFFSET(port)	(0x1000 + (0x800 * (port)))
+#define USB_PORT_SIZE	0x800 /* size of CTRL+PHY+CORE */
+#define TIOTG_USBC_READ4(sc, reg) \
+	bus_space_read_4(sc->sc_ctrliot, sc->sc_ctrlioh, (reg))
+#define TIOTG_USBC_WRITE4(sc, reg, val) \
+	bus_space_write_4(sc->sc_ctrliot, sc->sc_ctrlioh, (reg), (val))
+
+#define USBCTRL_REV		0x00
+#define USBCTRL_CTRL		0x14
+#define USBCTRL_STAT		0x18
+#define USBCTRL_IRQ_STAT0	0x30
+#define	USBCTRL_IRQ_STAT0_RXSHIFT	16
+#define	USBCTRL_IRQ_STAT0_TXSHIFT	0
+#define USBCTRL_IRQ_STAT1		0x34
+#define	USBCTRL_IRQ_STAT1_DRVVBUS	(1 << 8)
+#define USBCTRL_INTEN_SET0	0x38
+#define USBCTRL_INTEN_SET1	0x3C  
+#define	USBCTRL_INTEN_USB_ALL   	0x1ff
+#define	USBCTRL_INTEN_USB_SOF   	(1 << 3)
+#define USBCTRL_INTEN_CLR0	0x40  
+#define USBCTRL_INTEN_CLR1	0x44  
+#define USBCTRL_UTMI	0xE0  
+#define	USBCTRL_UTMI_FSDATAEXT		(1 << 1)
+#define USBCTRL_MODE	0xE8  
+#define	USBCTRL_MODE_IDDIG		(1 << 8)
+#define	USBCTRL_MODE_IDDIGMUX		(1 << 7)
+
+#define USB_CORE_OFFSET		0x400
+#define USB_CORE_SIZE		0x400

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