Module Name: src
Committed By: martin
Date: Wed Oct 23 19:14:19 UTC 2019
Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: cpu.c locore.S
src/sys/arch/aarch64/include [netbsd-9]: cpu.h param.h
src/sys/arch/arm/acpi [netbsd-9]: cpu_acpi.c
src/sys/arch/arm/arm32 [netbsd-9]: cpu.c
src/sys/arch/arm/fdt [netbsd-9]: cpu_fdt.c
src/sys/arch/arm/include [netbsd-9]: cpu.h
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #359):
sys/arch/aarch64/aarch64/locore.S: revision 1.42
sys/arch/aarch64/aarch64/locore.S: revision 1.43
sys/arch/aarch64/aarch64/locore.S: revision 1.44
sys/arch/arm/fdt/cpu_fdt.c: revision 1.28
sys/arch/aarch64/include/cpu.h: revision 1.14
sys/arch/aarch64/include/param.h: revision 1.12
sys/arch/arm/arm32/cpu.c: revision 1.133
sys/arch/arm/arm32/cpu.c: revision 1.134
sys/arch/arm/include/cpu.h: revision 1.101
sys/arch/arm/acpi/cpu_acpi.c: revision 1.7
sys/arch/aarch64/aarch64/cpu.c: revision 1.23
sys/arch/aarch64/aarch64/cpu.c: revision 1.24
sys/arch/aarch64/aarch64/cpu.c: revision 1.25
Increase aarch64 MAXCPUS to 256.
-
Invalidate dcache before polling AP hatched status
-
Avoid overlap between BP and last AP stack. AP stacks are now in order of
increasing address order.
Spotted by and idea from mlelstv.
-
Use separate cacheline aligned arrays for mbox and hatched as before.
-
cpu_hatched_p only for MULTIPROCESSOR
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.20.2.1 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.39.2.1 -r1.39.2.2 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.13 -r1.13.4.1 src/sys/arch/aarch64/include/cpu.h
cvs rdiff -u -r1.11 -r1.11.4.1 src/sys/arch/aarch64/include/param.h
cvs rdiff -u -r1.6 -r1.6.4.1 src/sys/arch/arm/acpi/cpu_acpi.c
cvs rdiff -u -r1.129 -r1.129.4.1 src/sys/arch/arm/arm32/cpu.c
cvs rdiff -u -r1.25 -r1.25.4.1 src/sys/arch/arm/fdt/cpu_fdt.c
cvs rdiff -u -r1.100 -r1.100.4.1 src/sys/arch/arm/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
