Module Name: src
Committed By: martin
Date: Sun Sep 1 14:00:13 UTC 2019
Modified Files:
src/sys/arch/sparc/include [netbsd-9]: ctlreg.h
src/sys/dev/pci [netbsd-9]: if_xgereg.h
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #145):
sys/arch/sparc/include/ctlreg.h: revision 1.30
sys/dev/pci/if_xgereg.h: revision 1.3
Add missing NUL to prevent buffer overrun.
To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.29.34.1 src/sys/arch/sparc/include/ctlreg.h
cvs rdiff -u -r1.2 -r1.2.172.1 src/sys/dev/pci/if_xgereg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc/include/ctlreg.h
diff -u src/sys/arch/sparc/include/ctlreg.h:1.29 src/sys/arch/sparc/include/ctlreg.h:1.29.34.1
--- src/sys/arch/sparc/include/ctlreg.h:1.29 Wed Dec 4 18:44:14 2013
+++ src/sys/arch/sparc/include/ctlreg.h Sun Sep 1 14:00:13 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: ctlreg.h,v 1.29 2013/12/04 18:44:14 jdc Exp $ */
+/* $NetBSD: ctlreg.h,v 1.29.34.1 2019/09/01 14:00:13 martin Exp $ */
/*
* Copyright (c) 1996
@@ -376,7 +376,7 @@
#define SFSR_BITS "\177\020" \
"b\21EM\0b\20CS\0b\17SB\0f\15\2PERR\0" \
"b\14UC\0b\13TO\0b\12BE\0f\10\2LVL\0" \
- "f\05\3AT\0f\02\3FT\0b\01FAV\0b\01OW"
+ "f\05\3AT\0f\02\3FT\0b\01FAV\0b\01OW\0"
/* [4m] Synchronous Fault Types */
#define SFSR_FT_NONE (0 << 2) /* no fault */
Index: src/sys/dev/pci/if_xgereg.h
diff -u src/sys/dev/pci/if_xgereg.h:1.2 src/sys/dev/pci/if_xgereg.h:1.2.172.1
--- src/sys/dev/pci/if_xgereg.h:1.2 Sun Dec 11 12:22:50 2005
+++ src/sys/dev/pci/if_xgereg.h Sun Sep 1 14:00:13 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: if_xgereg.h,v 1.2 2005/12/11 12:22:50 christos Exp $ */
+/* $NetBSD: if_xgereg.h,v 1.2.172.1 2019/09/01 14:00:13 martin Exp $ */
/*
* Copyright (c) 2004, SUNET, Swedish University Computer Network.
@@ -85,7 +85,7 @@
"\177\20b\x3fTDMA_READY\0b\x3eRDMA_READY\0b\x3dPFC_READY\0" \
"b\x3cTMAC_BUF_EMPTY\0b\x3aPIC_QUIESCENT\0\x39RMAC_REMOTE_FAULT\0" \
"b\x38RMAC_LOCAL_FAULT\0b\x27MC_DRAM_READY\0b\x26MC_QUEUES_READY\0" \
- "b\x21M_PLL_LOCK\0b\x20P_PLL_LOCK"
+ "b\x21M_PLL_LOCK\0b\x20P_PLL_LOCK\0"
/*
* PCI-X registers
