Module Name:    src
Committed By:   msaitoh
Date:           Sat Aug 17 17:03:32 UTC 2019

Modified Files:
        src/sys/external/bsd/drm2/dist/drm/radeon: evergreend.h
            radeon_rv770_smc.c rv730d.h

Log Message:
Use unsigned to avoid undefined behavior. Found by kUBSan.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 \
    src/sys/external/bsd/drm2/dist/drm/radeon/evergreend.h
cvs rdiff -u -r1.1 -r1.2 \
    src/sys/external/bsd/drm2/dist/drm/radeon/radeon_rv770_smc.c
cvs rdiff -u -r1.2 -r1.3 src/sys/external/bsd/drm2/dist/drm/radeon/rv730d.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/external/bsd/drm2/dist/drm/radeon/evergreend.h
diff -u src/sys/external/bsd/drm2/dist/drm/radeon/evergreend.h:1.3 src/sys/external/bsd/drm2/dist/drm/radeon/evergreend.h:1.4
--- src/sys/external/bsd/drm2/dist/drm/radeon/evergreend.h:1.3	Fri Aug  9 06:27:21 2019
+++ src/sys/external/bsd/drm2/dist/drm/radeon/evergreend.h	Sat Aug 17 17:03:32 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: evergreend.h,v 1.3 2019/08/09 06:27:21 msaitoh Exp $	*/
+/*	$NetBSD: evergreend.h,v 1.4 2019/08/17 17:03:32 msaitoh Exp $	*/
 
 /*
  * Copyright 2010 Advanced Micro Devices, Inc.
@@ -109,7 +109,7 @@
 #define		IBIAS(x)				((x) << 20)
 #define		IBIAS_MASK				(0x3ff << 20)
 #define		RESET					(1 << 30)
-#define		PDNB					(1 << 31)
+#define		PDNB					(1U << 31)
 #define	MPLL_AD_FUNC_CNTL_2				0x628
 #define		BYPASS					(1 << 19)
 #define		BIAS_GEN_PDNB				(1 << 24)
@@ -184,7 +184,7 @@
 #       define MRDCKC0_BYPASS                           (1 << 28)
 #       define MRDCKC1_BYPASS                           (1 << 29)
 #       define MRDCKD0_BYPASS                           (1 << 30)
-#       define MRDCKD1_BYPASS                           (1 << 31)
+#       define MRDCKD1_BYPASS                           (1U << 31)
 
 #define CG_AT                                           0x6d4
 #       define CG_R(x)					((x) << 0)
@@ -415,7 +415,7 @@
 #define		INSTANCE_INDEX(x)			((x) << 0)
 #define		SE_INDEX(x)     			((x) << 16)
 #define		INSTANCE_BROADCAST_WRITES      		(1 << 30)
-#define		SE_BROADCAST_WRITES      		(1 << 31)
+#define		SE_BROADCAST_WRITES      		(1U << 31)
 #define RLC_GFX_INDEX           			0x3fC4
 #define CC_GC_SHADER_PIPE_CONFIG			0x8950
 #define		WRITE_DIS      				(1 << 0)
@@ -479,7 +479,7 @@
 #define		RB_BUFSZ(x)					((x) << 0)
 #define		RB_BLKSZ(x)					((x) << 8)
 #define		RB_NO_UPDATE					(1 << 27)
-#define		RB_RPTR_WR_ENA					(1 << 31)
+#define		RB_RPTR_WR_ENA					(1U << 31)
 #define		BUF_SWAP_32BIT					(2 << 16)
 #define	CP_RB_RPTR					0x8700
 #define	CP_RB_RPTR_ADDR					0xC10C
@@ -816,7 +816,7 @@
 #       define PIN1_AUDIO_ENABLED                         (1 << 25)
 #       define PIN2_AUDIO_ENABLED                         (1 << 26)
 #       define PIN3_AUDIO_ENABLED                         (1 << 27)
-#       define AUDIO_ENABLED                              (1 << 31)
+#       define AUDIO_ENABLED                              (1U << 31)
 
 
 #define	GC_USER_SHADER_PIPE_CONFIG			0x8954
@@ -1047,7 +1047,7 @@
 #define		PS_PRIO(x)					((x) << 24)
 #define		VS_PRIO(x)					((x) << 26)
 #define		GS_PRIO(x)					((x) << 28)
-#define		ES_PRIO(x)					((x) << 30)
+#define		ES_PRIO(x)					((u32)(x) << 30)
 #define	SQ_GPR_RESOURCE_MGMT_1				0x8C04
 #define		NUM_PS_GPRS(x)					((x) << 0)
 #define		NUM_VS_GPRS(x)					((x) << 16)
@@ -1252,7 +1252,7 @@
 #       define TIME_STAMP_INT_ENABLE                    (1 << 26)
 #       define IB2_INT_ENABLE                           (1 << 29)
 #       define IB1_INT_ENABLE                           (1 << 30)
-#       define RB_INT_ENABLE                            (1 << 31)
+#       define RB_INT_ENABLE                            (1U << 31)
 #define CP_INT_STATUS                                   0xc128
 #       define SCRATCH_INT_STAT                         (1 << 25)
 #       define TIME_STAMP_INT_STAT                      (1 << 26)

Index: src/sys/external/bsd/drm2/dist/drm/radeon/radeon_rv770_smc.c
diff -u src/sys/external/bsd/drm2/dist/drm/radeon/radeon_rv770_smc.c:1.1 src/sys/external/bsd/drm2/dist/drm/radeon/radeon_rv770_smc.c:1.2
--- src/sys/external/bsd/drm2/dist/drm/radeon/radeon_rv770_smc.c:1.1	Mon Aug 27 14:38:20 2018
+++ src/sys/external/bsd/drm2/dist/drm/radeon/radeon_rv770_smc.c	Sat Aug 17 17:03:32 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: radeon_rv770_smc.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $	*/
+/*	$NetBSD: radeon_rv770_smc.c,v 1.2 2019/08/17 17:03:32 msaitoh Exp $	*/
 
 /*
  * Copyright 2011 Advanced Micro Devices, Inc.
@@ -25,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_rv770_smc.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_rv770_smc.c,v 1.2 2019/08/17 17:03:32 msaitoh Exp $");
 
 #include <linux/firmware.h>
 #include "drmP.h"
@@ -316,7 +316,7 @@ int rv770_copy_bytes_to_smc(struct radeo
 	spin_lock_irqsave(&rdev->smc_idx_lock, flags);
 	while (byte_count >= 4) {
 		/* SMC address space is BE */
-		data = (src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3];
+		data = ((u32)src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3];
 
 		ret = rv770_set_smc_sram_address(rdev, addr, limit);
 		if (ret)

Index: src/sys/external/bsd/drm2/dist/drm/radeon/rv730d.h
diff -u src/sys/external/bsd/drm2/dist/drm/radeon/rv730d.h:1.2 src/sys/external/bsd/drm2/dist/drm/radeon/rv730d.h:1.3
--- src/sys/external/bsd/drm2/dist/drm/radeon/rv730d.h:1.2	Mon Aug 27 04:58:36 2018
+++ src/sys/external/bsd/drm2/dist/drm/radeon/rv730d.h	Sat Aug 17 17:03:32 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: rv730d.h,v 1.2 2018/08/27 04:58:36 riastradh Exp $	*/
+/*	$NetBSD: rv730d.h,v 1.3 2019/08/17 17:03:32 msaitoh Exp $	*/
 
 /*
  * Copyright 2011 Advanced Micro Devices, Inc.
@@ -150,7 +150,7 @@
 #define		POWERMODE2(x)				((x) << 16)
 #define		POWERMODE2_MASK				(0xff << 16)
 #define		POWERMODE3(x)				((x) << 24)
-#define		POWERMODE3_MASK				(0xff << 24)
+#define		POWERMODE3_MASK				(0xffU << 24)
 
 #define	MC_ARB_DRAM_TIMING_1				0x27f0
 #define	MC_ARB_DRAM_TIMING_2				0x27f4

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