Module Name: src
Committed By: msaitoh
Date: Fri May 24 07:34:51 UTC 2019
Modified Files:
src/sys/dev/ic: athn.c
Log Message:
KNF. No functional change.
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/dev/ic/athn.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/ic/athn.c
diff -u src/sys/dev/ic/athn.c:1.18 src/sys/dev/ic/athn.c:1.19
--- src/sys/dev/ic/athn.c:1.18 Tue Jun 26 06:48:00 2018
+++ src/sys/dev/ic/athn.c Fri May 24 07:34:51 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: athn.c,v 1.18 2018/06/26 06:48:00 msaitoh Exp $ */
+/* $NetBSD: athn.c,v 1.19 2019/05/24 07:34:51 msaitoh Exp $ */
/* $OpenBSD: athn.c,v 1.83 2014/07/22 13:12:11 mpi Exp $ */
/*-
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: athn.c,v 1.18 2018/06/26 06:48:00 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: athn.c,v 1.19 2019/05/24 07:34:51 msaitoh Exp $");
#ifndef _MODULE
#include "athn_usb.h" /* for NATHN_USB */
@@ -249,8 +249,7 @@ athn_attach(struct athn_softc *sc)
sc->sc_mac_rev,
sc->sc_ntxchains, sc->sc_nrxchains, sc->sc_eep_rev,
ether_sprintf(ic->ic_myaddr));
- }
- else {
+ } else {
aprint_normal(": Atheros %s, RF %s\n", athn_get_mac_name(sc),
athn_get_rf_name(sc));
aprint_verbose_dev(sc->sc_dev,
@@ -612,8 +611,7 @@ athn_get_chipid(struct athn_softc *sc)
sc->sc_mac_rev = MS(reg, AR_SREV_REVISION2);
if (!(reg & AR_SREV_TYPE2_HOST_MODE))
sc->sc_flags |= ATHN_FLAG_PCIE;
- }
- else {
+ } else {
sc->sc_mac_ver = MS(reg, AR_SREV_VERSION);
sc->sc_mac_rev = MS(reg, AR_SREV_REVISION);
if (sc->sc_mac_ver == AR_SREV_VERSION_5416_PCIE)
@@ -721,8 +719,7 @@ athn_reset(struct athn_softc *sc, int co
AR_WRITE(sc, AR_INTR_SYNC_ENABLE, 0);
AR_WRITE(sc, AR_RC, AR_RC_HOSTIF |
(!AR_SREV_9380_10_OR_LATER(sc) ? AR_RC_AHB : 0));
- }
- else if (!AR_SREV_9380_10_OR_LATER(sc))
+ } else if (!AR_SREV_9380_10_OR_LATER(sc))
AR_WRITE(sc, AR_RC, AR_RC_AHB);
AR_WRITE(sc, AR_RTC_RC, AR_RTC_RC_MAC_WARM |
@@ -808,8 +805,7 @@ athn_init_pll(struct athn_softc *sc, con
AR_WRITE(sc, AR_RTC_PLL_CONTROL2, 0x886666);
pll = SM(AR_RTC_9160_PLL_REFDIV, 0x5);
pll |= SM(AR_RTC_9160_PLL_DIV, 0x2c);
- }
- else if (AR_SREV_9280_10_OR_LATER(sc)) {
+ } else if (AR_SREV_9280_10_OR_LATER(sc)) {
pll = SM(AR_RTC_9160_PLL_REFDIV, 0x05);
if (c != NULL && IEEE80211_IS_CHAN_5GHZ(c)) {
if (sc->sc_flags & ATHN_FLAG_FAST_PLL_CLOCK)
@@ -818,18 +814,15 @@ athn_init_pll(struct athn_softc *sc, con
pll = 0x2850;
else
pll |= SM(AR_RTC_9160_PLL_DIV, 0x28);
- }
- else
+ } else
pll |= SM(AR_RTC_9160_PLL_DIV, 0x2c);
- }
- else if (AR_SREV_9160_10_OR_LATER(sc)) {
+ } else if (AR_SREV_9160_10_OR_LATER(sc)) {
pll = SM(AR_RTC_9160_PLL_REFDIV, 0x05);
if (c != NULL && IEEE80211_IS_CHAN_5GHZ(c))
pll |= SM(AR_RTC_9160_PLL_DIV, 0x50);
else
pll |= SM(AR_RTC_9160_PLL_DIV, 0x58);
- }
- else {
+ } else {
pll = AR_RTC_PLL_REFDIV_5 | AR_RTC_PLL_DIV2;
if (c != NULL && IEEE80211_IS_CHAN_5GHZ(c))
pll |= SM(AR_RTC_PLL_DIV, 0x0a);
@@ -1105,8 +1098,7 @@ athn_set_key(struct ieee80211com *ic, st
if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
txmic = &key[16];
rxmic = &key[24];
- }
- else
+ } else
#endif
{
rxmic = &key[16];
@@ -1138,8 +1130,7 @@ athn_set_key(struct ieee80211com *ic, st
hi = LE_READ_2(&addr[4]);
lo = lo >> 1 | hi << 31;
hi = hi >> 1;
- }
- else
+ } else
lo = hi = 0;
AR_WRITE(sc, AR_KEYTABLE_MAC0(entry), lo);
AR_WRITE(sc, AR_KEYTABLE_MAC1(entry), hi | AR_KEYTABLE_VALID);
@@ -1214,8 +1205,7 @@ athn_btcoex_init(struct athn_softc *sc)
AR_WRITE_BARRIER(sc);
ops->gpio_config_input(sc, AR_GPIO_BTACTIVE_PIN);
- }
- else { /* 3-wire. */
+ } else { /* 3-wire. */
AR_SETBITS(sc, sc->sc_gpio_input_en_off,
AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
@@ -1261,8 +1251,7 @@ athn_btcoex_enable(struct athn_softc *sc
ops->gpio_config_output(sc, AR_GPIO_WLANACTIVE_PIN,
AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
- }
- else { /* 2-wire. */
+ } else { /* 2-wire. */
ops->gpio_config_output(sc, AR_GPIO_WLANACTIVE_PIN,
AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
}
@@ -1390,8 +1379,7 @@ athn_init_calib(struct athn_softc *sc, s
if (AR_SREV_9380_10_OR_LATER(sc)) {
/* Support temperature compensation calibration. */
sc->sc_sup_calib_mask |= ATHN_CAL_TEMP;
- }
- else if (IEEE80211_IS_CHAN_5GHZ(curchan) || extchan != NULL) {
+ } else if (IEEE80211_IS_CHAN_5GHZ(curchan) || extchan != NULL) {
/*
* ADC gain calibration causes uplink throughput
* drops in HT40 mode on AR9287.
@@ -1461,13 +1449,11 @@ athn_ani_ofdm_err_trigger(struct athn_so
ops->disable_ofdm_weak_signal(sc);
ani->spur_immunity_level = 0;
ops->set_spur_immunity_level(sc, 0);
- }
- else if (ani->firstep_level < 2) {
+ } else if (ani->firstep_level < 2) {
ani->firstep_level++;
ops->set_firstep_level(sc, ani->firstep_level);
}
- }
- else if (rssi > ATHN_ANI_RSSI_THR_LOW) {
+ } else if (rssi > ATHN_ANI_RSSI_THR_LOW) {
/*
* Beacon RSSI is in mid range, we need OFDM weak signal
* detection but we can raise first step level.
@@ -1480,8 +1466,7 @@ athn_ani_ofdm_err_trigger(struct athn_so
ani->firstep_level++;
ops->set_firstep_level(sc, ani->firstep_level);
}
- }
- else if (sc->sc_ic.ic_curmode != IEEE80211_MODE_11A) {
+ } else if (sc->sc_ic.ic_curmode != IEEE80211_MODE_11A) {
/*
* Beacon RSSI is low, if in b/g mode, turn off OFDM weak
* signal detection and zero first step level to maximize
@@ -1533,8 +1518,7 @@ athn_ani_cck_err_trigger(struct athn_sof
ani->firstep_level++;
ops->set_firstep_level(sc, ani->firstep_level);
}
- }
- else if (sc->sc_ic.ic_curmode != IEEE80211_MODE_11A) {
+ } else if (sc->sc_ic.ic_curmode != IEEE80211_MODE_11A) {
/*
* Beacon RSSI is low, zero first step level to maximize
* CCK sensitivity.
@@ -1570,8 +1554,7 @@ athn_ani_lower_immunity(struct athn_soft
* Beacon RSSI is high, leave OFDM weak signal detection
* off or it may oscillate.
*/
- }
- else if (rssi > ATHN_ANI_RSSI_THR_LOW) {
+ } else if (rssi > ATHN_ANI_RSSI_THR_LOW) {
/*
* Beacon RSSI is in mid range, turn on OFDM weak signal
* detection or lower first step level.
@@ -1586,8 +1569,7 @@ athn_ani_lower_immunity(struct athn_soft
ops->set_firstep_level(sc, ani->firstep_level);
return;
}
- }
- else {
+ } else {
/* Beacon RSSI is low, lower first step level. */
if (ani->firstep_level > 0) {
ani->firstep_level--;
@@ -1602,8 +1584,7 @@ athn_ani_lower_immunity(struct athn_soft
if (ani->spur_immunity_level > 0) {
ani->spur_immunity_level--;
ops->set_spur_immunity_level(sc, ani->spur_immunity_level);
- }
- else if (ani->noise_immunity_level > 0) {
+ } else if (ani->noise_immunity_level > 0) {
ani->noise_immunity_level--;
ops->set_noise_immunity_level(sc, ani->noise_immunity_level);
}
@@ -1648,8 +1629,7 @@ athn_ani_monitor(struct athn_softc *sc)
listen_time = (cycdelta - txfdelta - rxfdelta) /
(athn_clock_rate(sc) * 1000);
- }
- else
+ } else
listen_time = 0;
ani->cyccnt = cyccnt;
@@ -1689,15 +1669,13 @@ athn_ani_monitor(struct athn_softc *sc)
athn_ani_lower_immunity(sc);
athn_ani_restart(sc);
- }
- else if (ani->listen_time > ATHN_ANI_PERIOD) {
+ } else if (ani->listen_time > ATHN_ANI_PERIOD) {
/* Check to see if we need to raise immunity. */
if (ani->ofdm_phy_err_count >
ani->listen_time * ani->ofdm_trig_high / 1000) {
athn_ani_ofdm_err_trigger(sc);
athn_ani_restart(sc);
- }
- else if (ani->cck_phy_err_count >
+ } else if (ani->cck_phy_err_count >
ani->listen_time * ani->cck_trig_high / 1000) {
athn_ani_cck_err_trigger(sc);
athn_ani_restart(sc);
@@ -1776,8 +1754,7 @@ athn_init_dma(struct athn_softc *sc)
if (AR_SREV_9285(sc)) {
AR_WRITE(sc, AR_PCU_TXBUF_CTRL,
AR9285_PCU_TXBUF_CTRL_USABLE_SIZE);
- }
- else if (!AR_SREV_9271(sc)) {
+ } else if (!AR_SREV_9271(sc)) {
AR_WRITE(sc, AR_PCU_TXBUF_CTRL,
AR_PCU_TXBUF_CTRL_USABLE_SIZE);
}
@@ -1924,8 +1901,7 @@ athn_txtime(struct athn_softc *sc, int l
txtime = divround(8 + 4 * len + 3, athn_rates[ridx].rate);
/* SIFS is 10us for 11g but Signal Extension adds 6us. */
txtime = 16 + 4 + 4 * txtime + 16;
- }
- else {
+ } else {
txtime = divround(16 * len, athn_rates[ridx].rate);
if (ridx != ATHN_RIDX_CCK1 && (flags & IEEE80211_F_SHPREAMBLE))
txtime += 72 + 24;
@@ -2252,8 +2228,7 @@ athn_hw_reset(struct athn_softc *sc, str
/* NB: RTC reset clears TSF. */
error = athn_reset_power_on(sc);
- }
- else {
+ } else {
tsfhi = tsflo = 0; /* XXX: gcc */
error = athn_reset(sc, 0);
}
@@ -2315,8 +2290,7 @@ athn_hw_reset(struct athn_softc *sc, str
(uint32_t)~(IEEE80211_FC1_RETRY | IEEE80211_FC1_PWR_MGT |
IEEE80211_FC1_MORE_DATA));
AR_WRITE(sc, AR_AES_MUTE_MASK1, reg);
- }
- else if (AR_SREV_9160_10_OR_LATER(sc)) {
+ } else if (AR_SREV_9160_10_OR_LATER(sc)) {
/* Disable hardware crypto for management frames. */
AR_CLRBITS(sc, AR_PCU_MISC_MODE2,
AR_PCU_MISC_MODE2_MGMT_CRYPTO_ENABLE);
@@ -2569,8 +2543,7 @@ athn_newstate(struct ieee80211com *ic, e
athn_set_hostap_timers(sc);
/* Enable software beacon alert interrupts. */
sc->sc_imask |= AR_IMR_SWBA;
- }
- else
+ } else
#endif
{
athn_set_sta_timers(sc);
@@ -2622,8 +2595,7 @@ athn_updateedca(struct ieee80211com *ic)
SM(AR_D_CHNTIME_DUR,
IEEE80211_TXOP_TO_US(ac->ac_txoplimit)) |
AR_D_CHNTIME_EN);
- }
- else
+ } else
AR_WRITE(sc, AR_DCHNTIME(qid), 0);
}
AR_WRITE_BARRIER(sc);
@@ -2642,11 +2614,9 @@ athn_clock_rate(struct athn_softc *sc)
clockrate = AR_CLOCK_RATE_FAST_5GHZ_OFDM;
else
clockrate = AR_CLOCK_RATE_5GHZ_OFDM;
- }
- else if (ic->ic_curmode == IEEE80211_MODE_11B) {
+ } else if (ic->ic_curmode == IEEE80211_MODE_11B) {
clockrate = AR_CLOCK_RATE_CCK;
- }
- else
+ } else
clockrate = AR_CLOCK_RATE_2GHZ_OFDM;
#ifndef IEEE80211_NO_HT
if (sc->sc_curchanext != NULL)
